Christian, There are set of CPU queues handling different traffic types. Policing itself is done in hardware.
-Waris -----Original Message----- From: Christian Meutes [mailto:[email protected]] Sent: Friday, February 10, 2012 10:40 PM To: Waris Sagheer (waris); Nick Hilliard Cc: [email protected] Subject: Re: [c-nsp] ME-3600X - CoPP On Feb 10, 2012, at 12:14 PM, Waris Sagheer (waris) wrote: > CPU > > -Waris > > > -----Original Message----- > From: [email protected] > [mailto:[email protected]] On Behalf Of Nick Hilliard > Sent: Thursday, February 09, 2012 12:07 PM > To: [email protected] > Subject: Re: [c-nsp] ME-3600X - CoPP > > On 09/02/2012 19:15, Waris Sagheer (waris) wrote: >> CoPP will be supported in 15.2(2)S, Q2CY12. > > will the copp policer operate on the data plane, or on the control > plane cpu? > > Nick I appreciate this progression very much.... I guess the question was more about if CoPP will be done in h/w so w/o CPU performance impact, and not where it actually sits and police? _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
