Additional information, should have just looked at the TCAM on an ASR1001. It uses 80/160/320 bit regions (1, 2 and 4 cells). On a router with full routes and minimal ACLs, we have 8 cells used of 65528 (5Mbits).
The following command shows the QFP memory of various types: sh plat hard qfp active infra exmem statistics Type: Name: DRAM, QFP: 0 Total: 268435456 InUse: 120426496 Free: 148008960 Lowest free water mark: 148008960 Type: Name: SRAM, QFP: 0 Total: 32768 InUse: 14880 Free: 17888 Lowest free water mark: 17888 Type: Name: IRAM, QFP: 0 Total: 134217728 InUse: 7029760 Free: 127187968 Lowest free water mark: 127187968 The DRAM is actually the QFP 256MB listed in your document (I think - the size matches). LR Mack McBride Network Architect -----Original Message----- From: [email protected] [mailto:[email protected]] On Behalf Of Mack McBride Sent: Friday, February 08, 2013 1:39 PM To: Nick Hilliard Cc: [email protected] Subject: Re: [c-nsp] ASR-100x intro The TCAM on the ASR1k is not used for FIB. That is for QOS and ACL handling. Those figures are in bits and it generally takes 144 or 288 bits to store an entry (more bits for port information). The 144/288 division is used by ACL TCAM in the 6509. My understanding is that the ASR uses a slightly different division if port information is required but I haven't seen documentation. The TCAM I am intimately familiar with from a general chip perspective but not how the ASR does it specifically. My understanding is that the MB from the QFP in the document you referenced are used for the FIB but anything that doesn't fit can be offloaded to slower DRAM (still looking for confirmation). I haven't gotten a good explanation from anyone as to what happens when the QFP memory is exhausted. LR Mack McBride Network Architect -----Original Message----- From: Nick Hilliard [mailto:[email protected]] Sent: Friday, February 08, 2013 11:59 AM To: Mack McBride Cc: Adam Vitkovsky; [email protected] Subject: Re: [c-nsp] ASR-100x intro On 08/02/2013 17:27, Mack McBride wrote: > It seems they could get handled in software but the ESP is basically > software anyway. packet destination lookup is handled in TCAM on the asr1k. The amount of TCAM is listed on page 11 of: > http://www.cisco.com/en/US/prod/collateral/routers/ps9343/data_sheet_c > 78-450070.pdf The TCAM size is measured in megs rather than prefixes, as this is a more natural way of handling it. You're right that it's opaque though - the figures for ipv4 are the same as for ipv6 for the ESP40/ESP40/ESP100, and only 2x for the ESP20. It would be very interesting if Cisco could provide some details on how TCAM carving is handled on these boxes. Nick -- Archive ref: "Cisco ASR 1000 Series Embedded Services Processors" data sheet, docid: C78-450070-26 _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/ _______________________________________________ cisco-nsp mailing list [email protected] https://puck.nether.net/mailman/listinfo/cisco-nsp archive at http://puck.nether.net/pipermail/cisco-nsp/
