Hi Folks,
I’d like to ask if FPGA or Fabric ASIC on dCEF720 Line-Cards WS-X6708-10GE do
have any concept of priority.
If I assume the link from FPGA to Fabric ASIC is just 16G,
Then if I run 20G of traffic from port ASICs to FPGA,
Then FPGA would have to be dropping 4G worth of traffic and if there’s no
concept of priority then…
The problem would be even worse on Fabric ASIC which has only 20G Fabric
Channel.
So if both FPGA supply 16G then Fabric ASIC would have to be dropping 12G of
traffic.
So if there’s no concept of priority on FPGA one would need to make sure no
more than 8G is coming from each Port ASIC
And if there’s no concept of priority Fabric ASIC then one would need to make
sure no more than 5G is coming from each Port ASIC (or only use one port per
FPGA)
Thanks,
adam
Adam Vitkovsky
IP Engineer
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