*Hi Mates,* *Please help me on this requirement with your available consultants.*
*Title: *Design Engineer/Design Architect *Location:* Hillsboro, OR *Duration:* 12+ Months *Job Description:* - Ability to work cross-domain topics, spanning logic library, ASIC and custom flows. - Familiarity with advanced process nodes using tri-gate or finFET devices like 22nm/16nm/14nm is desirable - Experience developing standard cell /logic libraries is highly desirable - Must have ability to develop scripts using Perl/TCL/Python - Atleast 7 years of experience doing circuit design, conversant with simulation and extraction methodology. Must have ability to do Vmin analyses, logic library characterization and statistical analyses. Must have ability to read layout. OR - Atleast 5 years of experience doing SOC block convergence. Some experience converging high frequency cores is desirable. Must have ability to run synthesis, APR flows and analyze results. - Must be conversant with logic library views like .lib, verilog, spf, AOCV etc Regards, ---------------------------------------------------------- *Mayank Gogia* Senior Recruiter Innovazion Consulting Inc. 12 Main St, Essex, CT 06426 *Phone:* 860-581-5600 | *Fax:* 212-202-4267 | *Email: * [email protected] -- You received this message because you are subscribed to the Google Groups "Citrix and Sap problems" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. To post to this group, send email to [email protected]. Visit this group at http://groups.google.com/group/citrix-and-sap-problems. For more options, visit https://groups.google.com/d/optout.
