On 03/11/2010 10:33 PM, Christopher X. Candreva wrote: > ---------- Forwarded message ---------- > Date: Thu, 11 Mar 2010 15:25:43 -0500 (EST) > From: Christopher X. Candreva <ch...@westnet.com> > To: cla...@lists.clamav.net > Subject: llvm/jit CPU dependant > > > I just did a compile of 0.96rc1 on a Sparc server, and received this > message: > > configure: error: Unsupported CPU for JIT: sparc, not building LLVM
It will fallback to the interpreter, the JIT is an optional component. > > What's involved in adding support for a new CPU ? Hoefully not assembly > code ? It would require knowledge of how Sparc CPUs work, like: - how to save/restore (all) registers - patching compilation stubs at runtime - handling relocations - any special instructions needed to synchronize the CPU to execute the newly compiled instructions libclamav uses LLVM for JIT, which has support for generating Sparc (32-bit) code, but only when used as a static compiler, not as a JIT. Here is a reply on the llvmdev ML about Sparc status: http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-February/029417.html AFAIK adding a jit involves implementing a SparcJITInfo.cpp (similar to X86JITInfo.cpp), and making sure that each instruction has its encoding defined in the .td. A very old version of LLVM (1.7) had Sparc JIT support but it got removed, probably because it bitrotted and didn't work properly anymore: https://llvm.org/svn/llvm-project/llvm/branches/release_17/lib/Target/SparcV9/SparcV9JITInfo.cpp If you are interested in working on this the proper place to discuss it would be the LLVMdev mailing list. Best regards, --Edwin _______________________________________________ Help us build a comprehensive ClamAV guide: visit http://wiki.clamav.net http://www.clamav.net/support/ml
