> > Unless I've miss understood click's threading model, a single poll > device element with multiple outputs can only be assigned to one > thread and hence once cpu. To be able to poll a 10G interface at line
The polling device is attached to a thread and then it generates tasks. While executing a task, passive elements are executed until a queue is encountered or the packet is dropped. Note, the elements that are the task chain will execute on the CPU on which the task is scheduled. So I don't think that having multiple polling outputs is in violation of the threading model. Please correct me if I am wrong. > rate you need to assign between 3 and 4 cpus to the device, hence the > need for multiple elements. A single core of a 2.6Ghz Xeon can only > poll about 2.8 Mp/s . I think for a 10GE card this might be a good approach (provided the PCI-E bus does not become a bottleneck). However, for e1000e and igb drivers I think it will result in too many wasted cycles. Roman > > Adam > _______________________________________________ click mailing list [email protected] https://amsterdam.lcs.mit.edu/mailman/listinfo/click
