Tuesday February 1 9:00 - 9:50 AM Owen 102 Bipul C. Paul Post Doctoral Fellow Electrical and Computer Engineering Purdue University
Digital Computing with Leakage: A Device/Circuit/Architecture Perspective In recent years, the demand for power sensitive designs has grown significantly due to the fast growth of battery-operated portable computing devices. In this talk it will be shown that sub-threshold leakage current can be used for ultra-low power computation in applications such as cell phones, PDA, pacemakers etc. It will also be shown that an integrated device/circuit/architecture co-design approach will significantly improve the performance of digital sub-threshold operation. Result on a five-tap FIR filter shows 100MHz performance with ~100X less power than the normal operation. Biography Bipul C. Paul received the B. Tech. and M. Tech. Degrees in radiophysics and electronics from the University of Calcutta, India, and the Ph.D. degree from the Indian Institute of Science, Bangalore, India. He was with Alliance Semiconductor, where he led the project on synchronous DRAM design. He is presently working as a Post Doctoral Fellow at the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN. His present research interests include low-power design of nanoscale circuits under process variation (using both bulk and SOI devices), testing, and noise analysis. He is also working on the device and circuit optimization for ultra-low power digital sub-threshold operation. Dr. Paul received the Best Thesis of the Year award in 1999. _______________________________________________ Colloquium mailing list [email protected] https://secure.engr.oregonstate.edu/mailman/listinfo/colloquium
