Upcoming colloquiums are posted at http://eecs.oregonstate.edu/graduate/colloquium/
Thursday February 10 4:00 - 4:50 PM Covell 216 Subhasish Mitra Senior Staff Engineer Intel Corporation and Associate Director of the Center for Reliable Computing Stanford University X-Compact + Xpand: A Low-Cost High Quality Scan Test Solution We present a novel test data compression architecture and associated design techniques capable of achieving almost exponential reduction in test data volume and test time while allowing use of commercial Automatic Test Pattern Generation (ATPG) tools. Over the past 20 years, the presence of unknown logic values or X's in industrial designs has been widely recognized as the most significant barrier to efficient implementation of test response compaction that is necessary for Built-In Self Test and test compression applications. X-Compact is an new test response compaction technique that overcomes this barrier by tolerating X's while achieving close to exponential reduction in the test response data volume, without compromising test quality and diagnosis capability for most practical scenarios. Xpand enables close to exponential reduction in test stimulus data volume without requiring any significant changes to current design and test flows. The architecture has been implemented in more than 30 industrial designs. Biography Subhasish Mitra is a Senior Staff Engineer at Intel Corporation, a Consulting Assistant Professor in the Electrical Engineering Department of Stanford University, and the Associate Director of the Center for Reliable Computing of Stanford University. His research interests include robust computing, VLSI design and test, and computer architecture. He received Ph.D. in Electrical Engineering from Stanford University in 2000. At Intel, Dr. Mitra is responsible for developing enabling technologies for Design for Excellence (DFX) - Design for Testability, Reliability, Manufacturability and Debug - in advanced process technologies. At the Center for Reliable Computing (CRC) of Stanford University, he supervises Ph.D. students and is currently involved with the Stanford CRC test chip experiment projects. During 2000-2001, he provided consulting at Agilent Technologies in their System Chip Testing program. Dr. Mitra has published more than 60 technical papers in leading conferences and journals, and invented design and test techniques that have seen wide-spread proliferation in the industry. His most recent award is the Intel Achievement Award, Intel's highest corporate award, that he received in April 2004 "for the development and deployment of a breakthrough test compression technology." He is actively involved with the organization of several IEEE-sponsored conferences. _______________________________________________ Colloquium mailing list [email protected] https://secure.engr.oregonstate.edu/mailman/listinfo/colloquium
