|
Monday David J. Allstot Bandwidth Extension Techniques in CMOS
for Wireline/Wireless Communications Circuit design for digital links and
optical transceivers involves three critical challenges: wide bandwidth (BW),
high gain and low power. Conventional single-stage approaches trade off wide BW
for low gain because the gain-BW product increases as gain decreases;
multiple-stage cascades trade off high gain for power, area and BW shrinkage.
Peaking techniques for single-stage amplifiers achieve high gain simultaneously
with high BW extension ratios (BWER), which means fewer stages. Increases in
BWER and gain are achieved using capacitor-splitting and magnetic-coupling to
sequence charging currents in bridged-shunt series and asymmetric T-coil
amplifiers. UWB communication systems use a 3.1-10.6GHz spectrum. LNA design is
critical in a UWB receiver; it should exhibit low return loss, low noise
figure, high gain across 7.5GHz, and consume minimum power and die area. Cost
and SoC considerations dictate the use of CMOS. Previous designs use
common-source or distributed amplifiers; good performance is achieved, but
reductions in power and die area are desired. A common-gate UWB LNA is
described with low power and an area efficient impedance match along with
stagger-compensated series peaking for BW extension. Biography: David J. Allstot received the B.S. from |
_______________________________________________ Colloquium mailing list [email protected] https://secure.engr.oregonstate.edu/mailman/listinfo/colloquium
