Monday
April 26
4:00 - 4:50 PM 
Kelley 1001

Joshua Fryman 
Intel Labs


Computing in 2018 -- The Exascale Problem

In March 2010, DARPA announced their Exascale program challenge, a project to 
present realized double precision ExaFLOPS in a total of 20 Megawatts by the 
year 2018. This represents over a 100x scaling factor shift in both 
computational capability as well as power efficiency assuming traditional CMOS 
scaling. With the march toward 5 nm fabrication, traditional scaling rules are 
inaccurate, increasing the burden on the Exascale effort. The future is one of 
power-limited devices at every level, requiring a shift in computer 
architecture. As a result of that shift, the programming and systems landscape 
requires a level of flexibility to accommodate the hardware designs while 
providing better abstractions to the software developer. At every level of 
computing hardware and software, resiliency and tolerance support will be 
critical. This talk will frame the key parameters behind the Exascale 
challenge, and briefly explore their implications across the computing 
landscape: fabricat
 ion, architecture, languages, and more.


Biography

Joshua Fryman received his BS from the University of Florida. Joshua spent many 
years in industry working on embedded system hardware and software before 
obtaining his PhD from Georgia Tech. Joshua then joined Intel Labs, focusing on 
corporate research and development efforts. Joshua has been involved with many 
projects at Intel, including the Terascale effort, the data parallel 
Ct/Firetown compiler, the Larrabee ISA and microarchitecture, and the Exascale 
effort.
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