Monday May 17 4:00 - 4:50 PM Kelley 1001
William R. Tonti Obtaining a US patent The ingredients that are necessary and sufficient for granting a US patent are the intersection of new, useful, and non-obvious elements of enablement. This intersection is used by experts skilled in the art to examine the patent specification and it’s claims. As an inventor you must describe why this application is not anticipated by the prior art. The analysis of prior art when viewed as a unique element or in combination therein cannot read against the claims that arise as a result of the proposed invention. This talk will analyze USPA 5,798,553 “Trench Isolated FET Devices, and the Method for their manufacture”. The application describes a fundamental industry problem, and a proposed solution. A description of how this problem statement was introduced into the technical community through IEEE publication is also shown. Fundamental electrical engineering principles are used to both analyze and solve the problem. A semiconductor process solution using standard techniques is shown to satisfy the conditions of new, useful, and non-obvious, and leads to the claims this patent now protects. Biography William R. Tonti received the B.S.E.E. with honor (1978) from Northeastern University. He then joined IBM in Essex Junction, Vermont, retiring in 2009 as an IBM Senior manager. In this position Dr. Tonti managed an international group of PhD’s who developed advanced compact models used for all forms of chip designs both inside of IBM and externally with a diverse set of customers ranging from digital, memory, RF, and ultra low power. Currently Dr. Tonti is the Director of Future Directions at the IEEE, the largest non profit engineering institute in the world. In this position he investigates new and emerging technologies IEEE should engage with and cultivate. Previously at IBM he held the position as the lead device engineer in 32nm development in the Albany Nanotech facility.. He has also held positions at IBM in the capacity of the technical assistant to the VP of process development, and in Engineering and Technology Services, working as a technologist for AMD’s 65nm SOI technology. This technology space was co-developed by both IBM and AMD in a joint venture.. In addition Dr. Tonti has contributed in the development of PowerPC microprocessor technology and reliability strategies, as well as a program manager in the wired communication space. Dr Tonti has also been heavily involved in the giga-bit vertical cell DRAM technology development. He received an M.S.E.E. (1982) from the University of Vermont, an M.B.A. (1983) from St. Michael's College, and a Ph.D. in Electrical Engineering (1988) from the University of Vermont under the auspices of the IBM resident study program. Dr. Tonti was the 2002 IEEE International Reliability Physics Symposium General Chairman, and the 2000 IEEE Integrated Reliability Workshop General Chairman, presently serving on their respective boards of directors. He has authored numerous contributed, keynote , and invited papers, and holds 220 U.S. patents. Dr. Tonti is a member of tau beta pi, eta kappa nu, a fellow of the IEEE, an advisory board member of the IEEE Transactions on Device and Material Reliability, a recipient of the IEEE 3’rd millennium medal (for contributions in semiconductor reliability) , and an ABET engineering curriculum evaluator. Dr. Tonti was elected to and served a 3 year term as the IEEE Reliability Society President. IEEE has a total of 45 technical disciplines, to be elected as the President of one of these is a unique achievement. Dr. Tonti was twice recognized as an IBM Master Inventor, spanning ten years. Dr Tonti was elevated to the position of IEEE fellow in November 2008 and he was awarded the IEEE engineer of the year in 2008. Both awards are significant career recognition. IEEE fellows represent 0.1% of the engineering community. The Engineer of the year award is granted to one individual per year and is not always granted. _______________________________________________ Colloquium mailing list [email protected] https://secure.engr.oregonstate.edu/mailman/listinfo/colloquium
