Script 'mail_helper' called by obssrc
Hello community,

here is the log from the commit of package pcm for openSUSE:Factory checked in 
at 2021-07-27 14:32:01
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/pcm (Old)
 and      /work/SRC/openSUSE:Factory/.pcm.new.1899 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "pcm"

Tue Jul 27 14:32:01 2021 rev:7 rq:908407 version:202107

Changes:
--------
--- /work/SRC/openSUSE:Factory/pcm/pcm.changes  2021-06-01 10:36:23.452703657 
+0200
+++ /work/SRC/openSUSE:Factory/.pcm.new.1899/pcm.changes        2021-07-27 
14:32:15.207472712 +0200
@@ -1,0 +2,13 @@
+Sun Jul 25 17:15:00 UTC 2021 - Roman Dementiev <[email protected]>
+
+- Update to 202107:
+* support systems with > 1024 logical cores
+* support Rocket Lake
+* pcm-pcie: fix HIT metrics calculation on Broadwell/Haswell server platforms
+* pcm: add several additional columns to the socket and core sections in csv 
output
+* pcm-iio: fix multiplier value for outbound events on Snowridge and Icelake 
server platforms
+* implement workaround for Linux watchdog not clearing its event programming
+* move Icelake top-down events to a separate group to fix counting through 
Linux perf API
+* added pcm-mmio utility to rpm
+
+-------------------------------------------------------------------

Old:
----
  202105.tar.gz

New:
----
  202107.tar.gz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ pcm.spec ++++++
--- /var/tmp/diff_new_pack.LkqhPg/_old  2021-07-27 14:32:15.875472052 +0200
+++ /var/tmp/diff_new_pack.LkqhPg/_new  2021-07-27 14:32:15.879472047 +0200
@@ -17,7 +17,7 @@
 
 
 Name:           pcm
-Version:        202105
+Version:        202107
 Release:        0
 Summary:        Processor Counter Monitor
 License:        BSD-3-Clause
@@ -59,6 +59,7 @@
 %{_sbindir}/pcm-lspci
 %{_sbindir}/pcm-memory
 %{_sbindir}/pcm-msr
+%{_sbindir}/pcm-mmio
 %{_sbindir}/pcm-numa
 %{_sbindir}/pcm-pcicfg
 %{_sbindir}/pcm-pcie

++++++ 202105.tar.gz -> 202107.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/.github/workflows/docker.yml 
new/pcm-202107/.github/workflows/docker.yml
--- old/pcm-202105/.github/workflows/docker.yml 1970-01-01 01:00:00.000000000 
+0100
+++ new/pcm-202107/.github/workflows/docker.yml 2021-07-24 13:12:11.000000000 
+0200
@@ -0,0 +1,49 @@
+name: Docker Build
+
+on:
+  push:
+    branches: 
+        - master
+
+jobs:
+  build:
+    runs-on: ubuntu-latest
+    steps:
+      - name: Get current time
+        uses: 1466587594/get-current-time@v2
+        id: current-time
+        with:
+          format: YYYY-MM-DD--HH
+
+      - name: Checkout code
+        uses: actions/checkout@v2
+
+      - name: Set up QEMU
+        uses: docker/setup-qemu-action@v1
+
+      - name: Set up Docker Buildx
+        uses: docker/setup-buildx-action@v1
+
+      - name: Cache Docker layers
+        uses: actions/cache@v2
+        with:
+          path: /tmp/.buildx-cache
+          key: ${{ runner.os }}-buildx-${{ github.sha }}
+          restore-keys: |
+            ${{ runner.os }}-buildx-
+
+      - name: Login to DockerHub
+        uses: docker/login-action@v1 
+        with:
+          username: ${{ secrets.DOCKERHUB_USERNAME }}
+          password: ${{ secrets.DOCKERHUB_TOKEN }}
+
+      - name: Build and push
+        uses: docker/build-push-action@v2
+        with:
+          platforms: linux/amd64
+          push: true
+          tags: |
+            opcm/pcm:latest
+          cache-from: type=local,src=/tmp/.buildx-cache
+          cache-to: type=local,dest=/tmp/.buildx-cache
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/Makefile new/pcm-202107/Makefile
--- old/pcm-202105/Makefile     2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/Makefile     2021-07-24 13:12:11.000000000 +0200
@@ -131,6 +131,7 @@
        install -m 755 pcm-lspci.x                ${prefix}/sbin/pcm-lspci
        install -m 755 pcm-memory.x               ${prefix}/sbin/pcm-memory
        install -m 755 pcm-msr.x                  ${prefix}/sbin/pcm-msr
+       install -m 755 pcm-mmio.x                 ${prefix}/sbin/pcm-mmio
        install -m 755 pcm-numa.x                 ${prefix}/sbin/pcm-numa
        install -m 755 pcm-pcicfg.x               ${prefix}/sbin/pcm-pcicfg
        install -m 755 pcm-pcie.x                 ${prefix}/sbin/pcm-pcie
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/README.md new/pcm-202107/README.md
--- old/pcm-202105/README.md    2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/README.md    2021-07-24 13:12:11.000000000 +0200
@@ -64,6 +64,7 @@
 
 - Linux:
   * openSUSE: `sudo zypper install pcm`
+  * Fedora: `sudo yum install pcm`
   * RPMs and DEBs with the *latest* PCM version for 
RHEL/SLE/Ubuntu/Debian/openSUSE/etc distributions (binary and source) are 
available 
[here](https://software.opensuse.org/download/package?package=pcm&project=home%3Aopcm)
 - Windows: download PCM binaries as [appveyor build 
service](https://ci.appveyor.com/project/opcm/pcm/history) artifacts and 
required Visual C++ Redistributable from 
[www.microsoft.com](https://www.microsoft.com/en-us/download/details.aspx?id=48145).
 Additional drivers are needed, see 
[WINDOWS_HOWTO.md](https://github.com/opcm/pcm/blob/master/WINDOWS_HOWTO.md).
 - Docker: see [instructions on how to use pcm-sensor-server pre-compiled 
container from docker 
hub](https://github.com/opcm/pcm/blob/master/DOCKER_README.md).
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/cpucounters.cpp 
new/pcm-202107/cpucounters.cpp
--- old/pcm-202105/cpucounters.cpp      2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/cpucounters.cpp      2021-07-24 13:12:11.000000000 +0200
@@ -216,7 +216,7 @@
 class TemporalThreadAffinity  // speedup trick for Linux, FreeBSD, 
DragonFlyBSD, Windows
 {
     TemporalThreadAffinity(); // forbiden
-#if defined(__linux__) || defined(__FreeBSD__) || (defined(__DragonFly__) && 
__DragonFly_version >= 400707)
+#if defined(__FreeBSD__) || (defined(__DragonFly__) && __DragonFly_version >= 
400707)
     cpu_set_t old_affinity;
 
 public:
@@ -239,6 +239,38 @@
         pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), 
&old_affinity);
     }
     bool supported() const { return true; }
+
+#elif defined(__linux__)
+    cpu_set_t * old_affinity;
+    static constexpr auto maxCPUs = 8192;
+    const size_t set_size;
+
+public:
+    TemporalThreadAffinity(const uint32 core_id, bool checkStatus = true)
+        : set_size(CPU_ALLOC_SIZE(maxCPUs))
+    {
+        old_affinity = CPU_ALLOC(maxCPUs);
+        assert(old_affinity);
+        pthread_getaffinity_np(pthread_self(), set_size, old_affinity);
+
+        cpu_set_t * new_affinity = CPU_ALLOC(maxCPUs);
+        assert(new_affinity);
+        CPU_ZERO_S(set_size, new_affinity);
+        CPU_SET_S(core_id, set_size, new_affinity);
+        const auto res = pthread_setaffinity_np(pthread_self(), set_size, 
new_affinity);
+        CPU_FREE(new_affinity);
+        if (res != 0 && checkStatus)
+        {
+            std::cerr << "ERROR: pthread_setaffinity_np for core " << core_id 
<< " failed with code " << res << "\n";
+            throw std::exception();
+        }
+    }
+    ~TemporalThreadAffinity()
+    {
+        pthread_setaffinity_np(pthread_self(), set_size, old_affinity);
+        CPU_FREE(old_affinity);
+    }
+    bool supported() const { return true; }
 #elif defined(_MSC_VER)
     ThreadGroupTempAffinity affinity;
 public:
@@ -1091,7 +1123,7 @@
 
     auto populateEntry = [&smtMaskWidth, &coreMaskWidth, 
&l2CacheMaskShift](TopologyEntry & entry, const int apic_id)
     {
-        entry.thread_id = extract_bits_ui(apic_id, 0, smtMaskWidth - 1);
+        entry.thread_id = smtMaskWidth ? extract_bits_ui(apic_id, 0, 
smtMaskWidth - 1) : 0;
         entry.core_id = extract_bits_ui(apic_id, smtMaskWidth, smtMaskWidth + 
coreMaskWidth - 1);
         entry.socket = extract_bits_ui(apic_id, smtMaskWidth + coreMaskWidth, 
31);
         entry.tile_id = extract_bits_ui(apic_id, l2CacheMaskShift, 31);
@@ -2214,6 +2246,7 @@
             || model_ == KBL_1
             || model_ == CML
             || model_ == ICL
+            || model_ == RKL
             || model_ == TGL
             || model_ == SKX
             || model_ == ICX
@@ -2910,6 +2943,7 @@
                                           std::make_pair(perfFrontEndPath, 
PERF_TOPDOWN_FRONTEND_POS),
                                           std::make_pair(perfRetiringPath, 
PERF_TOPDOWN_RETIRING_POS)};
             int readPos = core_fixed_counter_num_used + 
core_gen_counter_num_used;
+            leader_counter = -1;
             for (auto event : topDownEvents)
             {
                 uint64 eventSel = 0, umask = 0;
@@ -2934,6 +2968,7 @@
                 {
                     return PCM::UnknownError;
                 }
+                leader_counter = perfEventHandle[i][PERF_TOPDOWN_SLOTS_POS];
                 perfTopDownPos[event.second] = readPos++;
             }
         }
@@ -3407,7 +3442,13 @@
 
             if (event_select_reg.fields.event_select != 0 || 
event_select_reg.fields.apic_int != 0)
             {
-                std::cerr << "WARNING: Core " << i <<" IA32_PERFEVTSEL0_ADDR 
is not zeroed " << event_select_reg.value << "\n";
+                std::cerr << "WARNING: Core " << i <<" IA32_PERFEVTSEL" << j 
<< "_ADDR is not zeroed " << event_select_reg.value << "\n";
+
+                if (needToRestoreNMIWatchdog == true && 
event_select_reg.fields.event_select == 0x3C && event_select_reg.fields.umask 
== 0)
+                {
+                    // NMI watchdog did not clear its event, ignore it
+                    continue;
+                }
                 return true;
             }
         }
@@ -3423,7 +3464,10 @@
         if(ctrl_reg.fields.enable_pmi0 || ctrl_reg.fields.enable_pmi1 || 
ctrl_reg.fields.enable_pmi2)
         {
             std::cerr << "WARNING: Core " << i << " fixed ctrl:" << 
ctrl_reg.value << "\n";
-            return true;
+            if (needToRestoreNMIWatchdog == false) // if NMI watchdog did not 
clear the fields, ignore it
+            {
+                return true;
+            }
         }
         // either os=0,usr=0 (not running) or os=1,usr=1 (fits PCM modus) are 
ok, other combinations are not
         if(ctrl_reg.fields.os0 != ctrl_reg.fields.usr0 ||
@@ -3505,6 +3549,8 @@
             return "Comet Lake";
         case ICL:
             return "Icelake";
+        case RKL:
+            return "Rocket Lake";
         case TGL:
             return "Tiger Lake";
         case SKX:
@@ -3882,28 +3928,37 @@
 #ifdef PCM_USE_PERF
 void PCM::readPerfData(uint32 core, std::vector<uint64> & outData)
 {
-    if(perfEventHandle[core][PERF_GROUP_LEADER_COUNTER] < 0)
+    auto readPerfDataHelper = [this](const uint32 core, std::vector<uint64>& 
outData, const uint32 leader, const uint32 num_counters)
     {
-        std::fill(outData.begin(), outData.end(), 0);
-        return;
-    }
-    uint64 data[1 + PERF_MAX_COUNTERS];
-    const auto num_counters = core_fixed_counter_num_used + 
core_gen_counter_num_used +
-        ((isHWTMAL1Supported() && perfSupportsTopDown()) ? 
PERF_TOPDOWN_COUNTERS : 0);
-    const int32 bytes2read =  sizeof(uint64)*(1 + num_counters);
-    int result = ::read(perfEventHandle[core][PERF_GROUP_LEADER_COUNTER], 
data, bytes2read );
-    // data layout: nr counters; counter 0, counter 1, counter 2,...
-    if(result != bytes2read)
-    {
-       std::cerr << "Error while reading perf data. Result is " << result << 
"\n";
-       std::cerr << "Check if you run other competing Linux perf clients.\n";
-    } else if(data[0] != num_counters)
+        if (perfEventHandle[core][leader] < 0)
+        {
+            std::fill(outData.begin(), outData.end(), 0);
+            return;
+        }
+        uint64 data[1 + PERF_MAX_COUNTERS];
+        const int32 bytes2read = sizeof(uint64) * (1 + num_counters);
+        int result = ::read(perfEventHandle[core][leader], data, bytes2read);
+        // data layout: nr counters; counter 0, counter 1, counter 2,...
+        if (result != bytes2read)
+        {
+            std::cerr << "Error while reading perf data. Result is " << result 
<< "\n";
+            std::cerr << "Check if you run other competing Linux perf 
clients.\n";
+        }
+        else if (data[0] != num_counters)
+        {
+            std::cerr << "Number of counters read from perf is wrong. Elements 
read: " << data[0] << "\n";
+        }
+        else
+        {  // copy all counters, they start from position 1 in data
+            std::copy((data + 1), (data + 1) + data[0], outData.begin());
+        }
+    };
+    readPerfDataHelper(core, outData, PERF_GROUP_LEADER_COUNTER, 
core_fixed_counter_num_used + core_gen_counter_num_used);
+    if (isHWTMAL1Supported() && perfSupportsTopDown())
     {
-       std::cerr << "Number of counters read from perf is wrong. Elements 
read: " << data[0] << "\n";
-    }
-    else
-    {  // copy all counters, they start from position 1 in data
-       std::copy((data + 1), (data + 1) + data[0], outData.begin());
+        std::vector<uint64> outTopDownData(outData.size(), 0);
+        readPerfDataHelper(core, outTopDownData, 
PERF_TOPDOWN_GROUP_LEADER_COUNTER, PERF_TOPDOWN_COUNTERS);
+        std::copy(outTopDownData.begin(), outTopDownData.begin() + 
PERF_TOPDOWN_COUNTERS, outData.begin() + core_fixed_counter_num_used + 
core_gen_counter_num_used);
     }
 }
 #endif
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/cpucounters.h new/pcm-202107/cpucounters.h
--- old/pcm-202105/cpucounters.h        2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/cpucounters.h        2021-07-24 13:12:11.000000000 +0200
@@ -22,7 +22,7 @@
         Include this header file if you want to access CPU counters (core and 
uncore - including memory controller chips and QPI)
 */
 
-#define PCM_VERSION " (2021-05-15 17:52:05 +0200 ID=09bc9f2)"
+#define PCM_VERSION " (2021-07-24 13:12:11 +0200 ID=76247dc)"
 
 #ifndef PCM_API
 #define PCM_API
@@ -852,7 +852,8 @@
     std::unordered_map<int, int> perfTopDownPos;
 
     enum {
-        PERF_GROUP_LEADER_COUNTER = PERF_INST_RETIRED_POS
+        PERF_GROUP_LEADER_COUNTER = PERF_INST_RETIRED_POS,
+        PERF_TOPDOWN_GROUP_LEADER_COUNTER = PERF_TOPDOWN_SLOTS_POS
     };
 #endif
     std::ofstream * outfile;       // output file stream
@@ -1314,6 +1315,7 @@
         CML_1 = 165,
         ICL = 126,
         ICL_1 = 125,
+        RKL = 167,
         TGL = 140,
         TGL_1 = 141,
         BDX = 79,
@@ -1331,6 +1333,7 @@
         case PCM::KBL_1:   \
         case PCM::CML:     \
         case PCM::ICL:     \
+        case PCM::RKL:     \
         case PCM::TGL:     \
         case PCM::SKL:
 
@@ -1498,7 +1501,7 @@
     //! \return max number of instructions per cycle
     uint32 getMaxIPC() const
     {
-        if (ICL == cpu_model || TGL == cpu_model) return 5;
+        if (ICL == cpu_model || TGL == cpu_model || RKL == cpu_model) return 5;
         switch (cpu_model)
         {
         case SNOWRIDGE:
@@ -3042,7 +3045,8 @@
     \param after CPU counter state after the experiment
     \return IPC
 */
-inline double getCoreIPC(const SystemCounterState & before, const 
SystemCounterState & after) // instructions per cycle
+template <class CounterStateType>
+inline double getCoreIPC(const CounterStateType & before, const 
CounterStateType & after) // instructions per cycle
 {
     double ipc = getIPC(before, after);
     PCM * m = PCM::getInstance();
@@ -3051,7 +3055,6 @@
     return -1;
 }
 
-
 /*! \brief Computes average number of retired instructions per time intervall 
for the entire system combining instruction counts from logical cores to 
corresponding physical cores
 
         Use this metric to evaluate cores utilization improvement between 
SMT(Hyperthreading) on and SMT off.
@@ -3060,7 +3063,8 @@
     \param after CPU counter state after the experiment
     \return usage
 */
-inline double getTotalExecUsage(const SystemCounterState & before, const 
SystemCounterState & after) // usage
+template <class CounterStateType>
+inline double getTotalExecUsage(const CounterStateType & before, const 
CounterStateType & after) // usage
 {
     double usage = getExecUsage(before, after);
     PCM * m = PCM::getInstance();
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/fedora/pcm.spec 
new/pcm-202107/fedora/pcm.spec
--- old/pcm-202105/fedora/pcm.spec      2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/fedora/pcm.spec      2021-07-24 13:12:11.000000000 +0200
@@ -1,5 +1,5 @@
 Name:           pcm
-Version:        202104
+Version:        202105
 Release:        1%{?dist}
 Summary:        Processor Counter Monitor
 License:        BSD
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/opCode-106.txt 
new/pcm-202107/opCode-106.txt
--- old/pcm-202105/opCode-106.txt       2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/opCode-106.txt       2021-07-24 13:12:11.000000000 +0200
@@ -10,14 +10,14 @@
 
ctr=0,ev_sel=0x83,umask=0x4,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,divider=1,hname=IB
 read,vname=Part2 (2nd x8/3rd x4)
 
ctr=1,ev_sel=0x83,umask=0x4,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,divider=1,hname=IB
 read,vname=Part3 (4th x4)
 # Outbound (CPU MMIO to the PCIe device) payload events
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part0 (1st x16/x8/x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part1 (2nd x4)
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part2 (2nd x8/3rd x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part3 (4th x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part0 (1st x16/x8/x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part1 (2nd x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part2 (2nd x8/3rd x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part3 (4th x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part0 (1st x16/x8/x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part1 (2nd x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part2 (2nd x8/3rd x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part3 (4th x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part0 (1st x16/x8/x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part1 (2nd x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part2 (2nd x8/3rd x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part3 (4th x4)
 # IOMMU events
 
ctr=0,ev_sel=0x40,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,divider=1,hname=IOTLB
 Lookup,vname=Total
 
ctr=1,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,divider=1,hname=IOTLB
 Miss,vname=Total
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/opCode-134.txt 
new/pcm-202107/opCode-134.txt
--- old/pcm-202105/opCode-134.txt       2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/opCode-134.txt       2021-07-24 13:12:11.000000000 +0200
@@ -18,22 +18,22 @@
 
ctr=0,ev_sel=0x83,umask=0x4,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,divider=1,hname=IB
 read,vname=Part6 (2nd x8/3rd x4)
 
ctr=1,ev_sel=0x83,umask=0x4,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,divider=1,hname=IB
 read,vname=Part7 (4th x4)
 # Outbound (CPU MMIO to the PCIe device) payload events
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part0 (1st x16/x8/x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part1 (2nd x4)
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part2 (2nd x8/3rd x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part3 (4th x4)
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part4 (1st x16/x8/x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part5 (2nd x4)
-ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part6 (2nd x8/3rd x4)
-ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 read,vname=Part7 (4th x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part0 (1st x16/x8/x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part1 (2nd x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part2 (2nd x8/3rd x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part3 (4th x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part4 (1st x16/x8/x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part5 (2nd x4)
-ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part6 (2nd x8/3rd x4)
-ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=1,divider=1,hname=OB
 write,vname=Part7 (4th x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part0 (1st x16/x8/x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part1 (2nd x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part2 (2nd x8/3rd x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part3 (4th x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part4 (1st x16/x8/x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part5 (2nd x4)
+ctr=2,ev_sel=0x83,umask=0x80,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part6 (2nd x8/3rd x4)
+ctr=3,ev_sel=0x83,umask=0x80,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 read,vname=Part7 (4th x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=1,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part0 (1st x16/x8/x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=2,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part1 (2nd x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=4,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part2 (2nd x8/3rd x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=8,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part3 (4th x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=16,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part4 (1st x16/x8/x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=32,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part5 (2nd x4)
+ctr=2,ev_sel=0xc0,umask=0x1,en=1,ch_mask=64,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part6 (2nd x8/3rd x4)
+ctr=3,ev_sel=0xc0,umask=0x1,en=1,ch_mask=128,fc_mask=0x7,multiplier=4,divider=1,hname=OB
 write,vname=Part7 (4th x4)
 # IOMMU events
 
ctr=0,ev_sel=0x40,umask=0x02,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,divider=1,hname=IOTLB
 Lookup,vname=Total
 
ctr=1,ev_sel=0x40,umask=0x20,en=1,ch_mask=0x0,fc_mask=0x0,multiplier=1,divider=1,hname=IOTLB
 Miss,vname=Total
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/pcm-pcie.h new/pcm-202107/pcm-pcie.h
--- old/pcm-202105/pcm-pcie.h   2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/pcm-pcie.h   2021-07-24 13:12:11.000000000 +0200
@@ -654,12 +654,14 @@
 {
     uint64 event = 0;
     if(filter == HIT)
-        event = eventSample[socket][2 * idx + 1] -
-                eventSample[socket][2 * idx];
-        else if (filter == MISS)
-            event = eventSample[socket][2 * idx];
-        else if (filter == TOTAL)
-            event = eventSample[socket][2 * idx + 1];
+        if (eventSample[socket][2 * idx] < eventSample[socket][2 * idx + 1])
+            event = eventSample[socket][2 * idx + 1] - eventSample[socket][2 * 
idx];
+        else
+            event = 0;
+    else if (filter == MISS)
+        event = eventSample[socket][2 * idx];
+    else if (filter == TOTAL)
+        event = eventSample[socket][2 * idx + 1];
 
     return event;
 }
@@ -761,13 +763,14 @@
 {
     uint64 event = 0;
     if(filter == HIT)
-        event = eventSample[socket][2 * idx + 1] -
-                eventSample[socket][2 * idx];
-        else if (filter == MISS)
-            event = eventSample[socket][2 * idx];
-        else if (filter == TOTAL)
-            event = eventSample[socket][2 * idx + 1];
-
+        if (eventSample[socket][2 * idx] < eventSample[socket][2 * idx + 1])
+            event = eventSample[socket][2 * idx + 1] - eventSample[socket][2 * 
idx];
+        else
+            event = 0;
+    else if (filter == MISS)
+        event = eventSample[socket][2 * idx];
+    else if (filter == TOTAL)
+        event = eventSample[socket][2 * idx + 1];
 
     return event;
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/pcm-tsx.cpp new/pcm-202107/pcm-tsx.cpp
--- old/pcm-202105/pcm-tsx.cpp  2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/pcm-tsx.cpp  2021-07-24 13:12:11.000000000 +0200
@@ -297,6 +297,7 @@
         break;
     case PCM::ICL:
     case PCM::ICX:
+    case PCM::RKL:
         eventDefinition = iclEventDefinition;
         break;
     }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/pcm.cpp new/pcm-202107/pcm.cpp
--- old/pcm-202105/pcm.cpp      2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/pcm.cpp      2021-07-24 13:12:11.000000000 +0200
@@ -619,6 +619,7 @@
                 print_csv_header_helper(header,2);
             if (m->MCDRAMmemoryTrafficMetricsAvailable())
                 print_csv_header_helper(header,2);
+            print_csv_header_helper(header,7); 
//ACYC,TIME(ticks),PhysIPC,PhysIPC%,INSTnom,INSTnom%,
         }
 
         if (m->getNumSockets() > 1 && 
(m->incomingQPITrafficMetricsAvailable())) // QPI info only for multi socket 
systems
@@ -702,6 +703,7 @@
                 if (m->isCoreCStateResidencySupported(s))
                     print_csv_header_helper(header);
             print_csv_header_helper(header);// TEMP
+            print_csv_header_helper(header,7); 
//ACYC,TIME(ticks),PhysIPC,PhysIPC%,INSTnom,INSTnom%,
         }
     }
 
@@ -768,6 +770,7 @@
              if (m->MCDRAMmemoryTrafficMetricsAvailable())
                  cout << "MCDRAM_READ,MCDRAM_WRITE,";
              cout << "TEMP,";
+             cout << 
"INST,ACYC,TIME(ticks),PhysIPC,PhysIPC%,INSTnom,INSTnom%,";
         }
 
         if (m->getNumSockets() > 1 && 
(m->incomingQPITrafficMetricsAvailable())) // QPI info only for multi socket 
systems
@@ -845,6 +848,7 @@
                     cout << "C" << s << "res%,";
 
             cout << "TEMP,";
+            cout << "INST,ACYC,TIME(ticks),PhysIPC,PhysIPC%,INSTnom,INSTnom%,";
         }
     }
 }
@@ -993,6 +997,16 @@
                 cout << ',' << getBytesReadFromEDC(sktstate1[i], sktstate2[i]) 
/ double(1e9) <<
                 ',' << getBytesWrittenToEDC(sktstate1[i], sktstate2[i]) / 
double(1e9);
             cout << ',' << temp_format(sktstate2[i].getThermalHeadroom()) << 
',';
+
+            cout << float_format(getInstructionsRetired(sktstate1[i], 
sktstate2[i])) << ","
+                << float_format(getCycles(sktstate1[i], sktstate2[i])) << ","
+                // FIXME: Wrong counters
+                << float_format(getInvariantTSC(cstates1[0], cstates2[0])) << 
","
+                << getCoreIPC(sktstate1[i], sktstate2[i]) << ","
+                << 100. * (getCoreIPC(sktstate1[i], sktstate2[i]) / 
double(m->getMaxIPC())) << ","
+                << getTotalExecUsage(sktstate1[i], sktstate2[i]) << ","
+                << 100. * (getTotalExecUsage(sktstate1[i], sktstate2[i]) / 
double(m->getMaxIPC())) << ",";
+
         }
 
         if (m->getNumSockets() > 1 && 
(m->incomingQPITrafficMetricsAvailable())) // QPI info only for multi socket 
systems
@@ -1068,6 +1082,15 @@
                     cout << getCoreCStateResidency(s, cstates1[i], 
cstates2[i]) * 100 << ",";
 
             cout << temp_format(cstates2[i].getThermalHeadroom()) << ',';
+
+            cout << float_format(getInstructionsRetired(cstates1[i], 
cstates2[i])) << ","
+                << float_format(getCycles(cstates1[i], cstates2[i])) << ","
+                // FIXME: Wrong counters
+                << float_format(getInvariantTSC(cstates1[0], cstates2[0])) << 
","
+                << getCoreIPC(cstates1[i], cstates2[i]) << ","
+                << 100. * (getCoreIPC(cstates1[i], cstates2[i]) / 
double(m->getMaxIPC())) << ","
+                << getTotalExecUsage(cstates1[i], cstates2[i]) << ","
+                << 100. * (getTotalExecUsage(cstates1[i], cstates2[i]) / 
double(m->getMaxIPC())) << ",";
         }
     }
 }
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/pcm-202105/pcm.spec new/pcm-202107/pcm.spec
--- old/pcm-202105/pcm.spec     2021-05-15 17:52:05.000000000 +0200
+++ new/pcm-202107/pcm.spec     2021-07-24 13:12:11.000000000 +0200
@@ -43,6 +43,7 @@
 %{_sbindir}/pcm-lspci
 %{_sbindir}/pcm-memory
 %{_sbindir}/pcm-msr
+%{_sbindir}/pcm-mmio
 %{_sbindir}/pcm-numa
 %{_sbindir}/pcm-pcicfg
 %{_sbindir}/pcm-pcie

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