Script 'mail_helper' called by obssrc Hello community, here is the log from the commit of package mcelog for openSUSE:Factory checked in at 2022-05-05 23:04:30 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/mcelog (Old) and /work/SRC/openSUSE:Factory/.mcelog.new.1538 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "mcelog" Thu May 5 23:04:30 2022 rev:61 rq:974671 version:181 Changes: -------- --- /work/SRC/openSUSE:Factory/mcelog/mcelog.changes 2021-09-03 21:25:35.378139024 +0200 +++ /work/SRC/openSUSE:Factory/.mcelog.new.1538/mcelog.changes 2022-05-05 23:04:31.541417417 +0200 @@ -1,0 +2,35 @@ +Tue May 03 11:32:42 UTC 2022 - [email protected] + +- Update to version 181: + * mcelog: Add support for Raptorlake +- Adopt patches to latest git version +M Start-consolidating-AMD-specific-stuff.patch +M add-f10h-support.patch +M add-f11h-support.patch +M add-f12h-support.patch +M add-f14h-support.patch +M add-f15h-support.patch +M add-f16h-support.patch +M email.patch +M fix_setgroups_missing_call.patch +M mcelog_invert_prefill_db_warning.patch +- Use Python3 shebang instead of python +A python3_shebang +- Use Github URL + +------------------------------------------------------------------- +Wed Apr 13 12:44:57 UTC 2022 - [email protected] + +- Update to version 180: + * Fix warnings in sysfs.c + * mcelog: Change "DDR4" string to "DDR" for i10nm platforms + * Fix logrotate syntax + * remove outdated mcelog.conf.5 manual file + * add furture print function for Python2 + * fix python errors in genconfig.py + * fix the buf not freed in read_field + * mcelog: Print warning for locked down kernel + * mcelog: Handle sysfs files without length + * Fix make test fail + +------------------------------------------------------------------- Old: ---- mcelog-178.obscpio New: ---- mcelog-181.obscpio python3_shebang ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ mcelog.spec ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.593418730 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.597418735 +0200 @@ -1,7 +1,7 @@ # # spec file for package mcelog # -# Copyright (c) 2021 SUSE LLC +# Copyright (c) 2022 SUSE LLC # # All modifications and additions to the file contributed by third parties # remain the property of their copyright owners, unless otherwise agreed @@ -21,7 +21,7 @@ %define _fillupdir %{_localstatedir}/adm/fillup-templates %endif Name: mcelog -Version: 178 +Version: 181 Release: 0 Summary: Log Machine Check Events License: GPL-2.0-only @@ -44,6 +44,8 @@ Patch10: patches/add-f16h-support.patch Patch11: mcelog-socket-path.patch Patch12: fix_setgroups_missing_call.patch +Patch13: python3_shebang +BuildRequires: %{pythons} BuildRequires: libesmtp-devel BuildRequires: pkgconfig BuildRequires: pkgconfig(systemd) ++++++ Start-consolidating-AMD-specific-stuff.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.649418800 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.653418805 +0200 @@ -18,9 +18,11 @@ rename k8.c => amd.c (97%) rename k8.h => amd.h (79%) ---- a/Makefile -+++ b/Makefile -@@ -31,7 +31,7 @@ +Index: mcelog-181/Makefile +=================================================================== +--- mcelog-181.orig/Makefile ++++ mcelog-181/Makefile +@@ -31,7 +31,7 @@ all: mcelog .PHONY: install clean depend FORCE @@ -29,8 +31,10 @@ nehalem.o dunnington.o tulsa.o config.o memutil.o msg.o \ eventloop.o leaky-bucket.o memdb.o server.o trigger.o \ client.o cache.o sysfs.o yellow.o page.o rbtree.o \ +Index: mcelog-181/amd.c +=================================================================== --- /dev/null -+++ b/amd.c ++++ mcelog-181/amd.c @@ -0,0 +1,282 @@ +/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and + * Eric Morton. Hacked and extended for mcelog by AK. @@ -314,8 +318,10 @@ + } + return 1; +} +Index: mcelog-181/amd.h +=================================================================== --- /dev/null -+++ b/amd.h ++++ mcelog-181/amd.h @@ -0,0 +1,14 @@ +char *k8_bank_name(unsigned num); +void decode_amd_mc(enum cputype, struct mce *mce, int *ismemerr); @@ -331,7 +337,9 @@ + +#define CASE_AMD_CPUS \ + case CPU_K8 ---- a/k8.c +Index: mcelog-181/k8.c +=================================================================== +--- mcelog-181.orig/k8.c +++ /dev/null @@ -1,281 +0,0 @@ -/* Based on K8 decoding code written for the 2.4 kernel by Andi Kleen and @@ -615,7 +623,9 @@ - } - return 1; -} ---- a/k8.h +Index: mcelog-181/k8.h +=================================================================== +--- mcelog-181.orig/k8.h +++ /dev/null @@ -1,11 +0,0 @@ -char *k8_bank_name(unsigned num); @@ -629,8 +639,10 @@ -#define K8_MCELOG_THRESHOLD_LINK (4 * 9 + 1) -#define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2) -#define K8_MCELOG_THRESHOLD_FBDIMM (4 * 9 + 3) ---- a/mcelog.c -+++ b/mcelog.c +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c @@ -41,7 +41,7 @@ #include <fnmatch.h> #include "mcelog.h" @@ -640,7 +652,7 @@ #include "intel.h" #include "p4.h" #include "dmi.h" -@@ -451,9 +451,9 @@ +@@ -453,9 +453,9 @@ static void dump_mce(struct mce *m, unsi time_t t = m->time; Wprintf("TIME %llu %s", m->time, ctime(&t)); } ++++++ _service ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.673418830 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.677418835 +0200 @@ -1,7 +1,7 @@ <services> <service name="obs_scm" mode="localonly"> <param name="scm">git</param> - <param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param> + <param name="url">https://github.com/andikleen/mcelog.git</param> <param name="changesgenerate">enable</param> <param name="versionrewrite-pattern">v(.*)</param> <param name="versionformat">@PARENT_TAG@</param> ++++++ _servicedata ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.697418860 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.697418860 +0200 @@ -3,6 +3,8 @@ <param name="url">https://github.com/andikleen/mcelog</param> <param name="changesrevision">ee90ff20ce6a4d5e016aa249ce8b37f359f9fda4</param></service><service name="tar_scm"> <param name="url">git://git.kernel.org/pub/scm/utils/cpu/mce/mcelog.git</param> - <param name="changesrevision">c133a744e9ee6a2f40cbec4cfb0182d3ed1a792a</param></service></servicedata> + <param name="changesrevision">a4edca25ef3bd8780ae1dc54bc203973ec7f1640</param></service><service name="tar_scm"> + <param name="url">https://github.com/andikleen/mcelog.git</param> + <param name="changesrevision">a4edca25ef3bd8780ae1dc54bc203973ec7f1640</param></service></servicedata> (No newline at EOF) ++++++ add-f10h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.713418880 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.717418885 +0200 @@ -8,8 +8,10 @@ mcelog.h | 1 4 files changed, 506 insertions(+), 51 deletions(-) ---- a/amd.c -+++ b/amd.c +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c @@ -14,7 +14,7 @@ #include "mcelog.h" #include "amd.h" @@ -19,7 +21,7 @@ "data cache", "instruction cache", "bus unit", -@@ -22,28 +22,34 @@ +@@ -22,28 +22,34 @@ static char *k8bank[] = { "northbridge", "fixed-issue reoder" }; @@ -63,7 +65,7 @@ static char *nbextendederr[] = { "RAM ECC error", "CRC error", -@@ -65,6 +71,46 @@ +@@ -65,6 +71,46 @@ static char *nbextendederr[] = { "L3 Cache Tag Error", "L3 Cache LRU Error" }; @@ -110,7 +112,7 @@ static char *highbits[32] = { [31] = "valid", [30] = "error overflow (multiple errors)", -@@ -100,6 +146,21 @@ +@@ -100,6 +146,21 @@ static char *k8threshold[] = { "Unknown threshold counter", }; @@ -132,7 +134,7 @@ static void decode_k8_generic_errcode(u64 status) { -@@ -245,21 +306,393 @@ +@@ -245,21 +306,393 @@ static decoder_t decoders[] = { [5] = decode_k8_fr_mc, }; @@ -534,7 +536,7 @@ if (num < NELE(k8bank)) s = k8bank[num]; else if (num >= K8_MCE_THRESHOLD_BASE && -@@ -270,13 +703,16 @@ +@@ -270,13 +703,16 @@ char *k8_bank_name(unsigned num) return buf; } @@ -559,8 +561,10 @@ + } + return 1; } ---- a/amd.h -+++ b/amd.h +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h @@ -1,6 +1,25 @@ +#include <stdbool.h> + @@ -588,7 +592,7 @@ #define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */ #define K8_MCE_THRESHOLD_TOP (K8_MCE_THRESHOLD_BASE + 6 * 9) -@@ -10,6 +29,8 @@ +@@ -10,6 +29,8 @@ int mce_filter_k8(struct mce *m); #define K8_MCELOG_THRESHOLD_L3_CACHE (4 * 9 + 2) #define K8_MCELOG_THRESHOLD_FBDIMM (4 * 9 + 3) @@ -597,7 +601,7 @@ #define EC(x) ((x) & 0xffff) #define XEC(x, mask) (((x) >> 16) & mask) -@@ -22,23 +43,20 @@ +@@ -22,23 +43,20 @@ int mce_filter_k8(struct mce *m); #define INT_ERROR(x) (((x) & 0xF4FF) == 0x0400) #define TT(x) (((x) >> 2) & 0x3) @@ -627,7 +631,7 @@ enum tt_ids { TT_INSTR = 0, -@@ -72,3 +90,7 @@ +@@ -72,3 +90,7 @@ enum rrrr_ids { R4_EVICT, R4_SNOOP, }; @@ -635,9 +639,11 @@ +#define CASE_AMD_CPUS \ + case CPU_K8: \ + case CPU_F10H ---- a/mcelog.c -+++ b/mcelog.c -@@ -148,19 +148,20 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -148,19 +148,20 @@ static void resolveaddr(unsigned long lo static int mce_filter(struct mce *m, unsigned recordlen) { @@ -662,7 +668,7 @@ } static void print_tsc(int cpunum, __u64 tsc, unsigned long time) -@@ -228,6 +229,7 @@ +@@ -228,6 +229,7 @@ static char *cputype_name[] = { [CPU_P6OLD] = "Intel PPro/P2/P3/old Xeon", [CPU_CORE2] = "Intel Core", /* 65nm and 45nm */ [CPU_K8] = "AMD K8 and derivates", @@ -670,7 +676,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -267,6 +269,7 @@ +@@ -268,6 +270,7 @@ static struct config_choice cpu_choices[ { "p6old", CPU_P6OLD }, { "core2", CPU_CORE2 }, { "k8", CPU_K8 }, @@ -678,7 +684,7 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, -@@ -388,9 +391,7 @@ +@@ -390,9 +393,7 @@ static enum cputype setup_cpuid(u32 cpuv case X86_VENDOR_INTEL: return select_intel_cputype(family, model); case X86_VENDOR_AMD: @@ -689,7 +695,7 @@ default: Eprintf("Unknown CPU type vendor %u family %u model %u", cpuvendor, family, model); -@@ -579,14 +580,9 @@ +@@ -581,14 +582,9 @@ int is_cpu_supported(void) } if (seen == ALL) { @@ -707,9 +713,11 @@ Eprintf("ERROR: Hygon Processor family %d: mcelog does not support this processor. Please use the edac_mce_amd module instead.\n", family); return 0; } else if (!strcmp(vendor,"GenuineIntel")) ---- a/mcelog.h -+++ b/mcelog.h -@@ -119,6 +119,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -119,6 +119,7 @@ enum cputype { CPU_P6OLD, CPU_CORE2, /* 65nm and 45nm */ CPU_K8, ++++++ add-f11h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.729418900 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.729418900 +0200 @@ -8,9 +8,11 @@ mcelog.h | 1 + 4 files changed, 26 insertions(+), 1 deletion(-) ---- a/amd.c -+++ b/amd.c -@@ -155,6 +155,8 @@ +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c +@@ -155,6 +155,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_K8; case 0x10: return CPU_F10H; @@ -19,7 +21,7 @@ default: break; } -@@ -367,6 +369,16 @@ +@@ -367,6 +369,16 @@ static bool f10h_mc0_mce(u16 ec, u8 xec) return f12h_mc0_mce(ec, xec); } @@ -36,7 +38,7 @@ static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -630,6 +642,12 @@ +@@ -630,6 +642,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = k8_mc1_mce, .mc2_mce = k8_mc2_mce, }, @@ -49,7 +51,7 @@ }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) -@@ -640,6 +658,9 @@ +@@ -640,6 +658,9 @@ static void __decode_amd_mc(enum cputype case CPU_F10H: ops = &fam_ops[AMD_F10H]; break; @@ -59,18 +61,22 @@ default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; ---- a/amd.h -+++ b/amd.h -@@ -93,4 +93,5 @@ +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h +@@ -93,4 +93,5 @@ enum rrrr_ids { #define CASE_AMD_CPUS \ case CPU_K8: \ - case CPU_F10H + case CPU_F10H: \ + case CPU_F11H ---- a/mcelog.c -+++ b/mcelog.c -@@ -230,6 +230,7 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -230,6 +230,7 @@ static char *cputype_name[] = { [CPU_CORE2] = "Intel Core", /* 65nm and 45nm */ [CPU_K8] = "AMD K8 and derivates", [CPU_F10H] = "AMD Greyhound", @@ -78,7 +84,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -270,6 +271,7 @@ +@@ -271,6 +272,7 @@ static struct config_choice cpu_choices[ { "core2", CPU_CORE2 }, { "k8", CPU_K8 }, { "f10h", CPU_F10H }, @@ -86,9 +92,11 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, ---- a/mcelog.h -+++ b/mcelog.h -@@ -120,6 +120,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -120,6 +120,7 @@ enum cputype { CPU_CORE2, /* 65nm and 45nm */ CPU_K8, CPU_F10H, ++++++ add-f12h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.741418915 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.745418920 +0200 @@ -8,9 +8,11 @@ mcelog.h | 1 + 4 files changed, 17 insertions(+), 1 deletion(-) ---- a/amd.c -+++ b/amd.c -@@ -157,6 +157,8 @@ +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c +@@ -157,6 +157,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_F10H; case 0x11: return CPU_F11H; @@ -19,7 +21,7 @@ default: break; } -@@ -648,6 +650,12 @@ +@@ -648,6 +650,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = k8_mc1_mce, .mc2_mce = k8_mc2_mce, }, @@ -32,7 +34,7 @@ }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) -@@ -661,6 +669,9 @@ +@@ -661,6 +669,9 @@ static void __decode_amd_mc(enum cputype case CPU_F11H: ops = &fam_ops[AMD_F11H]; break; @@ -42,9 +44,11 @@ default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; ---- a/amd.h -+++ b/amd.h -@@ -9,6 +9,7 @@ +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h +@@ -9,6 +9,7 @@ enum amdcpu { AMD_K8 = 0, AMD_F10H, AMD_F11H, @@ -52,16 +56,18 @@ AMD_F14H, AMD_F15H, AMD_F16H, -@@ -94,4 +95,5 @@ +@@ -94,4 +95,5 @@ enum rrrr_ids { #define CASE_AMD_CPUS \ case CPU_K8: \ case CPU_F10H: \ - case CPU_F11H + case CPU_F11H: \ + case CPU_F12H ---- a/mcelog.c -+++ b/mcelog.c -@@ -231,6 +231,7 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -231,6 +231,7 @@ static char *cputype_name[] = { [CPU_K8] = "AMD K8 and derivates", [CPU_F10H] = "AMD Greyhound", [CPU_F11H] = "AMD Griffin", @@ -69,7 +75,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -272,6 +273,7 @@ +@@ -273,6 +274,7 @@ static struct config_choice cpu_choices[ { "k8", CPU_K8 }, { "f10h", CPU_F10H }, { "f11h", CPU_F11H }, @@ -77,9 +83,11 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, ---- a/mcelog.h -+++ b/mcelog.h -@@ -121,6 +121,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -121,6 +121,7 @@ enum cputype { CPU_K8, CPU_F10H, CPU_F11H, ++++++ add-f14h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.757418935 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.761418940 +0200 @@ -8,9 +8,11 @@ mcelog.h | 1 4 files changed, 93 insertions(+), 1 deletion(-) ---- a/amd.c -+++ b/amd.c -@@ -159,6 +159,8 @@ +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c +@@ -159,6 +159,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_F11H; case 0x12: return CPU_F12H; @@ -19,7 +21,7 @@ default: break; } -@@ -381,6 +383,58 @@ +@@ -381,6 +383,58 @@ static bool k8_mc0_mce(u16 ec, u8 xec) return f10h_mc0_mce(ec, xec); } @@ -78,7 +80,7 @@ static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -402,6 +456,31 @@ +@@ -402,6 +456,31 @@ static void decode_mc0_mce(struct amd_de Eprintf("Corrupted MC0 MCE info?\n"); } @@ -110,7 +112,7 @@ static void decode_mc1_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -656,6 +735,12 @@ +@@ -656,6 +735,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = k8_mc1_mce, .mc2_mce = k8_mc2_mce, }, @@ -123,7 +125,7 @@ }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) -@@ -672,6 +757,9 @@ +@@ -672,6 +757,9 @@ static void __decode_amd_mc(enum cputype case CPU_F12H: ops = &fam_ops[AMD_F12H]; break; @@ -133,18 +135,22 @@ default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; ---- a/amd.h -+++ b/amd.h -@@ -96,4 +96,5 @@ +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h +@@ -96,4 +96,5 @@ enum rrrr_ids { case CPU_K8: \ case CPU_F10H: \ case CPU_F11H: \ - case CPU_F12H + case CPU_F12H: \ + case CPU_F14H ---- a/mcelog.c -+++ b/mcelog.c -@@ -232,6 +232,7 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -232,6 +232,7 @@ static char *cputype_name[] = { [CPU_F10H] = "AMD Greyhound", [CPU_F11H] = "AMD Griffin", [CPU_F12H] = "AMD Llano", @@ -152,7 +158,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -274,6 +275,7 @@ +@@ -275,6 +276,7 @@ static struct config_choice cpu_choices[ { "f10h", CPU_F10H }, { "f11h", CPU_F11H }, { "f12h", CPU_F12H }, @@ -160,9 +166,11 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, ---- a/mcelog.h -+++ b/mcelog.h -@@ -122,6 +122,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -122,6 +122,7 @@ enum cputype { CPU_F10H, CPU_F11H, CPU_F12H, ++++++ add-f15h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.769418950 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.773418955 +0200 @@ -8,9 +8,11 @@ mcelog.h | 1 4 files changed, 165 insertions(+), 1 deletion(-) ---- a/amd.c -+++ b/amd.c -@@ -72,6 +72,43 @@ +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c +@@ -72,6 +72,43 @@ static char *nbextendederr[] = { "L3 Cache LRU Error" }; @@ -54,7 +56,7 @@ static const char * const mc4_mce_desc[] = { "DRAM ECC error detected on the NB", "CRC error detected on HT link", -@@ -161,6 +198,8 @@ +@@ -161,6 +198,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_F12H; case 0x14: return CPU_F14H; @@ -63,7 +65,7 @@ default: break; } -@@ -435,6 +474,53 @@ +@@ -435,6 +474,53 @@ static bool cat_mc0_mce(u16 ec, u8 xec) return ret; } @@ -117,7 +119,7 @@ static void decode_mc0_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -481,6 +567,36 @@ +@@ -481,6 +567,36 @@ static bool cat_mc1_mce(u16 ec, u8 xec) return ret; } @@ -154,7 +156,7 @@ static void decode_mc1_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -537,6 +653,40 @@ +@@ -537,6 +653,40 @@ static bool k8_mc2_mce(u16 ec, u8 xec) return ret; } @@ -195,7 +197,7 @@ static void decode_mc2_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -741,6 +891,12 @@ +@@ -741,6 +891,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = cat_mc1_mce, .mc2_mce = k8_mc2_mce, }, @@ -208,7 +210,7 @@ }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) -@@ -760,6 +916,10 @@ +@@ -760,6 +916,10 @@ static void __decode_amd_mc(enum cputype case CPU_F14H: ops = &fam_ops[AMD_F14H]; break; @@ -219,18 +221,22 @@ default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; ---- a/amd.h -+++ b/amd.h -@@ -97,4 +97,5 @@ +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h +@@ -97,4 +97,5 @@ enum rrrr_ids { case CPU_F10H: \ case CPU_F11H: \ case CPU_F12H: \ - case CPU_F14H + case CPU_F14H: \ + case CPU_F15H ---- a/mcelog.c -+++ b/mcelog.c -@@ -233,6 +233,7 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -233,6 +233,7 @@ static char *cputype_name[] = { [CPU_F11H] = "AMD Griffin", [CPU_F12H] = "AMD Llano", [CPU_F14H] = "AMD Bobcat", @@ -238,7 +244,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -276,6 +277,7 @@ +@@ -277,6 +278,7 @@ static struct config_choice cpu_choices[ { "f11h", CPU_F11H }, { "f12h", CPU_F12H }, { "f14h", CPU_F14H }, @@ -246,9 +252,11 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, ---- a/mcelog.h -+++ b/mcelog.h -@@ -123,6 +123,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -123,6 +123,7 @@ enum cputype { CPU_F11H, CPU_F12H, CPU_F14H, ++++++ add-f16h-support.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.781418965 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.785418970 +0200 @@ -8,9 +8,11 @@ mcelog.h | 1 + 4 files changed, 58 insertions(+), 1 deletion(-) ---- a/amd.c -+++ b/amd.c -@@ -200,6 +200,8 @@ +Index: mcelog-181/amd.c +=================================================================== +--- mcelog-181.orig/amd.c ++++ mcelog-181/amd.c +@@ -200,6 +200,8 @@ enum cputype select_amd_cputype(u32 fami return CPU_F14H; case 0x15: return CPU_F15H; @@ -19,7 +21,7 @@ default: break; } -@@ -687,6 +689,47 @@ +@@ -687,6 +689,47 @@ static bool f15h_mc2_mce(u16 ec, u8 xec) return ret; } @@ -67,7 +69,7 @@ static void decode_mc2_mce(struct amd_decoder_ops *ops, struct mce *m) { u16 ec = EC(m->status); -@@ -897,6 +940,12 @@ +@@ -897,6 +940,12 @@ struct amd_decoder_ops fam_ops[] = { .mc1_mce = f15h_mc1_mce, .mc2_mce = f15h_mc2_mce, }, @@ -80,7 +82,7 @@ }; static void __decode_amd_mc(enum cputype cpu, struct mce *mce) -@@ -920,6 +969,10 @@ +@@ -920,6 +969,10 @@ static void __decode_amd_mc(enum cputype xec_mask = 0x1f; ops = &fam_ops[AMD_F15H]; break; @@ -91,18 +93,22 @@ default: Eprintf("Huh? What family is it: 0x%x?!\n", cpu); return; ---- a/amd.h -+++ b/amd.h -@@ -98,4 +98,5 @@ +Index: mcelog-181/amd.h +=================================================================== +--- mcelog-181.orig/amd.h ++++ mcelog-181/amd.h +@@ -98,4 +98,5 @@ enum rrrr_ids { case CPU_F11H: \ case CPU_F12H: \ case CPU_F14H: \ - case CPU_F15H + case CPU_F15H: \ + case CPU_F16H ---- a/mcelog.c -+++ b/mcelog.c -@@ -234,6 +234,7 @@ +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c +@@ -234,6 +234,7 @@ static char *cputype_name[] = { [CPU_F12H] = "AMD Llano", [CPU_F14H] = "AMD Bobcat", [CPU_F15H] = "AMD Bulldozer", @@ -110,7 +116,7 @@ [CPU_P4] = "Intel P4", [CPU_NEHALEM] = "Intel Xeon 5500 series / Core i3/5/7 (\"Nehalem/Westmere\")", [CPU_DUNNINGTON] = "Intel Xeon 7400 series", -@@ -278,6 +279,7 @@ +@@ -279,6 +280,7 @@ static struct config_choice cpu_choices[ { "f12h", CPU_F12H }, { "f14h", CPU_F14H }, { "f15h", CPU_F15H }, @@ -118,9 +124,11 @@ { "p4", CPU_P4 }, { "dunnington", CPU_DUNNINGTON }, { "xeon74xx", CPU_DUNNINGTON }, ---- a/mcelog.h -+++ b/mcelog.h -@@ -124,6 +124,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -124,6 +124,7 @@ enum cputype { CPU_F12H, CPU_F14H, CPU_F15H, ++++++ email.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.793418980 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.797418985 +0200 @@ -7,14 +7,16 @@ msg.c | 8 ++ 6 files changed, 346 insertions(+), 3 deletions(-) ---- a/Makefile -+++ b/Makefile +Index: mcelog-181/Makefile +=================================================================== +--- mcelog-181.orig/Makefile ++++ mcelog-181/Makefile @@ -1,3 +1,4 @@ +CONFIG_EMAIL := 1 CFLAGS := -g -Os prefix := /usr etcprefix := -@@ -38,15 +39,23 @@ +@@ -38,15 +39,23 @@ OBJ := p4.o k8.o mcelog.o dmi.o tsc.o co broadwell_de.o broadwell_epex.o skylake_xeon.o \ denverton.o i10nm.o \ msr.o bus.o unknown.o @@ -39,7 +41,7 @@ # dbquery intentionally not installed by default install: mcelog mcelog.conf mcelog.conf.5 mcelog.triggers.5 -@@ -81,7 +90,7 @@ +@@ -81,7 +90,7 @@ dbquery: db.o dbquery.o memutil.o depend: .depend %.o: %.c @@ -48,8 +50,10 @@ version.tmp: FORCE ( printf "char version[] = \"" ; \ +Index: mcelog-181/email.c +=================================================================== --- /dev/null -+++ b/email.c ++++ mcelog-181/email.c @@ -0,0 +1,200 @@ +#include <unistd.h> +#include <signal.h> @@ -251,8 +255,10 @@ + smtp_destroy_session (session); + return 0; +} +Index: mcelog-181/email.h +=================================================================== --- /dev/null -+++ b/email.h ++++ mcelog-181/email.h @@ -0,0 +1,34 @@ +#ifndef _MCELOG_EMAIL_H_ +#define _MCELOG_EMAIL_H_ @@ -288,8 +294,10 @@ +#endif + +#endif ---- a/mcelog.c -+++ b/mcelog.c +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c @@ -37,6 +37,7 @@ #include <assert.h> #include <signal.h> @@ -308,7 +316,7 @@ enum cputype cputype = CPU_GENERIC; char *logfn = LOG_DEV_FILENAME; -@@ -71,7 +75,7 @@ +@@ -71,7 +75,7 @@ static double cpumhz; static int cpumhz_forced; int ascii_mode; int dump_raw_ascii; @@ -317,7 +325,7 @@ static char *inputfile; char *processor_flags; static int foreground; -@@ -1022,6 +1026,7 @@ +@@ -1024,6 +1028,7 @@ void usage(void) "--max-corr-err-counters Max page correctable error counters\n" "--help Display this message.\n" ); @@ -325,7 +333,7 @@ printf("\n"); print_cputypes(); } -@@ -1093,6 +1098,7 @@ +@@ -1095,6 +1100,7 @@ static struct option options[] = { { "max-corr-err-counters", 1, NULL, O_MAX_CORR_ERR_COUNTERS }, { "help", 0, NULL, O_HELP }, { "is-cpu-supported", 0, NULL, O_IS_CPU_SUPPORTED }, @@ -333,7 +341,7 @@ {} }; -@@ -1287,11 +1293,86 @@ +@@ -1289,11 +1295,86 @@ static void drop_cred(void) } } @@ -420,7 +428,7 @@ if (recordlen == 0) { Wprintf("no data in mce record\n"); -@@ -1318,12 +1399,16 @@ +@@ -1320,12 +1401,16 @@ static void process(int fd, unsigned rec finish = 1; if (!mce_filter(mce, recordlen)) continue; @@ -437,7 +445,7 @@ flushlog(); } -@@ -1437,6 +1522,8 @@ +@@ -1439,6 +1524,8 @@ int main(int ac, char **av) noargs(ac, av); fprintf(stderr, "mcelog %s\n", MCELOG_VERSION); exit(0); @@ -446,7 +454,7 @@ } else if (opt == 0) break; } -@@ -1471,6 +1558,10 @@ +@@ -1473,6 +1560,10 @@ int main(int ac, char **av) usage(); exit(1); } @@ -457,9 +465,11 @@ checkdmi(); general_setup(); ---- a/mcelog.h -+++ b/mcelog.h -@@ -156,6 +156,7 @@ +Index: mcelog-181/mcelog.h +=================================================================== +--- mcelog-181.orig/mcelog.h ++++ mcelog-181/mcelog.h +@@ -157,6 +157,7 @@ enum cputype { enum option_ranges { O_COMMON = 500, O_DISKDB = 1000, @@ -467,8 +477,10 @@ }; enum syslog_opt { ---- a/msg.c -+++ b/msg.c +Index: mcelog-181/msg.c +=================================================================== +--- mcelog-181.orig/msg.c ++++ mcelog-181/msg.c @@ -8,10 +8,13 @@ #include "mcelog.h" #include "msg.h" @@ -483,7 +495,7 @@ static char *output_fn; int need_stdout(void) -@@ -135,6 +138,11 @@ +@@ -135,6 +138,11 @@ int Wprintf(char *fmt, ...) n = vfprintf(output_fh ? output_fh : stdout, fmt, ap); va_end(ap); } ++++++ fix_setgroups_missing_call.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.805418995 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.809419000 +0200 @@ -2,8 +2,10 @@ mcelog.c | 9 +++++++++ 1 file changed, 9 insertions(+) ---- a/mcelog.c -+++ b/mcelog.c +Index: mcelog-181/mcelog.c +=================================================================== +--- mcelog-181.orig/mcelog.c ++++ mcelog-181/mcelog.c @@ -37,6 +37,7 @@ #include <assert.h> #include <signal.h> @@ -12,7 +14,7 @@ #include <sys/wait.h> #include <fnmatch.h> #include "mcelog.h" -@@ -1284,6 +1285,14 @@ +@@ -1286,6 +1287,14 @@ static void general_setup(void) static void drop_cred(void) { ++++++ mcelog-178.obscpio -> mcelog-181.obscpio ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/.gitignore new/mcelog-181/.gitignore --- old/mcelog-178/.gitignore 1970-01-01 01:00:00.000000000 +0100 +++ new/mcelog-181/.gitignore 2022-04-18 23:13:27.000000000 +0200 @@ -0,0 +1,12 @@ +*.o +*~ +mcelog +dbquery +*.orig +*.rej +.gdb_history +.depend +tsc +core +version.c +version.tmp diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/genconfig.py new/mcelog-181/genconfig.py --- old/mcelog-178/genconfig.py 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/genconfig.py 2022-04-18 23:13:27.000000000 +0200 @@ -1,9 +1,9 @@ #!/usr/bin/python # generate man config documentation from mcelog.conf example # genconfig.py mcelog.conf intro.html +from __future__ import print_function import sys import re -import string import argparse ap = argparse.ArgumentParser(description="generate man config documentation from mcelog.conf example") @@ -30,12 +30,12 @@ explanation += 1 s = m.group(1) if explanation == 1: - s = string.capitalize(s) - print s + s = s.capitalize() + print(s) continue if explanation: - print ".PP" + print(".PP") explanation = 0 # empty line: new option @@ -52,29 +52,29 @@ if m: config_option(m.group(1), m.group(2), m.group(3)) continue - print >>sys.stderr, "Unparseable line %d" % (lineno-1) + print("Unparseable line %d" % (lineno-1), file=sys.stderr, flush=True) def config_option(enabled, name, value): - print ".B %s = %s" % (name, value) - print ".PP" + print(".B %s = %s" % (name, value)) + print(".PP") def start_group(name): - print ".SS \"The %s config section\"" % (name) + print(".SS \"The %s config section\"" % (name)) def new_option(): - print ".PP" + print(".PP") -print """ +print(""" .\\" Auto generated mcelog.conf manpage. Do not edit. .TH "mcelog.conf" 5 "mcelog" -""" +""") -print args.intro.read() +print(args.intro.read()) parse(args.config) -print """ +print(""" .SH SEE ALSO .BR mcelog (8), .BR mcelog.triggers (5) .B http://www.mcelog.org -""" +""") diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/i10nm.c new/mcelog-181/i10nm.c --- old/mcelog-178/i10nm.c 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/i10nm.c 2022-04-18 23:13:27.000000000 +0200 @@ -191,7 +191,7 @@ }; static char *imc_2[] = { - [0x00] = "DDR4 command / address parity error", + [0x00] = "DDR command / address parity error", [0x20] = "HBM command / address parity error", [0x21] = "HBM data parity error", }; @@ -204,7 +204,7 @@ [0x00] = "DDR-T bad request", [0x01] = "DDR Data response to an invalid entry", [0x02] = "DDR data response to an entry not expecting data", - [0x03] = "DDR4 completion to an invalid entry", + [0x03] = "DDR completion to an invalid entry", [0x04] = "DDR-T completion to an invalid entry", [0x05] = "DDR data/completion FIFO overflow", [0x06] = "DDR-T ERID correctable parity error", diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/input/GENMCA new/mcelog-181/input/GENMCA --- old/mcelog-178/input/GENMCA 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/input/GENMCA 2022-04-18 23:13:27.000000000 +0200 @@ -9,7 +9,7 @@ [5]="Internal parity error" [6]="SMM Handler Code Access Violation" ) -LL=( "Level-0" "Level-1" "Level-2" "Level-3" ) +LL=( "Level-0" "Level-1" "Level-2" "Level-3" "UNKNOWN" ) TT=( "Instruction" "Data" "Generic" "Unknown" ) mmm_mnemonic=( "GEN" "RD" "WR" "AC" "MS" "RES5" "RES6" "RES7" ) RRRR=( @@ -87,7 +87,7 @@ cache_hierarchy_errors() { - local levelnum=$(($ecode & 3)) + local levelnum=$[$(($ecode & 3))+1] local typenum=$(($ecode >> 2 & 3)) local rrrr_num=$(($ecode >> 4 & 0xf)) local rrrr_str diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/intel.c new/mcelog-181/intel.c --- old/mcelog-178/intel.c 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/intel.c 2022-04-18 23:13:27.000000000 +0200 @@ -44,7 +44,7 @@ cpu == CPU_TREMONT_D || cpu == CPU_COMETLAKE || cpu == CPU_TIGERLAKE || cpu == CPU_ROCKETLAKE || cpu == CPU_ALDERLAKE || cpu == CPU_LAKEFIELD || - cpu == CPU_SAPPHIRERAPIDS) + cpu == CPU_SAPPHIRERAPIDS || cpu == CPU_RAPTORLAKE) memory_error_support = 1; } @@ -125,6 +125,8 @@ return CPU_LAKEFIELD; else if (model == 0x8F) return CPU_SAPPHIRERAPIDS; + else if (model == 0xb7) + return CPU_RAPTORLAKE; if (model > 0x1a) { Eprintf("Family 6 Model %u CPU: only decoding architectural errors\n", model); diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/intel.h new/mcelog-181/intel.h --- old/mcelog-178/intel.h 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/intel.h 2022-04-18 23:13:27.000000000 +0200 @@ -38,5 +38,6 @@ case CPU_ROCKETLAKE: \ case CPU_ALDERLAKE: \ case CPU_LAKEFIELD: \ - case CPU_SAPPHIRERAPIDS + case CPU_SAPPHIRERAPIDS: \ + case CPU_RAPTORLAKE diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/mcelog.c new/mcelog-181/mcelog.c --- old/mcelog-178/mcelog.c 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/mcelog.c 2022-04-18 23:13:27.000000000 +0200 @@ -256,6 +256,7 @@ [CPU_ALDERLAKE] = "Alderlake", [CPU_LAKEFIELD] = "Lakefield", [CPU_SAPPHIRERAPIDS] = "Sapphirerapids server", + [CPU_RAPTORLAKE] = "Raptorlake", }; static struct config_choice cpu_choices[] = { @@ -318,6 +319,7 @@ { "alderlake", CPU_ALDERLAKE }, { "lakefield", CPU_LAKEFIELD }, { "sapphirerapids_server", CPU_SAPPHIRERAPIDS }, + { "raptorlake", CPU_RAPTORLAKE }, { NULL } }; @@ -495,7 +497,7 @@ cputype != CPU_TREMONT_D && cputype != CPU_COMETLAKE && cputype != CPU_TIGERLAKE && cputype != CPU_ROCKETLAKE && cputype != CPU_ALDERLAKE && cputype != CPU_LAKEFIELD && - cputype != CPU_SAPPHIRERAPIDS) + cputype != CPU_SAPPHIRERAPIDS && cputype != CPU_RAPTORLAKE) resolveaddr(m->addr); } diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/mcelog.conf.5 new/mcelog-181/mcelog.conf.5 --- old/mcelog-178/mcelog.conf.5 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/mcelog.conf.5 1970-01-01 01:00:00.000000000 +0100 @@ -1,294 +0,0 @@ - -.\" Auto generated mcelog.conf manpage. Do not edit. -.TH "mcelog.conf" 5 "mcelog" - -.SH NAME -mcelog.conf \- mcelog.conf reference -.SH SYNOPSIS -.B /etc/mcelog.conf -.SH DESCRIPTION - -/etc/mcelog.conf is the main configuration file for -.B mcelog(8). -This is configuration file separated into sections including -a default section. - -General format -.PP -.B optionname = value -.PP -White space is not allowed in value currently, except at the end where it is dropped - -.PP -.PP -In general all command line options that are not commands work here. -See man mcelog or mcelog --help for a list. -e.g. to enable the --no-syslog option use -.PP -.B no-syslog = yes (or no to disable) -.PP -When the option has a argument -.PP -.B logfile = /tmp/logfile -.PP -Below are the options which are not command line options. -.PP -.PP -Set cpu type for which mcelog decodes events: -.PP -.B cpu = type -.PP -For valid values for type please see mcelog --help. -If this value is set incorrectly the decoded output will be likely incorrect. -By default when this parameter is not set mcelog uses the CPU it is running on -on very new kernels the mcelog events reported by the kernel also carry -the CPU type which is used too when available and not overridden. -.PP -.PP -Enable daemon mode: -.PP -.B daemon = yes -.PP -By default mcelog just processes the currently pending events and exits. -In daemon mode it will keep running as a daemon in the background and poll -the kernel for events and then decode them. -.PP -.PP -Filter out known broken events by default. -.PP -.B filter = yes -.PP -Don't log memory errors individually. -They still get accounted if that is enabled. -.PP -.B filter-memory-errors = yes -.PP -.PP -Output in undecoded raw format to be easier machine readable -(default is decoded). -.PP -.B raw = yes -.PP -.PP -Set cpu mhz to decode uptime from time stamp counter (output -unreliable, not needed on new kernels which report the event time -directly. A lot of systems don't have a linear time stamp clock -and the output is wrong then. -Normally mcelog tries to figure out if it the TSC is reliable -and only uses the current frequency then. -Setting a frequency forces timestamp decoding. -This setting is obsolete with modern kernels which report the time -directly. -.PP -.B cpumhz = 1800.00 -.PP -.PP -Log output options -Log decoded machine checks in syslog (default stdout or syslog for daemon) -.PP -.B syslog = yes -.PP -Log decoded machine checks in syslog with error level -.PP -.B syslog-error = yes -.PP -Never log anything to syslog -.PP -.B no-syslog = yes -.PP -Append log output to logfile instead of stdout. only when no syslog logging is active -.PP -.B logfile = filename -.PP -.PP -Use smbios information to decode dimms (needs root). -This function is not recommended to use right now and generally not needed. -The exception is memdb prepopulation, which is configured separately below. -.PP -.B dmi = no -.PP -.PP -When in daemon mode run as this user after set up. -Note that the triggers will run as this user too. -Setting this to non root will mean that triggers cannot take some corrective -action, like offlining objects. -.PP -.B run-credentials-user = root -.PP -.PP -Group to run as daemon with -default to the group of the run-credentials-user -.PP -.B run-credentials-group = nobody -.PP -.PP -.SS "The server config section" -User allowed to access client socket. -when set to * match any -root is always allowed to access. -default: root only -.PP -.B client-user = root -.PP -Group allowed to access mcelog -When no group is configured any group matches (but still user checking). -when set to * match any -.PP -.B client-group = root -.PP -Path to the unix socket for client<->server communication. -When no socket-path is configured the server will not start -.PP -.B socket-path = /var/run/mcelog-client -.PP -When mcelog starts it checks if a server is already running. this configures the timeout -for this check. -.PP -.B initial-ping-timeout = 2 -.PP - -.PP -.SS "The dimm config section" -Is the in memory dimm error tracking enabled? -Only works on systems with integrated memory controller and -which are supported. -Only takes effect in daemon mode. -.PP -.B dimm-tracking-enabled = yes -.PP -Use dmi information from the bios to prepopulate dimm database. -Note this might not work with all BIOS and requires mcelog to run as root. -Alternative is to let mcelog create DIMM objects on demand. -.PP -.B dmi-prepopulate = yes -.PP - -Execute these triggers when the rate of corrected or uncorrected -Errors per DIMM exceeds the threshold. -Note when the hardware does not report DIMMs this might also -be per channel. -The default of 10/24h is reasonable for server quality -DDR3 DIMMs as of 2009/10. -.PP -.B uc-error-trigger = dimm-error-trigger -.PP -.B uc-error-threshold = 1 / 24h -.PP -.B ce-error-trigger = dimm-error-trigger -.PP -.B ce-error-threshold = 10 / 24h -.PP -.PP -.SS "The socket config section" -Enable memory error accounting per socket. -.PP -.B socket-tracking-enabled = yes -.PP -.PP -Threshold and trigger for uncorrected memory errors on a socket. -mem-uc-error-trigger = socket-memory-error-trigger -.PP -.PP -.B mem-uc-error-threshold = 100 / 24h -.PP -.PP -Trigger script for corrected memory errors on a socket. -.PP -.B mem-ce-error-trigger = socket-memory-error-trigger -.PP -.PP -Threshold on when to trigger a correct error for the socket. -.PP -.PP -.B mem-ce-error-threshold = 100 / 24h -.PP -.PP - log socket error threshold explicitly? -.PP -.B mem-ce-error-log = yes -.PP -.PP -Trigger script for uncorrected bus error events -.PP -.B bus-uc-threshold-trigger = bus-error-trigger -.PP -.PP -Trigger script for uncorrected iomca erors -.PP -.B iomca-threshold-trigger = iomca-error-trigger -.PP -.PP -Trigger script for other uncategorized errors -.PP -.B unknown-threshold-trigger = unknown-error-trigger -.PP -.PP -.SS "The cache config section" -Processing of cache error thresholds reported by intel cpus. -.PP -.B cache-threshold-trigger = cache-error-trigger -.PP -.PP -Should cache threshold events be logged explicitly? -.PP -.B cache-threshold-log = yes -.PP -.PP -.SS "The page config section" -Memory error accouting per 4k memory page. -Threshold for the correct memory errors trigger script. -.PP -.B memory-ce-threshold = 10 / 24h -.PP -.PP -Trigger script for corrected errors. -memory-ce-trigger = page-error-trigger -.PP -.PP -Should page threshold events be logged explicitly? -.PP -.B memory-ce-log = yes -.PP -.PP -Specify the internal action in mcelog to exceeding a page error threshold -this is done in addition to executing the trigger script if available -off no action -account only account errors -soft try to soft-offline page without killing any processes - This requires an uptodate kernel. Might not be successfull. -hard try to hard-offline page by killing processes - Requires an uptodate kernel. Might not be successfull. -soft-then-hard First try to soft offline, then try hard offlining -.PP -.B memory-ce-action = off|account|soft|hard|soft-then-hard -.PP -.B memory-ce-action = soft -.PP -.PP -Trigger script before doing soft memory offline -this trigger will scan and run all the scipts in the page-error-pre-soft-trigger.extern -.PP -.B memory-pre-sync-soft-ce-trigger = page-error-pre-sync-soft-trigger -.PP -.PP -Trigger script after completing soft memory offline -this trigger will scan and run all the scipts in the page-error-post-soft-trigger.extern -.PP -.B memory-post-sync-soft-ce-trigger = page-error-post-sync-soft-trigger -.PP -.PP -.SS "The trigger config section" -Maximum number of running triggers -.PP -.B children-max = 2 -.PP -Execute triggers in this directory -.PP -.B directory = /etc/mcelog -.PP - -.SH SEE ALSO -.BR mcelog (8), -.BR mcelog.triggers (5) -.B http://www.mcelog.org - diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/mcelog.h new/mcelog-181/mcelog.h --- old/mcelog-178/mcelog.h 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/mcelog.h 2022-04-18 23:13:27.000000000 +0200 @@ -151,6 +151,7 @@ CPU_ALDERLAKE, CPU_LAKEFIELD, CPU_SAPPHIRERAPIDS, + CPU_RAPTORLAKE, }; enum option_ranges { diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/mcelog.logrotate new/mcelog-181/mcelog.logrotate --- old/mcelog-178/mcelog.logrotate 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/mcelog.logrotate 2022-04-18 23:13:27.000000000 +0200 @@ -3,7 +3,7 @@ dateext maxage 365 rotate 99 - size=+2048k + size +2048k notifempty missingok copytruncate diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/msr.c new/mcelog-181/msr.c --- old/mcelog-178/msr.c 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/msr.c 2022-04-18 23:13:27.000000000 +0200 @@ -1,4 +1,7 @@ #include "mcelog.h" +#include "sysfs.h" +#include <stdbool.h> +#include <string.h> #include <stdio.h> #include <stdlib.h> #include <unistd.h> @@ -42,6 +45,20 @@ close(fd); } +static bool in_lockdown(void) +{ + bool ret = false; + char *lockdown = read_field("/sys/kernel/security", "lockdown"); + + if (!lockdown) + return false; + + if (!strstr(lockdown, "[none]")) + ret = true; + free(lockdown); + return ret; +} + /* XXX: assumes all CPUs are already onlined. */ void set_imc_log(int cputype) { @@ -59,6 +76,11 @@ return; } + if (in_lockdown()) { + Lprintf("Kernel in lockdown. Cannot enable DIMM error location reporting"); + return; + } + for (cpu = 0; cpu < ncpus; cpu++) domsr(cpu, msr, bit); } diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/mcelog-178/sysfs.c new/mcelog-181/sysfs.c --- old/mcelog-178/sysfs.c 2021-07-21 00:01:54.000000000 +0200 +++ new/mcelog-181/sysfs.c 2022-04-18 23:13:27.000000000 +0200 @@ -31,35 +31,29 @@ { char *fn, *val; int n, fd; - struct stat st; char *s; - char *buf = NULL; + char *buf = xalloc(4096); xasprintf(&fn, "%s/%s", base, name); fd = open(fn, O_RDONLY); free(fn); if (fd < 0) - goto bad; - if (fstat(fd, &st) < 0) { - close(fd); - goto bad; - } - buf = xalloc(st.st_size); - n = read(fd, buf, st.st_size); + goto bad_buf; + n = read(fd, buf, 4096); close(fd); if (n < 0) goto bad_buf; val = xalloc(n + 1); memcpy(val, buf, n); + val[n] = 0; free(buf); s = memchr(val, '\n', n); if (s) *s = 0; - return val; + return val; bad_buf: free(buf); -bad: SYSERRprintf("Cannot read sysfs field %s/%s", base, name); return xstrdup(""); } ++++++ mcelog.obsinfo ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:32.969419200 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:32.973419204 +0200 @@ -1,6 +1,5 @@ name: mcelog -version: 178 -mtime: 1626818514 -commit: c133a744e9ee6a2f40cbec4cfb0182d3ed1a792a - +version: 181 +mtime: 1650316407 +commit: a4edca25ef3bd8780ae1dc54bc203973ec7f1640 ++++++ mcelog_invert_prefill_db_warning.patch ++++++ --- /var/tmp/diff_new_pack.rkTIhx/_old 2022-05-05 23:04:33.025419269 +0200 +++ /var/tmp/diff_new_pack.rkTIhx/_new 2022-05-05 23:04:33.029419275 +0200 @@ -2,9 +2,11 @@ memdb.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) ---- a/memdb.c -+++ b/memdb.c -@@ -431,11 +431,11 @@ +Index: mcelog-181/memdb.c +=================================================================== +--- mcelog-181.orig/memdb.c ++++ mcelog-181/memdb.c +@@ -431,11 +431,11 @@ void prefill_memdb(int do_dmi) md->location = xstrdup(bl); md->name = xstrdup(dmi_getstring(&d->header, d->device_locator)); } ++++++ python3_shebang ++++++ Index: mcelog-181/genconfig.py =================================================================== --- mcelog-181.orig/genconfig.py +++ mcelog-181/genconfig.py @@ -1,7 +1,6 @@ -#!/usr/bin/python +#!/usr/bin/python3 # generate man config documentation from mcelog.conf example # genconfig.py mcelog.conf intro.html -from __future__ import print_function import sys import re import argparse
