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Hello community,
here is the log from the commit of package intel-graphics-compiler for
openSUSE:Factory checked in at 2024-04-04 22:26:55
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/intel-graphics-compiler (Old)
and /work/SRC/openSUSE:Factory/.intel-graphics-compiler.new.1905 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "intel-graphics-compiler"
Thu Apr 4 22:26:55 2024 rev:13 rq:1164578 version:1.0.16238.4
Changes:
--------
---
/work/SRC/openSUSE:Factory/intel-graphics-compiler/intel-graphics-compiler.changes
2024-03-13 22:19:34.206464315 +0100
+++
/work/SRC/openSUSE:Factory/.intel-graphics-compiler.new.1905/intel-graphics-compiler.changes
2024-04-04 22:28:32.456352537 +0200
@@ -1,0 +2,9 @@
+Thu Apr 4 08:40:08 UTC 2024 - Patrik Jakobsson <[email protected]>
+
+- Update to version 1.0.16238.4
+ * No changelog was made available
+- Update spirv_llvm_translator to 2221771c28dc224d5d560faf6a2cd73f8ecf713d
+- Removed 0001-Backport-to-17-Update-LongConstantCompositeINTEL-to-.patch
+ * No longer needed
+
+-------------------------------------------------------------------
Old:
----
0001-Backport-to-17-Update-LongConstantCompositeINTEL-to-.patch
igc-1.0.15985.7.tar.gz
New:
----
igc-1.0.16238.4.tar.gz
BETA DEBUG BEGIN:
Old:- Update spirv_llvm_translator to 2221771c28dc224d5d560faf6a2cd73f8ecf713d
- Removed 0001-Backport-to-17-Update-LongConstantCompositeINTEL-to-.patch
* No longer needed
BETA DEBUG END:
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ intel-graphics-compiler.spec ++++++
--- /var/tmp/diff_new_pack.HFFQeg/_old 2024-04-04 22:28:33.696398190 +0200
+++ /var/tmp/diff_new_pack.HFFQeg/_new 2024-04-04 22:28:33.696398190 +0200
@@ -18,10 +18,10 @@
%global llvm_commit llvmorg-14.0.5
%global opencl_clang_commit cf95b338d14685e4f3402ab1828bef31d48f1fd6
-%global spirv_llvm_translator_commit 493353d7fdc655f9f31abc874dd0adef7dd241c1
+%global spirv_llvm_translator_commit 2221771c28dc224d5d560faf6a2cd73f8ecf713d
%global vc_intrinsics_commit v0.16.0
Name: intel-graphics-compiler
-Version: 1.0.15985.7
+Version: 1.0.16238.4
Release: 1%{?dist}
Summary: Intel Graphics Compiler for OpenCL
License: MIT
@@ -33,7 +33,6 @@
Source3:
https://github.com/llvm/llvm-project/archive/%{llvm_commit}/llvm-project.tar.gz
Source4:
https://github.com/intel/vc-intrinsics/archive/%{vc_intrinsics_commit}/vc-intrinsics.zip
Patch0: 0001-Use-patch-instead-of-git-to-apply-opencl-clang-patch.patch
-Patch1: 0001-Backport-to-17-Update-LongConstantCompositeINTEL-to-.patch
BuildRequires: bison
BuildRequires: cmake
BuildRequires: flex
@@ -125,9 +124,6 @@
%patch -P 0 -p1
popd
tar -xzf %{_sourcedir}/spirv-llvm-translator.tar.gz -C llvm-spirv
--strip-components=1
-pushd llvm-spirv
-%patch -P 1 -p1
-popd
popd
mkdir igc
++++++ igc-1.0.15985.7.tar.gz -> igc-1.0.16238.4.tar.gz ++++++
/work/SRC/openSUSE:Factory/intel-graphics-compiler/igc-1.0.15985.7.tar.gz
/work/SRC/openSUSE:Factory/.intel-graphics-compiler.new.1905/igc-1.0.16238.4.tar.gz
differ: char 28, line 1
++++++ spirv-llvm-translator.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/include/LLVMSPIRVExtensions.inc
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/include/LLVMSPIRVExtensions.inc
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/include/LLVMSPIRVExtensions.inc
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/include/LLVMSPIRVExtensions.inc
2024-02-14 10:48:25.000000000 +0100
@@ -2,6 +2,7 @@
#define EXT(X)
#endif
+EXT(SPV_EXT_shader_atomic_float16_add)
EXT(SPV_EXT_shader_atomic_float_add)
EXT(SPV_EXT_shader_atomic_float_min_max)
EXT(SPV_KHR_no_integer_wrap_decoration)
@@ -41,7 +42,9 @@
EXT(SPV_INTEL_fp_fast_math_mode)
EXT(SPV_INTEL_fpga_cluster_attributes)
EXT(SPV_INTEL_loop_fuse)
-EXT(SPV_INTEL_long_constant_composite)
+EXT(SPV_INTEL_long_composites)
+EXT(SPV_INTEL_long_constant_composite) // TODO: rename to
+ // SPV_INTEL_long_composites later
EXT(SPV_INTEL_optnone)
EXT(SPV_INTEL_fpga_dsp_control)
EXT(SPV_INTEL_memory_access_aliasing)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/OCLUtil.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/OCLUtil.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/OCLUtil.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/OCLUtil.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -646,6 +646,7 @@
add(llvm::AtomicRMWInst::Min, OpAtomicSMin);
add(llvm::AtomicRMWInst::UMax, OpAtomicUMax);
add(llvm::AtomicRMWInst::UMin, OpAtomicUMin);
+ add(llvm::AtomicRMWInst::FAdd, OpAtomicFAddEXT);
}
} // namespace SPIRV
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVInternal.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVInternal.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVInternal.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVInternal.h
2024-02-14 10:48:25.000000000 +0100
@@ -952,6 +952,9 @@
/// Map OpenCL opaque type name to SPIR-V type name.
std::string mapOCLTypeNameToSPIRV(StringRef Name, StringRef Acc = "");
+/// Return the index of image operands given an image op.
+size_t getImageOperandsIndex(Op OpCode);
+
/// Check if access qualifier is encoded in the type name.
bool hasAccessQualifiedName(StringRef TyName);
@@ -1024,9 +1027,11 @@
/// \param OC opcode of corresponding built-in instruction. Used to gather info
/// for unsigned/constant arguments.
/// \param Types of arguments of SPIR-V built-in function
+/// \param Ops Operands of SPIRVInstruction
/// \return IA64 mangled name.
std::string getSPIRVFriendlyIRFunctionName(const std::string &UniqName,
- spv::Op OC, ArrayRef<Type *>
ArgTys);
+ spv::Op OC, ArrayRef<Type *> ArgTys,
+ ArrayRef<SPIRVValue *> Ops);
/// Cast a function to a void(void) funtion pointer.
Constant *castToVoidFuncPtr(Function *F);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVReader.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVReader.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVReader.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVReader.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -2142,20 +2142,67 @@
auto CC = static_cast<SPIRVCompositeConstruct *>(BV);
auto Constituents = transValue(CC->getOperands(), F, BB);
std::vector<Constant *> CV;
+ bool HasRtValues = false;
for (const auto &I : Constituents) {
- CV.push_back(dyn_cast<Constant>(I));
+ auto *C = dyn_cast<Constant>(I);
+ CV.push_back(C);
+ if (!HasRtValues && C == nullptr)
+ HasRtValues = true;
}
+
switch (static_cast<size_t>(BV->getType()->getOpCode())) {
- case OpTypeVector:
- return mapValue(BV, ConstantVector::get(CV));
- case OpTypeArray:
- return mapValue(
- BV, ConstantArray::get(dyn_cast<ArrayType>(transType(CC->getType())),
- CV));
- case OpTypeStruct:
- return mapValue(BV,
- ConstantStruct::get(
- dyn_cast<StructType>(transType(CC->getType())), CV));
+ case OpTypeVector: {
+ if (!HasRtValues)
+ return mapValue(BV, ConstantVector::get(CV));
+
+ auto *VT = cast<FixedVectorType>(transType(CC->getType()));
+ Value *NewVec = ConstantVector::getSplat(
+ VT->getElementCount(), PoisonValue::get(VT->getElementType()));
+
+ for (size_t I = 0; I < Constituents.size(); I++) {
+ NewVec = InsertElementInst::Create(NewVec, Constituents[I],
+ getInt32(M, I), "", BB);
+ }
+ return mapValue(BV, NewVec);
+ }
+ case OpTypeArray: {
+ auto *AT = cast<ArrayType>(transType(CC->getType()));
+ if (!HasRtValues)
+ return mapValue(BV, ConstantArray::get(AT, CV));
+
+ AllocaInst *Alloca = new AllocaInst(AT, SPIRAS_Private, "", BB);
+
+ // get pointer to the element of the array
+ // store the result of argument
+ for (size_t I = 0; I < Constituents.size(); I++) {
+ auto *GEP = GetElementPtrInst::Create(
+ AT, Alloca, {getInt32(M, 0), getInt32(M, I)}, "gep", BB);
+ GEP->setIsInBounds(true);
+ new StoreInst(Constituents[I], GEP, false, BB);
+ }
+
+ auto *Load = new LoadInst(AT, Alloca, "load", false, BB);
+ return mapValue(BV, Load);
+ }
+ case OpTypeStruct: {
+ auto *ST = cast<StructType>(transType(CC->getType()));
+ if (!HasRtValues)
+ return mapValue(BV, ConstantStruct::get(ST, CV));
+
+ AllocaInst *Alloca = new AllocaInst(ST, SPIRAS_Private, "", BB);
+
+ // get pointer to the element of structure
+ // store the result of argument
+ for (size_t I = 0; I < Constituents.size(); I++) {
+ auto *GEP = GetElementPtrInst::Create(
+ ST, Alloca, {getInt32(M, 0), getInt32(M, I)}, "gep", BB);
+ GEP->setIsInBounds(true);
+ new StoreInst(Constituents[I], GEP, false, BB);
+ }
+
+ auto *Load = new LoadInst(ST, Alloca, "load", false, BB);
+ return mapValue(BV, Load);
+ }
case internal::OpTypeJointMatrixINTEL:
case OpTypeCooperativeMatrixKHR:
return mapValue(BV, transSPIRVBuiltinFromInst(CC, BB));
@@ -3105,7 +3152,7 @@
mangleOpenClBuiltin(FuncName, ArgTys, MangledName);
else
MangledName =
- getSPIRVFriendlyIRFunctionName(FuncName, BI->getOpCode(), ArgTys);
+ getSPIRVFriendlyIRFunctionName(FuncName, BI->getOpCode(), ArgTys, Ops);
Function *Func = M->getFunction(MangledName);
FunctionType *FT = FunctionType::get(RetTy, ArgTys, false);
@@ -3243,7 +3290,7 @@
}
}
- bool IsRetSigned;
+ bool IsRetSigned = true;
switch (OC) {
case OpConvertFToU:
case OpSatConvertSToU:
@@ -3252,8 +3299,18 @@
case OpUDotAccSatKHR:
IsRetSigned = false;
break;
+ case OpImageRead:
+ case OpImageSampleExplicitLod: {
+ size_t Idx = getImageOperandsIndex(OC);
+ auto Ops = BI->getOperands();
+ if (Ops.size() > Idx) {
+ auto ImOp = static_cast<SPIRVConstant *>(Ops[Idx])->getZExtIntValue();
+ IsRetSigned = !(ImOp & ImageOperandsMask::ImageOperandsZeroExtendMask);
+ }
+ break;
+ }
default:
- IsRetSigned = true;
+ break;
}
if (AddRetTypePostfix) {
@@ -3286,10 +3343,11 @@
for (unsigned I = 0, E = BM->getNumVariables(); I != E; ++I) {
auto *BV = BM->getVariable(I);
- if (BV->getStorageClass() != StorageClassFunction)
- transValue(BV, nullptr, nullptr);
- else
+ if (BV->getName() == "llvm.global_ctors" ||
+ BV->getName() == "llvm.global_dtors")
transGlobalCtorDtors(BV);
+ else if (BV->getStorageClass() != StorageClassFunction)
+ transValue(BV, nullptr, nullptr);
}
// Then translate all debug instructions.
@@ -3768,13 +3826,56 @@
return true;
}
-void SPIRVToLLVM::transGlobalCtorDtors(SPIRVVariable *BV) {
- if (BV->getName() != "llvm.global_ctors" &&
- BV->getName() != "llvm.global_dtors")
- return;
+/// When spirv is generated from LLVM IR with opaque pointer enabled and then
+/// the spirv is translated to LLVM IR with typed pointer, function pointer is
+/// casted to i8* type in GlobalVariable \p GV, which causes error in LLVM IR
+/// verifier. E.g.
+/// [1 x %0][%0 { i32 1, i8* bitcast (void ()* @ctor to i8*), i8* null }]
+/// This function removes the cast so that LLVM IR is valid.
+static GlobalVariable *mutateGlobalCtorDtors(GlobalVariable *GV) {
+ if (!GV->hasInitializer())
+ return GV;
+ auto *InitArr = cast<ConstantArray>(GV->getInitializer());
+ unsigned NumEltsInArr = InitArr->getType()->getNumElements();
+ if (NumEltsInArr == 0)
+ return GV;
+ auto *CS = cast<ConstantStruct>(InitArr->getAggregateElement(0u));
+ auto *Elt1 = CS->getAggregateElement(1);
+ if (!isa<ConstantExpr>(Elt1))
+ return GV;
+
+ auto *STy = CS->getType();
+ assert(STy->getNumElements() == 3 &&
+ "expect 3 fields in global variable element struct type");
+ auto *NewSTy = StructType::create(GV->getContext(),
+ {STy->getElementType(0),
+ Elt1->stripPointerCasts()->getType(),
+ STy->getElementType(2)},
+ STy->getName(), STy->isPacked());
+ auto *NewTy = ArrayType::get(NewSTy, NumEltsInArr);
+ SmallVector<Constant *, 4> ArrElts;
+ for (unsigned I = 0; I < NumEltsInArr; ++I) {
+ auto *CS = cast<ConstantStruct>(InitArr->getAggregateElement(I));
+ ArrElts.push_back(ConstantStruct::get(
+ NewSTy, {CS->getAggregateElement(0u),
+ CS->getAggregateElement(1)->stripPointerCasts(),
+ CS->getAggregateElement(2)}));
+ }
+ auto *NewInitializer = ConstantArray::get(NewTy, ArrElts);
+ auto *NewGV = new GlobalVariable(
+ *GV->getParent(), NewTy, GV->isConstant(), GV->getLinkage(),
+ NewInitializer, "", 0, GV->getThreadLocalMode(), GV->getAddressSpace(),
+ GV->isExternallyInitialized());
+ NewGV->copyAttributesFrom(GV);
+ NewGV->takeName(GV);
+ GV->eraseFromParent();
+ return NewGV;
+}
- Value *V = transValue(BV, nullptr, nullptr);
- cast<GlobalValue>(V)->setLinkage(GlobalValue::AppendingLinkage);
+void SPIRVToLLVM::transGlobalCtorDtors(SPIRVVariable *BV) {
+ auto *V = cast<GlobalVariable>(transValue(BV, nullptr, nullptr));
+ V = mutateGlobalCtorDtors(V);
+ V->setLinkage(GlobalVariable::AppendingLinkage);
}
void SPIRVToLLVM::createCXXStructor(const char *ListName,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVToLLVMDbgTran.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVToLLVMDbgTran.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVToLLVMDbgTran.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVToLLVMDbgTran.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -1122,6 +1122,15 @@
StaticMemberDecl = transDebugInst<DIDerivedType>(
BM->get<SPIRVExtInst>(Ops[StaticMemberDeclarationIdx]));
}
+
+ DIExpression *DIExpr = nullptr;
+ // Check if Ops[VariableIdx] is not being used to hold a variable operand.
+ // Instead it is being used to hold an Expression that holds the initial
+ // value of the GlobalVariable.
+ if (getDbgInst<SPIRVDebug::Expression>(Ops[VariableIdx]))
+ DIExpr =
+ transDebugInst<DIExpression>(BM->get<SPIRVExtInst>(Ops[VariableIdx]));
+
SPIRVWord Flags =
getConstantValueOrLiteral(Ops, FlagsIdx, DebugInst->getExtSetKind());
bool IsLocal = Flags & SPIRVDebug::FlagIsLocal;
@@ -1130,7 +1139,7 @@
if (IsDefinition) {
VarDecl = getDIBuilder(DebugInst).createGlobalVariableExpression(
Parent, Name, LinkageName, File, LineNo, Ty, IsLocal, IsDefinition,
- nullptr, StaticMemberDecl);
+ DIExpr, StaticMemberDecl);
} else {
VarDecl = getDIBuilder(DebugInst).createTempGlobalVariableFwdDecl(
Parent, Name, LinkageName, File, LineNo, Ty, IsLocal,
StaticMemberDecl);
@@ -1139,15 +1148,20 @@
llvm::TempMDNode TMP(VarDecl);
VarDecl = getDIBuilder(DebugInst).replaceTemporary(std::move(TMP),
VarDecl);
}
- // If the variable has no initializer Ops[VariableIdx] is OpDebugInfoNone.
- // Otherwise Ops[VariableIdx] may be a global variable or a constant(C++
- // static const).
- if (VarDecl && !getDbgInst<SPIRVDebug::DebugInfoNone>(Ops[VariableIdx])) {
- SPIRVValue *V = BM->get<SPIRVValue>(Ops[VariableIdx]);
- Value *Var = SPIRVReader->transValue(V, nullptr, nullptr);
- llvm::GlobalVariable *GV = dyn_cast_or_null<llvm::GlobalVariable>(Var);
- if (GV && !GV->hasMetadata("dbg"))
- GV->addMetadata("dbg", *VarDecl);
+
+ // Ops[VariableIdx] was not used to hold an Expression with the initial value
+ // for the GlobalVariable
+ if (!DIExpr) {
+ // If the variable has no initializer Ops[VariableIdx] is OpDebugInfoNone.
+ // Otherwise Ops[VariableIdx] may be a global variable or a constant(C++
+ // static const).
+ if (VarDecl && !getDbgInst<SPIRVDebug::DebugInfoNone>(Ops[VariableIdx])) {
+ SPIRVValue *V = BM->get<SPIRVValue>(Ops[VariableIdx]);
+ Value *Var = SPIRVReader->transValue(V, nullptr, nullptr);
+ llvm::GlobalVariable *GV = dyn_cast_or_null<llvm::GlobalVariable>(Var);
+ if (GV && !GV->hasMetadata("dbg"))
+ GV->addMetadata("dbg", *VarDecl);
+ }
}
return VarDecl;
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVUtil.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVUtil.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVUtil.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVUtil.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -1479,6 +1479,18 @@
return ImageTyName;
}
+size_t getImageOperandsIndex(Op OpCode) {
+ switch (OpCode) {
+ case OpImageRead:
+ case OpImageSampleExplicitLod:
+ return 2;
+ case OpImageWrite:
+ return 3;
+ default:
+ return ~0U;
+ }
+}
+
std::string mapOCLTypeNameToSPIRV(StringRef Name, StringRef Acc) {
std::string BaseTy;
std::string Postfixes;
@@ -2114,8 +2126,9 @@
namespace {
class SPIRVFriendlyIRMangleInfo : public BuiltinFuncMangleInfo {
public:
- SPIRVFriendlyIRMangleInfo(spv::Op OC, ArrayRef<Type *> ArgTys)
- : OC(OC), ArgTys(ArgTys) {}
+ SPIRVFriendlyIRMangleInfo(spv::Op OC, ArrayRef<Type *> ArgTys,
+ ArrayRef<SPIRVValue *> Ops)
+ : OC(OC), ArgTys(ArgTys), Ops(Ops) {}
void init(StringRef UniqUnmangledName) override {
UnmangledName = UniqUnmangledName.str();
@@ -2275,6 +2288,15 @@
case OpSUDotAccSatKHR:
addUnsignedArg(1);
break;
+ case OpImageWrite: {
+ size_t Idx = getImageOperandsIndex(OC);
+ if (Ops.size() > Idx) {
+ auto ImOp = static_cast<SPIRVConstant *>(Ops[Idx])->getZExtIntValue();
+ if (ImOp & ImageOperandsMask::ImageOperandsZeroExtendMask)
+ addUnsignedArg(2);
+ }
+ break;
+ }
default:;
// No special handling is needed
}
@@ -2283,6 +2305,7 @@
private:
spv::Op OC;
ArrayRef<Type *> ArgTys;
+ ArrayRef<SPIRVValue *> Ops;
};
class OpenCLStdToSPIRVFriendlyIRMangleInfo : public BuiltinFuncMangleInfo {
public:
@@ -2352,9 +2375,9 @@
}
std::string getSPIRVFriendlyIRFunctionName(const std::string &UniqName,
- spv::Op OC,
- ArrayRef<Type *> ArgTys) {
- SPIRVFriendlyIRMangleInfo MangleInfo(OC, ArgTys);
+ spv::Op OC, ArrayRef<Type *> ArgTys,
+ ArrayRef<SPIRVValue *> Ops) {
+ SPIRVFriendlyIRMangleInfo MangleInfo(OC, ArgTys, Ops);
return mangleBuiltin(UniqName, ArgTys, &MangleInfo);
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVWriter.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVWriter.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/SPIRVWriter.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/SPIRVWriter.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -273,7 +273,7 @@
if (auto *PtrTy = dyn_cast<PointerType>(Ty)) {
auto &C = Ty->getContext();
- Type *ElTy = PtrTy->isOpaquePointerTy() ? Type::getVoidTy(C)
+ Type *ElTy = PtrTy->isOpaquePointerTy() ? Type::getInt8Ty(C)
: PtrTy->getPointerElementType();
if (auto *FTy = dyn_cast<FunctionType>(ElTy)) {
// If we have a function pointer, then argument types and return type
of
@@ -337,7 +337,7 @@
// (non-pointer) image or pipe type.
if (T->isPointerTy()) {
auto &C = T->getContext();
- auto *ET = T->isOpaquePointerTy() ? Type::getVoidTy(C)
+ auto *ET = T->isOpaquePointerTy() ? Type::getInt8Ty(C)
: T->getPointerElementType();
auto AddrSpc = T->getPointerAddressSpace();
return transPointerType(ET, AddrSpc);
@@ -731,7 +731,7 @@
if (Ty->isPointerTy()) {
auto &C = Ty->getContext();
PointeeTy = Ty->isOpaquePointerTy()
- ? Type::getVoidTy(C)
+ ? Type::getInt8Ty(C)
: Ty->getNonOpaquePointerElementType();
}
}
@@ -2173,14 +2173,16 @@
if (AtomicRMWInst *ARMW = dyn_cast<AtomicRMWInst>(V)) {
AtomicRMWInst::BinOp Op = ARMW->getOperation();
+ bool SupportedAtomicInst =
+ AtomicRMWInst::isFPOperation(Op)
+ ? (Op == AtomicRMWInst::FAdd || Op == AtomicRMWInst::FSub)
+ : Op != AtomicRMWInst::Nand;
if (!BM->getErrorLog().checkError(
- !AtomicRMWInst::isFPOperation(Op) && Op != AtomicRMWInst::Nand,
- SPIRVEC_InvalidInstruction, V,
+ SupportedAtomicInst, SPIRVEC_InvalidInstruction, V,
"Atomic " + AtomicRMWInst::getOperationName(Op).str() +
" is not supported in SPIR-V!\n"))
return nullptr;
- spv::Op OC = LLVMSPIRVAtomicRmwOpCodeMap::map(Op);
AtomicOrderingCABI Ordering = llvm::toCABI(ARMW->getOrdering());
auto MemSem = OCLMemOrderMap::map(static_cast<OCLMemOrderKind>(Ordering));
std::vector<Value *> Operands(4);
@@ -2194,9 +2196,18 @@
Operands[1] = getUInt32(M, spv::ScopeDevice);
Operands[2] = getUInt32(M, MemSem);
Operands[3] = ARMW->getValOperand();
- std::vector<SPIRVId> Ops = BM->getIds(transValue(Operands, BB));
+ std::vector<SPIRVValue *> OpVals = transValue(Operands, BB);
+ std::vector<SPIRVId> Ops = BM->getIds(OpVals);
SPIRVType *Ty = transType(ARMW->getType());
+ spv::Op OC;
+ if (Op == AtomicRMWInst::FSub) {
+ // Implement FSub through FNegate and AtomicFAddExt
+ Ops[3] = BM->addUnaryInst(OpFNegate, Ty, OpVals[3], BB)->getId();
+ OC = OpAtomicFAddEXT;
+ } else
+ OC = LLVMSPIRVAtomicRmwOpCodeMap::map(Op);
+
return mapValue(V, BM->addInstTemplate(OC, Ops, BB, Ty));
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVEntry.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVEntry.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVEntry.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVEntry.h
2024-02-14 10:48:25.000000000 +0100
@@ -905,7 +905,7 @@
}
SPIRVCapVec getRequiredCapability() const override {
- return getVec(CapabilityLongConstantCompositeINTEL);
+ return getVec(CapabilityLongCompositesINTEL);
}
llvm::Optional<ExtensionID> getRequiredExtension() const override {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVEnum.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVEnum.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVEnum.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVEnum.h
2024-02-14 10:48:25.000000000 +0100
@@ -207,6 +207,8 @@
{CapabilitySubgroupAvcMotionEstimationIntraINTEL});
ADD_VEC_INIT(internal::CapabilityJointMatrixWIInstructionsINTEL,
{internal::CapabilityJointMatrixINTEL});
+ ADD_VEC_INIT(internal::CapabilityCooperativeMatrixPrefetchINTEL,
+ {CapabilityCooperativeMatrixKHR});
}
template <> inline void SPIRVMap<SPIRVExecutionModelKind, SPIRVCapVec>::init()
{
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVInstruction.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVInstruction.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVInstruction.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVInstruction.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -40,6 +40,7 @@
#include "SPIRVInstruction.h"
#include "SPIRVBasicBlock.h"
#include "SPIRVFunction.h"
+#include "SPIRVInternal.h"
#include <unordered_set>
@@ -157,25 +158,13 @@
return getOperandTypes(getOperands());
}
-size_t SPIRVImageInstBase::getImageOperandsIndex() const {
- switch (OpCode) {
- case OpImageRead:
- case OpImageSampleExplicitLod:
- return 2;
- case OpImageWrite:
- return 3;
- default:
- return ~0U;
- }
-}
-
void SPIRVImageInstBase::setOpWords(const std::vector<SPIRVWord> &OpsArg) {
std::vector<SPIRVWord> Ops = OpsArg;
// If the Image Operands field has the SignExtend or ZeroExtend bit set,
// either raise the minimum SPIR-V version to 1.4, or drop the operand
// if SPIR-V 1.4 cannot be emitted.
- size_t ImgOpsIndex = getImageOperandsIndex();
+ size_t ImgOpsIndex = getImageOperandsIndex(OpCode);
if (ImgOpsIndex != ~0U && ImgOpsIndex < Ops.size()) {
SPIRVWord ImgOps = Ops[ImgOpsIndex];
unsigned SignZeroExtMasks = ImageOperandsMask::ImageOperandsSignExtendMask
|
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVInstruction.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVInstruction.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVInstruction.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVInstruction.h
2024-02-14 10:48:25.000000000 +0100
@@ -2743,16 +2743,22 @@
class SPIRVAtomicFAddEXTInst : public SPIRVAtomicInstBase {
public:
llvm::Optional<ExtensionID> getRequiredExtension() const override {
+ assert(hasType());
+ if (getType()->isTypeFloat(16))
+ return ExtensionID::SPV_EXT_shader_atomic_float16_add;
return ExtensionID::SPV_EXT_shader_atomic_float_add;
}
SPIRVCapVec getRequiredCapability() const override {
assert(hasType());
+ if (getType()->isTypeFloat(16))
+ return {CapabilityAtomicFloat16AddEXT};
if (getType()->isTypeFloat(32))
return {CapabilityAtomicFloat32AddEXT};
- assert(getType()->isTypeFloat(64) &&
- "AtomicFAddEXT can only be generated for f32 or f64 types");
- return {CapabilityAtomicFloat64AddEXT};
+ if (getType()->isTypeFloat(64))
+ return {CapabilityAtomicFloat64AddEXT};
+ llvm_unreachable(
+ "AtomicFAddEXT can only be generated for f16, f32, f64 types");
}
};
@@ -2814,9 +2820,6 @@
protected:
void setOpWords(const std::vector<SPIRVWord> &OpsArg) override;
-
-private:
- size_t getImageOperandsIndex() const;
};
#define _SPIRV_OP(x, ...)
\
@@ -3379,6 +3382,24 @@
_SPIRV_OP(JointMatrixWorkItemLength, true, 4)
#undef _SPIRV_OP
+class SPIRVCooperativeMatrixPrefetchINTELInstBase
+ : public SPIRVInstTemplateBase {
+protected:
+ llvm::Optional<ExtensionID> getRequiredExtension() const override {
+ return ExtensionID::SPV_INTEL_joint_matrix;
+ }
+ SPIRVCapVec getRequiredCapability() const override {
+ return getVec(internal::CapabilityCooperativeMatrixPrefetchINTEL);
+ }
+};
+
+#define _SPIRV_OP(x, ...)
\
+ typedef SPIRVInstTemplate<SPIRVCooperativeMatrixPrefetchINTELInstBase,
\
+ internal::Op##x##INTEL, __VA_ARGS__>
\
+ SPIRV##x##INTEL;
+_SPIRV_OP(CooperativeMatrixPrefetch, false, 8, true, 5)
+#undef _SPIRV_OP
+
class SPIRVCooperativeMatrixKHRInstBase : public SPIRVInstTemplateBase {
protected:
llvm::Optional<ExtensionID> getRequiredExtension() const override {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVModule.cpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVModule.cpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVModule.cpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVModule.cpp
2024-02-14 10:48:25.000000000 +0100
@@ -655,6 +655,17 @@
return;
}
SPIRVExt.insert(ExtName);
+
+ // SPV_EXT_shader_atomic_float16_add extends the
+ // SPV_EXT_shader_atomic_float_add extension.
+ // The specification requires both extensions to be added to use
+ // AtomicFloat16AddEXT capability whereas getRequiredExtension()
+ // is able to return a single extensionID.
+ if (Ext == ExtensionID::SPV_EXT_shader_atomic_float16_add) {
+ SPIRVMap<ExtensionID, std::string>::find(
+ ExtensionID::SPV_EXT_shader_atomic_float_add, &ExtName);
+ SPIRVExt.insert(ExtName);
+ }
}
void SPIRVModuleImpl::addCapability(SPIRVCapabilityKind Cap) {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
2024-02-14 10:48:25.000000000 +0100
@@ -594,7 +594,7 @@
add(CapabilityGroupNonUniformRotateKHR, "GroupNonUniformRotateKHR");
add(CapabilityAtomicFloat32AddEXT, "AtomicFloat32AddEXT");
add(CapabilityAtomicFloat64AddEXT, "AtomicFloat64AddEXT");
- add(CapabilityLongConstantCompositeINTEL, "LongConstantCompositeINTEL");
+ add(CapabilityLongCompositesINTEL, "LongCompositesINTEL");
add(CapabilityOptNoneINTEL, "OptNoneINTEL");
add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT");
add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL");
@@ -624,6 +624,8 @@
add(internal::CapabilityCacheControlsINTEL, "CacheControlsINTEL");
add(internal::CapabilityJointMatrixWIInstructionsINTEL,
"JointMatrixWIInstructionsINTEL");
+ add(internal::CapabilityCooperativeMatrixPrefetchINTEL,
+ "CooperativeMatrixPrefetchINTEL");
}
SPIRV_DEF_NAMEMAP(Capability, SPIRVCapabilityNameMap)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/SPIRVOpCodeEnumInternal.h
2024-02-14 10:48:25.000000000 +0100
@@ -16,6 +16,8 @@
internal::OpJointMatrixWorkItemLengthINTEL)
_SPIRV_OP_INTERNAL(JointMatrixGetElementCoordINTEL,
internal::OpJointMatrixGetElementCoordINTEL)
+_SPIRV_OP_INTERNAL(CooperativeMatrixPrefetchINTEL,
+ internal::OpCooperativeMatrixPrefetchINTEL)
_SPIRV_OP_INTERNAL(ComplexFMulINTEL, internal::ComplexFMulINTEL)
_SPIRV_OP_INTERNAL(ComplexFDivINTEL, internal::ComplexFDivINTEL)
_SPIRV_OP_INTERNAL(MaskedGatherINTEL, internal::OpMaskedGatherINTEL)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/spirv_internal.hpp
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/spirv_internal.hpp
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/lib/SPIRV/libSPIRV/spirv_internal.hpp
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/lib/SPIRV/libSPIRV/spirv_internal.hpp
2024-02-14 10:48:25.000000000 +0100
@@ -76,6 +76,7 @@
IOpMaskedGatherINTEL = 6428,
IOpMaskedScatterINTEL = 6429,
IOpJointMatrixGetElementCoordINTEL = 6440,
+ IOpCooperativeMatrixPrefetchINTEL = 6449,
IOpPrev = OpMax - 2,
IOpForward
};
@@ -107,6 +108,7 @@
ICapabilityHWThreadQueryINTEL = 6134,
ICapFPArithmeticFenceINTEL = 6144,
ICapGlobalVariableDecorationsINTEL = 6146,
+ ICapabilityCooperativeMatrixPrefetchINTEL = 6411,
ICapabilityComplexFloatMulDivINTEL = 6414,
ICapabilityTensorFloat32RoundingINTEL = 6425,
ICapabilityMaskedGatherScatterINTEL = 6427,
@@ -168,6 +170,9 @@
_SPIRV_OP(Op, JointMatrixWorkItemLengthINTEL)
_SPIRV_OP(Op, JointMatrixGetElementCoordINTEL)
+_SPIRV_OP(Capability, CooperativeMatrixPrefetchINTEL)
+_SPIRV_OP(Op, CooperativeMatrixPrefetchINTEL)
+
_SPIRV_OP(Capability, HWThreadQueryINTEL)
_SPIRV_OP(BuiltIn, SubDeviceIDINTEL)
_SPIRV_OP(BuiltIn, GlobalHWThreadIDINTEL)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/spirv-headers-tag.conf
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/spirv-headers-tag.conf
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/spirv-headers-tag.conf
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/spirv-headers-tag.conf
2024-02-14 10:48:25.000000000 +0100
@@ -1 +1 @@
-9b527c0fb60124936d0906d44803bec51a0200fb
+1c6bb2743599e6eb6f37b2969acc0aef812e32e3
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/DebugInfo/DebugInfo-GV-with-DIE.spt
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/DebugInfo/DebugInfo-GV-with-DIE.spt
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/DebugInfo/DebugInfo-GV-with-DIE.spt
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/DebugInfo/DebugInfo-GV-with-DIE.spt
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,51 @@
+;; Ensure that reverse translation can handle an Expression in
+;; a DebugGlobalVariable's Variable field.
+;; This is used to preserve a DIExpressions in a DIGlobalVariableExpression.
+
+; RUN: llvm-spirv -to-binary %s -o %t.spv
+; RUN: llvm-spirv -r -o %t.rev.bc %t.spv
+; RUN: llvm-dis %t.rev.bc -o %t.rev.ll
+; RUN: FileCheck %s --input-file %t.rev.ll
+
+; CHECK: ![[#]] = !DIGlobalVariableExpression(var: ![[#GV:]], expr:
!DIExpression(DW_OP_constu, 1, DW_OP_stack_value))
+; CHECK: ![[#GV]] = distinct !DIGlobalVariable(name: "true", scope: ![[#]],
file: ![[#]], line: 3777, type: ![[#]], isLocal: true, isDefinition: true)
+
+119734787 65536 393230 31 0
+2 Capability Addresses
+2 Capability Linkage
+2 Capability Kernel
+8 Extension "SPV_KHR_non_semantic_info"
+5 ExtInstImport 1 "OpenCL.std"
+11 ExtInstImport 2 "NonSemantic.Shader.DebugInfo.100"
+3 MemoryModel 2 2
+7 String 3 "/path/to/test.cpp"
+3 String 6 "0"
+3 String 10 ""
+4 String 16 "bool"
+4 String 23 "true"
+3 Source 0 0
+4 TypeInt 7 32 0
+4 Constant 7 8 1
+4 Constant 7 12 65536
+4 Constant 7 13 4
+4 Constant 7 14 6
+4 Constant 7 17 8
+4 Constant 7 18 2
+4 Constant 7 21 0
+4 Constant 7 25 7
+4 Constant 7 28 3777
+4 Constant 7 29 12
+2 TypeVoid 4
+
+6 ExtInst 4 5 2 DebugSource 3
+7 ExtInst 4 9 2 DebugBuildIdentifier 6 8
+6 ExtInst 4 11 2 DebugStoragePath 10
+9 ExtInst 4 15 2 DebugCompilationUnit 12 13 5 14
+5 ExtInst 4 19 2 DebugInfoNone
+9 ExtInst 4 20 2 DebugTypeBasic 16 17 18 19
+7 ExtInst 4 22 2 DebugTypeQualifier 20 21
+7 ExtInst 4 24 2 DebugOperation 17 8
+6 ExtInst 4 26 2 DebugOperation 25
+7 ExtInst 4 27 2 DebugExpression 24 26
+14 ExtInst 4 30 2 DebugGlobalVariable 23 22 5 28 21 15 10 27 29
+
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/SpecConstants/long-spec-const-composite.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/SpecConstants/long-spec-const-composite.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/SpecConstants/long-spec-const-composite.ll
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/SpecConstants/long-spec-const-composite.ll
2024-02-14 10:48:25.000000000 +0100
@@ -11,7 +11,7 @@
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"
-; CHECK-SPIRV: Capability LongConstantCompositeINTEL
+; CHECK-SPIRV: Capability LongCompositesINTEL
; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
; CHECK-SPIRV-DAG: Decorate [[First:[0-9]+]] SpecId 0
; CHECK-SPIRV-DAG: Decorate [[Last:[0-9]+]] SpecId 65548
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_array_non_constant.spvasm
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_array_non_constant.spvasm
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_array_non_constant.spvasm
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_array_non_constant.spvasm
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,53 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc
+; RUN: FileCheck < %t.rev.ll %s
+
+; CHECK: define spir_func [4 x i8] @non_constant_array_elements(i8
%[[#ARG0:]], i8 %[[#ARG1:]])
+; CHECK: %[[#ArrayPtr:]] = alloca [4 x i8]
+; CHECK: %[[GEP:[0-9a-z.]+]] = getelementptr inbounds [4 x i8], [4 x i8]*
%[[#ArrayPtr]], i32 0, i32 0
+; CHECK: store i8 %[[#ARG1]], i8* %[[GEP]]
+; CHECK: %[[GEP1:[0-9a-z.]+]] = getelementptr inbounds [4 x i8], [4 x i8]*
%[[#ArrayPtr]], i32 0, i32 1
+; CHECK: store i8 %[[#ARG0]], i8* %[[GEP1]]
+; CHECK: %[[GEP2:[0-9a-z.]+]] = getelementptr inbounds [4 x i8], [4 x i8]*
%[[#ArrayPtr]], i32 0, i32 2
+; CHECK: store i8 0, i8* %[[GEP2]]
+; CHECK: %[[GEP3:[0-9a-z.]+]] = getelementptr inbounds [4 x i8], [4 x i8]*
%[[#ArrayPtr]], i32 0, i32 3
+; CHECK: store i8 10, i8* %[[GEP3]]
+
+; CHECK: %[[LoadArr:[0-9a-z.]+]] = load [4 x i8], [4 x i8]* %[[#ArrayPtr]]
+; CHECK: ret [4 x i8] %[[LoadArr]]
+
+; SPIR-V
+; Version: 1.0
+; Generator: Khronos LLVM/SPIR-V Translator; 14
+; Bound: 23
+; Schema: 0
+ OpCapability Addresses
+ OpCapability Linkage
+ OpCapability Kernel
+ OpCapability Int8
+ %1 = OpExtInstImport "OpenCL.std"
+ OpMemoryModel Physical64 OpenCL
+ OpSource Unknown 0
+ OpName %_arr_uchar_uint_4 "arrtype"
+ OpName %non_constant_array_elements
"non_constant_array_elements"
+ OpDecorate %non_constant_array_elements LinkageAttributes
"non_constant_array_elements" Export
+ %uchar = OpTypeInt 8 0
+ %uint = OpTypeInt 32 0
+ %uchar_10 = OpConstant %uchar 10
+ %uchar_0 = OpConstant %uchar 0
+ %uint_0 = OpConstant %uint 0
+ %uint_1 = OpConstant %uint 1
+ %uint_4 = OpConstant %uint 4
+ %_arr_uchar_uint_4 = OpTypeArray %uchar %uint_4
+ %5 = OpTypeFunction %_arr_uchar_uint_4 %uchar %uchar
+%_ptr_Function_uint = OpTypePointer Function %uint
+%non_constant_array_elements = OpFunction %_arr_uchar_uint_4 None %5
+ %484 = OpFunctionParameter %uchar
+ %485 = OpFunctionParameter %uchar
+ %7 = OpLabel
+ %14 = OpCompositeConstruct %_arr_uchar_uint_4 %485 %484 %uchar_0
%uchar_10
+ OpReturnValue %14
+ OpFunctionEnd
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_struct_non_constant.spt
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_struct_non_constant.spt
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_struct_non_constant.spt
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_struct_non_constant.spt
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,48 @@
+; RUN: llvm-spirv %s -to-binary -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -r %t.spv -o %t.bc
+; RUN: llvm-dis %t.bc
+; RUN: FileCheck < %t.ll %s
+
+; CHECK: %[[StructTy:[0-9a-z.]+]] = type { float, i32 }
+; CHECK: %[[#StructPtr:]] = alloca %[[StructTy]]
+; CHECK: %[[GEP:[0-9a-z.]+]] = getelementptr inbounds %[[StructTy]],
%[[StructTy]]* %[[#StructPtr]], i32 0, i32 0
+; CHECK: store float %[[#]], float* %[[GEP]]
+; CHECK: %[[GEP1:[0-9a-z.]+]] = getelementptr inbounds %[[StructTy]],
%[[StructTy]]* %[[#StructPtr]], i32 0, i32 1
+; CHECK: store i32 %[[#]], i32* %[[GEP1]]
+; CHECK: %[[LoadStr:[0-9a-z.]+]] = load %[[StructTy]], %[[StructTy]]*
%[[#StructPtr]]
+; CHECK: ret %[[StructTy]] %[[LoadStr]]
+
+119734787 65536 393230 23 0
+2 Capability Addresses
+2 Capability Linkage
+2 Capability Kernel
+5 ExtInstImport 1 "OpenCL.std"
+3 MemoryModel 2 2
+3 Source 0 0
+5 Name 2 "structtype"
+9 Name 6 "non_constant_struct_fields"
+11 Decorate 6 LinkageAttributes "non_constant_struct_fields" Export
+4 Decorate 9 Alignment 4
+4 Decorate 11 Alignment 4
+4 TypeInt 4 32 0
+4 Constant 4 17 0
+4 Constant 4 20 1
+3 TypeFloat 3 32
+4 TypeStruct 2 3 4
+
+3 TypeFunction 5 2
+4 TypePointer 8 7 4
+4 TypePointer 10 7 3
+
+5 Function 2 6 0 5
+
+2 Label 7
+4 Variable 8 9 7
+4 Variable 10 11 7
+4 Load 4 12 9
+4 Load 3 13 11
+5 CompositeConstruct 2 14 13 12
+2 ReturnValue 14
+
+1 FunctionEnd
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_vector_non_constant.spvasm
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_vector_non_constant.spvasm
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/composite_construct_vector_non_constant.spvasm
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/composite_construct_vector_non_constant.spvasm
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,40 @@
+; REQUIRES: spirv-as
+; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc
+; RUN: FileCheck < %t.rev.ll %s
+
+; CHECK: define spir_func <3 x i32> @non_constant_vector_elements(i32
%[[#ARG0:]], i32 %[[#ARG1:]])
+; CHECK: %[[#VEC0:]] = insertelement <3 x i32> poison, i32 %[[#ARG1]], i32 0
+; CHECK: %[[#VEC1:]] = insertelement <3 x i32> %[[#VEC0]], i32 %[[#ARG0]], i32
1
+; CHECK: %[[#VEC2:]] = insertelement <3 x i32> %[[#VEC1]], i32 1, i32 2
+; CHECK: ret <3 x i32> %[[#VEC2]]
+
+; SPIR-V
+; Version: 1.0
+; Generator: Khronos LLVM/SPIR-V Translator; 14
+; Bound: 23
+; Schema: 0
+ OpCapability Addresses
+ OpCapability Linkage
+ OpCapability Kernel
+ %1 = OpExtInstImport "OpenCL.std"
+ OpMemoryModel Physical64 OpenCL
+ OpSource Unknown 0
+ OpName %vectype "vectype"
+ OpName %non_constant_vector_elements
"non_constant_vector_elements"
+ OpDecorate %non_constant_vector_elements LinkageAttributes
"non_constant_vector_elements" Export
+ %uint = OpTypeInt 32 0
+ %uint_0 = OpConstant %uint 0
+ %uint_1 = OpConstant %uint 1
+ %vectype = OpTypeVector %uint 3
+ %5 = OpTypeFunction %vectype %uint %uint
+%_ptr_Function_uint = OpTypePointer Function %uint
+%non_constant_vector_elements = OpFunction %vectype None %5
+ %484 = OpFunctionParameter %uint
+ %485 = OpFunctionParameter %uint
+ %7 = OpLabel
+ %14 = OpCompositeConstruct %vectype %485 %484 %uint_1
+ OpReturnValue %14
+ OpFunctionEnd
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_double.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_double.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_double.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_double.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,33 @@
+; RUN: llvm-as -opaque-pointers < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers
--spirv-ext=+SPV_EXT_shader_atomic_float_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -opaque-pointers -to-text %t.spv -o - | FileCheck %s
+
+; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-DAG: Capability AtomicFloat64AddEXT
+; CHECK: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
+; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK: TypeFloat [[Double:[0-9]+]] 64
+; CHECK: Variable {{[0-9]+}} [[DoublePointer:[0-9]+]]
+; CHECK: Constant [[Double]] [[DoubleValue:[0-9]+]] 0 1078263808
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global double
0.000000e+00, align 8
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fadd double addrspace(1)* @f, double 42.000000e+00 seq_cst
+; CHECK: AtomicFAddEXT [[Double]] {{[0-9]+}} [[DoublePointer]]
[[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[DoubleValue]]
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_float.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_float.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_float.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_float.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,33 @@
+; RUN: llvm-as -opaque-pointers < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers
--spirv-ext=+SPV_EXT_shader_atomic_float_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -opaque-pointers -to-text %t.spv -o - | FileCheck %s
+
+; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-DAG: Capability AtomicFloat32AddEXT
+; CHECK: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
+; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK: TypeFloat [[Float:[0-9]+]] 32
+; CHECK: Variable {{[0-9]+}} [[FPPointer:[0-9]+]]
+; CHECK: Constant [[Float]] [[FPValue:[0-9]+]] 1109917696
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global float
0.000000e+00, align 4
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fadd float addrspace(1)* @f, float 42.000000e+00 seq_cst
+; CHECK: AtomicFAddEXT [[Float]] {{[0-9]+}} [[FPPointer]] [[Scope_Device]]
[[MemSem_SequentiallyConsistent]] [[FPValue]]
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_half.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_half.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_half.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fadd_half.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,34 @@
+; RUN: llvm-as -opaque-pointers < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers
--spirv-ext=+SPV_EXT_shader_atomic_float16_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -opaque-pointers -to-text %t.spv -o - | FileCheck %s
+
+; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float16_add"
+; CHECK-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-DAG: Capability AtomicFloat16AddEXT
+; CHECK: TypeInt [[TypeIntID:[0-9]+]] 32 0
+; CHECK-DAG: Constant [[TypeIntID]] [[ScopeDevice:[0-9]+]] 1 {{$}}
+; CHECK-DAG: Constant [[TypeIntID]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK: TypeFloat [[TypeFloatHalfID:[0-9]+]] 16
+; CHECK: Variable {{[0-9]+}} [[HalfPointer:[0-9]+]]
+; CHECK: Constant [[TypeFloatHalfID]] [[HalfValue:[0-9]+]] 20800
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global half
0.000000e+00, align 4
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fadd ptr addrspace(1) @f, half 42.000000e+00 seq_cst
+; CHECK: AtomicFAddEXT [[TypeFloatHalfID]] {{[0-9]+}} [[HalfPointer]]
[[ScopeDevice]] [[MemSem_SequentiallyConsistent]] [[HalfValue]]
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_double.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_double.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_double.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_double.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,38 @@
+; RUN: llvm-as -opaque-pointers=0 < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers=0
--spirv-ext=+SPV_EXT_shader_atomic_float_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck --check-prefix=CHECK-SPIRV
%s
+
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis -opaque-pointers=0 %t.rev.bc -o - | FileCheck %s
--check-prefixes=CHECK-LLVM
+
+; CHECK-SPIRV-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-SPIRV-DAG: Capability AtomicFloat64AddEXT
+; CHECK-SPIRV: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-SPIRV-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
+; CHECK-SPIRV-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK-SPIRV: TypeFloat [[Double:[0-9]+]] 64
+; CHECK-SPIRV: Variable {{[0-9]+}} [[DoublePointer:[0-9]+]]
+; CHECK-SPIRV: Constant [[Double]] [[DoubleValue:[0-9]+]] 0 1078263808
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global double
0.000000e+00, align 8
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fsub double addrspace(1)* @f, double 42.000000e+00 seq_cst
+; CHECK-SPIRV: FNegate [[Double]] [[NegateValue:[0-9]+]] [[DoubleValue]]
+; CHECK-SPIRV: AtomicFAddEXT [[Double]] {{[0-9]+}} [[DoublePointer]]
[[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[NegateValue]]
+; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg double 4.200000e+01
+; CHECK-LLVM: call spir_func double {{.*}}atomic_add{{.*}}(double
addrspace(1)* @f, double [[FNegateLLVM]])
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_float.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_float.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_float.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_float.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,38 @@
+; RUN: llvm-as -opaque-pointers=0 < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers=0
--spirv-ext=+SPV_EXT_shader_atomic_float_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck --check-prefix=CHECK-SPIRV
%s
+
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis -opaque-pointers=0 %t.rev.bc -o - | FileCheck %s
--check-prefixes=CHECK-LLVM
+
+; CHECK-SPIRV-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-SPIRV-DAG: Capability AtomicFloat32AddEXT
+; CHECK-SPIRV: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-SPIRV-DAG: Constant [[Int]] [[Scope_Device:[0-9]+]] 1 {{$}}
+; CHECK-SPIRV-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK-SPIRV: TypeFloat [[Float:[0-9]+]] 32
+; CHECK-SPIRV: Variable {{[0-9]+}} [[FPPointer:[0-9]+]]
+; CHECK-SPIRV: Constant [[Float]] [[FPValue:[0-9]+]] 1109917696
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global float
0.000000e+00, align 4
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fsub float addrspace(1)* @f, float 42.000000e+00 seq_cst
+; CHECK-SPIRV: FNegate [[Float]] [[NegateValue:[0-9]+]] [[FPValue]]
+; CHECK-SPIRV: AtomicFAddEXT [[Float]] {{[0-9]+}} [[FPPointer]]
[[Scope_Device]] [[MemSem_SequentiallyConsistent]] [[NegateValue]]
+; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg float 4.200000e+01
+; CHECK-LLVM: call spir_func float {{.*}}atomic_add{{.*}}(float addrspace(1)*
@f, float [[FNegateLLVM]])
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/extensions/EXT/SPV_EXT_shader_atomic_float_/atomicrmw_fsub_half.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,39 @@
+; RUN: llvm-as -opaque-pointers=0 < %s -o %t.bc
+; RUN: llvm-spirv -opaque-pointers=0
--spirv-ext=+SPV_EXT_shader_atomic_float16_add %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck --check-prefix=CHECK-SPIRV
%s
+
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis -opaque-pointers=0 %t.rev.bc -o - | FileCheck %s
--check-prefixes=CHECK-LLVM
+
+; CHECK-SPIRV-DAG: Extension "SPV_EXT_shader_atomic_float16_add"
+; CHECK-SPIRV-DAG: Extension "SPV_EXT_shader_atomic_float_add"
+; CHECK-SPIRV-DAG: Capability AtomicFloat16AddEXT
+; CHECK-SPIRV: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-SPIRV-DAG: Constant [[Int]] [[ScopeDevice:[0-9]+]] 1 {{$}}
+; CHECK-SPIRV-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK-SPIRV: TypeFloat [[Half:[0-9]+]] 16
+; CHECK-SPIRV: Variable {{[0-9]+}} [[HalfPointer:[0-9]+]]
+; CHECK-SPIRV: Constant [[Half]] [[HalfValue:[0-9]+]] 15360
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global half
0.000000e+00, align 4
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fsub half addrspace(1)* @f, half 1.0e+00 seq_cst
+; CHECK-SPIRV: FNegate [[Half]] [[NegateValue:[0-9]+]] [[HalfValue]]
+; CHECK-SPIRV: AtomicFAddEXT [[Half]] {{[0-9]+}} [[HalfPointer]]
[[ScopeDevice]] [[MemSem_SequentiallyConsistent]] [[NegateValue]]
+; CHECK-LLVM: [[FNegateLLVM:%[0-9]+]] = fneg half 0xH3C00
+; CHECK-LLVM: call spir_func half {{.*}}atomic_add{{.*}}(half addrspace(1)*
@f, half [[FNegateLLVM]])
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/long-constant-array.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/long-constant-array.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/long-constant-array.ll
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/long-constant-array.ll
2024-02-14 10:48:25.000000000 +0100
@@ -9,7 +9,7 @@
; TODO: run validator once it supports the extension
; RUNx: spirv-val %t.spv
-; CHECK-SPIRV: Capability LongConstantCompositeINTEL
+; CHECK-SPIRV: Capability LongCompositesINTEL
; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
; CHECK-SPIRV: TypeInt [[TInt:[0-9]+]] 8
; CHECK-SPIRV: Constant {{[0-9]+}} [[ArrSize:[0-9]+]] 78000
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/long-type-struct.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/long-type-struct.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/long-type-struct.ll
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/long-type-struct.ll
2024-02-14 10:48:25.000000000 +0100
@@ -10,7 +10,7 @@
; RUN: not llvm-spirv %t.bc -o %t.spv 2>&1 | FileCheck %s
--check-prefix=CHECK-ERROR
-; CHECK-SPIRV: Capability LongConstantCompositeINTEL
+; CHECK-SPIRV: Capability LongCompositesINTEL
; CHECK-SPIRV: Extension "SPV_INTEL_long_constant_composite"
; CHECK-SPIRV: TypeForwardPointer [[TFwdPtr:[0-9]+]]
; CHECK-SPIRV: TypeInt [[TInt:[0-9]+]]
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/SPV_INTEL_function_pointers/global_ctor_dtor_opaque.spt
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/SPV_INTEL_function_pointers/global_ctor_dtor_opaque.spt
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/SPV_INTEL_function_pointers/global_ctor_dtor_opaque.spt
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/SPV_INTEL_function_pointers/global_ctor_dtor_opaque.spt
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,54 @@
+119734787 65792 393230 22 0
+2 Capability Addresses
+2 Capability Linkage
+2 Capability Kernel
+2 Capability Int64
+2 Capability Int8
+2 Capability FunctionPointersINTEL
+8 Extension "SPV_INTEL_function_pointers"
+5 ExtInstImport 1 "OpenCL.std"
+3 MemoryModel 2 2
+3 Source 0 0
+7 Name 14 "asan.module_ctor"
+7 Name 15 "asan.module_ctor"
+7 Name 20 "llvm.global_ctors"
+
+9 Decorate 20 LinkageAttributes "llvm.global_ctors" Export
+4 TypeInt 3 32 0
+4 TypeInt 4 8 0
+4 TypeInt 6 64 0
+5 Constant 6 7 1 0
+4 Constant 3 10 1
+4 TypePointer 5 7 4
+5 TypeStruct 2 3 5 5
+
+4 TypeArray 8 2 7
+4 TypePointer 9 7 8
+2 TypeVoid 11
+3 TypeFunction 12 11
+4 TypePointer 13 7 12
+4 ConstantFunctionPointerINTEL 13 15 14
+5 SpecConstantOp 5 16 124 15
+3 ConstantNull 5 17
+6 ConstantComposite 2 18 10 16 17
+
+4 ConstantComposite 8 19 18
+
+5 Variable 9 20 7 19
+
+
+
+5 Function 11 14 0 12
+
+2 Label 21
+1 Return
+
+1 FunctionEnd
+
+; RUN: llvm-spirv %s --to-binary -o %t.spv
+; RUN: llvm-spirv -r %t.spv -o %t.bc
+; RUN: llvm-dis %t.bc -o %t.ll
+; RUN: FileCheck --input-file=%t.ll %s --check-prefix=CHECK-LLVM
+
+; CHECK-LLVM: [[TY:%.*]] = type { i32, void ()*, i8* }
+; CHECK-LLVM: @llvm.global_ctors = appending global [1 x [[TY]]] [[[TY]] { i32
1, void ()* @asan.module_ctor, i8* null }]
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/SPV_INTEL_joint_matrix/cooperative_matrix_prefetch.ll
2024-02-14 10:48:25.000000000 +0100
@@ -0,0 +1,166 @@
+; This is an adapted copy of
test/transcoding/SPV_INTEL_joint_matrix/joint_matrix.ll
+
+; RUN: llvm-as < %s -o %t.bc
+; RUN: llvm-spirv %t.bc
--spirv-ext=+SPV_KHR_cooperative_matrix,+SPV_INTEL_joint_matrix -o %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o %t.spt
+; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
+
+; RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o %t.rev.ll
+; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM
+
+; CHECK-SPIRV-DAG: Capability CooperativeMatrixKHR
+; CHECK-SPIRV-DAG: Capability CooperativeMatrixPrefetchINTEL
+; CHECK-SPIRV-DAG: Extension "SPV_KHR_cooperative_matrix"
+; CHECK-SPIRV-DAG: Extension "SPV_INTEL_joint_matrix"
+; CHECK-SPIRV-DAG: TypeInt [[#Int8Ty:]] 8 0
+; CHECK-SPIRV-DAG: TypeInt [[#Int32Ty:]] 32 0
+; CHECK-SPIRV-DAG: Constant [[#Int32Ty]] [[#Const12:]] 12
+; CHECK-SPIRV-DAG: Constant [[#Int32Ty]] [[#Const48:]] 48
+; CHECK-SPIRV-DAG: Constant [[#Int32Ty]] [[#Const0:]] 0
+; CHECK-SPIRV-DAG: Constant [[#Int32Ty]] [[#Const3:]] 3
+; CHECK-SPIRV-DAG: Constant [[#Int32Ty]] [[#Const2:]] 2
+; CHECK-SPIRV-DAG: TypeCooperativeMatrixKHR [[#MatTy1:]] [[#Int8Ty]]
[[#Const0]] [[#Const12]] [[#Const48]] [[#Const3]]
+; CHECK-SPIRV-DAG: TypeCooperativeMatrixKHR [[#MatTy2:]] [[#Int32Ty]]
[[#Const3]] [[#Const12]] [[#Const12]] [[#Const3]]
+; CHECK-SPIRV-DAG: TypeCooperativeMatrixKHR [[#MatTy3:]] [[#Int8Ty]]
[[#Const2]] [[#Const48]] [[#Const12]] [[#Const3]]
+
+; CHECK-SPIRV: CooperativeMatrixPrefetchINTEL
+; CHECK-SPIRV: CooperativeMatrixLoadKHR [[#MatTy1]] [[#Load1:]]
+; TODO: Pass Matrix Type Id instead of Matrix Id to CooperativeMatrixLengthKHR.
+; CHECK-SPIRV: CooperativeMatrixLengthKHR [[#Int32Ty]] [[#]] [[#Load1]]
+; CHECK-SPIRV: CompositeConstruct [[#MatTy2]]
+; CHECK-SPIRV: CooperativeMatrixPrefetchINTEL
+; CHECK-SPIRV: CooperativeMatrixLoadKHR [[#MatTy3]]
+; CHECK-SPIRV: CooperativeMatrixMulAddKHR [[#MatTy2]]
+; CHECK-SPIRV: CooperativeMatrixStoreKHR
+
+; CHECK-LLVM: call spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4siiiiiil(i16 addrspace(4)*
%{{.*}}, i32 0, i32 0, i32 12, i32 48, i32 0, i32 0, i64 %_arg_1)
+; CHECK-LLVM: call spir_func %spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(1)*
@_Z86__spirv_CooperativeMatrixLoadKHR_RPU3AS144__spirv_CooperativeMatrixKHR__char_0_12_48_3PU3AS4slii
+; CHECK-LLVM: call spir_func i32
@_Z34__spirv_CooperativeMatrixLengthKHRPU3AS144__spirv_CooperativeMatrixKHR__char_0_12_48_3(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(1)*
+; CHECK-LLVM: call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(1)* @_Z26__spirv_CompositeConstructi(i32 42)
+; CHECK-LLVM: call spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4ciiiiiil(i8 addrspace(4)*
%{{.*}}, i32 0, i32 0, i32 12, i32 48, i32 0, i32 0, i64 %_arg_1)
+; CHECK-LLVM: call spir_func %spirv.CooperativeMatrixKHR._char_2_48_12_3
addrspace(1)*
@_Z86__spirv_CooperativeMatrixLoadKHR_RPU3AS144__spirv_CooperativeMatrixKHR__char_2_48_12_3PU3AS4cl
+; CHECK-LLVM: call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(1)*
@_Z34__spirv_CooperativeMatrixMulAddKHRPU3AS144__spirv_CooperativeMatrixKHR__char_0_12_48_3PU3AS144__spirv_CooperativeMatrixKHR__char_2_48_12_3PU3AS143__spirv_CooperativeMatrixKHR__int_3_12_12_3i(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(1)* %{{.*}}, %spirv.CooperativeMatrixKHR._char_2_48_12_3
addrspace(1)* %{{.*}}, %spirv.CooperativeMatrixKHR._int_3_12_12_3 addrspace(1)*
+; CHECK-LLVM: call spir_func void
@_Z33__spirv_CooperativeMatrixStoreKHRPU3AS4sPU3AS143__spirv_CooperativeMatrixKHR__int_3_12_12_3ili(i16
addrspace(4)* %add.ptr7.i, %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(1)*
+; CHECK-LLVM: call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(1)* @_Z26__spirv_CompositeConstructi(i32 %zero)
+
+; ModuleID = 'test-matrix-opaque.bc'
+source_filename = "matrix-int8-test.cpp"
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spir64-unknown-unknown"
+
+%spirv.CooperativeMatrixKHR._int_3_12_12_3 = type { [12 x [12 x i32]]* }
+%spirv.CooperativeMatrixKHR._char_0_12_48_3 = type { [12 x [48 x i8]]* }
+%spirv.CooperativeMatrixKHR._char_2_48_12_3 = type { [48 x [12 x i8]]* }
+
+$_ZTSZ4mainE11matrix_test = comdat any
+
+@__spirv_BuiltInGlobalInvocationId = external dso_local local_unnamed_addr
addrspace(1) constant <3 x i64>, align 32
+@__spirv_BuiltInLocalInvocationId = external dso_local local_unnamed_addr
addrspace(1) constant <3 x i64>, align 32
+
+; Function Attrs: convergent norecurse
+define weak_odr dso_local spir_kernel void @_ZTSZ4mainE11matrix_test(i16
addrspace(1)* %_arg_, i64 %_arg_1, i8 addrspace(1)* %_arg_3, i8 addrspace(1)*
%_arg_5) local_unnamed_addr #0 comdat !kernel_arg_buffer_location !5
!intel_reqd_sub_group_size !6 {
+entry:
+ %0 = load <3 x i64>, <3 x i64> addrspace(4)* addrspacecast (<3 x i64>
addrspace(1)* @__spirv_BuiltInGlobalInvocationId to <3 x i64> addrspace(4)*),
align 32, !noalias !7
+ %1 = extractelement <3 x i64> %0, i64 1
+ %2 = extractelement <3 x i64> %0, i64 0
+ %3 = load <3 x i64>, <3 x i64> addrspace(4)* addrspacecast (<3 x i64>
addrspace(1)* @__spirv_BuiltInLocalInvocationId to <3 x i64> addrspace(4)*),
align 32, !noalias !14
+ %4 = extractelement <3 x i64> %3, i64 1
+ %5 = extractelement <3 x i64> %3, i64 0
+ %cmp.i.i = icmp ult i64 %1, 2147483648
+ tail call void @llvm.assume(i1 %cmp.i.i)
+ %cmp.i45.i = icmp ult i64 %2, 2147483648
+ tail call void @llvm.assume(i1 %cmp.i45.i)
+ %cmp.i43.i = icmp ult i64 %4, 2147483648
+ tail call void @llvm.assume(i1 %cmp.i43.i)
+ %sub.i = sub nsw i64 %1, %4
+ %cmp.i41.i = icmp ult i64 %5, 2147483648
+ tail call void @llvm.assume(i1 %cmp.i41.i)
+ %sub5.i = sub nsw i64 %2, %5
+ %mul6.i = shl nsw i64 %sub.i, 6
+ %add.ptr.i51 = getelementptr inbounds i16, i16 addrspace(1)* %_arg_, i64
%mul6.i
+ %add.ptr7.i52 = getelementptr inbounds i16, i16 addrspace(1)* %add.ptr.i51,
i64 %sub5.i
+ %add.ptr7.i = addrspacecast i16 addrspace(1)* %add.ptr7.i52 to i16
addrspace(4)*
+ tail call spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4siiiiiil(i16 addrspace(4)*
noundef %add.ptr7.i, i32 noundef 0, i32 noundef 0, i32 noundef 12, i32 noundef
48, i32 noundef 0, i32 noundef 0, i64 noundef %_arg_1)
+ %call8.i = tail call spir_func %spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(4)* @_Z32__spirv_CooperativeMatrixLoadKHR_1(i16 addrspace(4)*
%add.ptr7.i, i64 %_arg_1, i32 0, i32 3) #3
+ %add.ptr11.i53 = getelementptr inbounds i8, i8 addrspace(1)* %_arg_3, i64
%mul6.i
+ %add.ptr16.i55 = getelementptr inbounds i8, i8 addrspace(1)* %_arg_5, i64
%sub5.i
+ %len = tail call spir_func noundef i32
@_Z34__spirv_CooperativeMatrixLengthKHR(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(4)* %call8.i)
+
+ %C.0.i = call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)* @_Z26__spirv_CompositeConstruct(i32 42) #1
+ %add.ptr12.i54 = getelementptr inbounds i8, i8 addrspace(1)* %add.ptr11.i53,
i64 0
+ %add.ptr12.i = addrspacecast i8 addrspace(1)* %add.ptr12.i54 to i8
addrspace(4)*
+ tail call spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4ciiiiiil(i8 addrspace(4)*
noundef %add.ptr12.i, i32 noundef 0, i32 noundef 0, i32 noundef 12, i32 noundef
48, i32 noundef 0, i32 noundef 0, i64 noundef %_arg_1)
+ %call13.i = tail call spir_func %spirv.CooperativeMatrixKHR._char_2_48_12_3
addrspace(4)* @_Z32__spirv_CooperativeMatrixLoadKHR_2(i8 addrspace(4)*
%add.ptr12.i, i64 %_arg_1) #3
+ %add.ptr17.i56 = getelementptr inbounds i8, i8 addrspace(1)* %add.ptr16.i55,
i64 0
+ %add.ptr17.i = addrspacecast i8 addrspace(1)* %add.ptr17.i56 to i8
addrspace(4)*
+ %call19.i = tail call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)*
@_Z34__spirv_CooperativeMatrixMulAddKHR(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(4)* %call8.i, %spirv.CooperativeMatrixKHR._char_2_48_12_3
addrspace(4)* %call13.i, %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)* %C.0.i, i32 3) #3
+ tail call spir_func void @_Z33__spirv_CooperativeMatrixStoreKHR(i16
addrspace(4)* %add.ptr7.i, %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)* %C.0.i, i32 0, i64 %_arg_1, i32 3) #3
+
+ %ref.tmp = alloca i32, align 4
+ %ref.tmp.ascast = addrspacecast i32* %ref.tmp to i32 addrspace(4)*
+ store i32 0, i32 addrspace(4)* %ref.tmp.ascast, align 4
+ %zero = load i32, i32 addrspace(4)* %ref.tmp.ascast, align 8
+ %C.0.i.new.load = call spir_func %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)* @_Z26__spirv_CompositeConstruct(i32 %zero) #1
+
+ ret void
+}
+
+; Function Attrs: convergent
+declare dso_local spir_func noundef %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)* @_Z26__spirv_CompositeConstruct(i32 noundef) local_unnamed_addr #2
+
+; Function Attrs: convergent
+declare dso_local spir_func noundef i32
@_Z34__spirv_CooperativeMatrixLengthKHR(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(4)* noundef)
+
+; Function Attrs: convergent
+declare dso_local spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4siiiiiil(i16 addrspace(4)*
noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32
noundef, i64 noundef) local_unnamed_addr
+
+; Function Attrs: convergent
+declare dso_local spir_func void
@_Z38__spirv_CooperativeMatrixPrefetchINTELPU3AS4ciiiiiil(i8 addrspace(4)*
noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32
noundef, i64 noundef) local_unnamed_addr
+
+; Function Attrs: convergent
+declare dso_local spir_func noundef
%spirv.CooperativeMatrixKHR._char_0_12_48_3 addrspace(4)*
@_Z32__spirv_CooperativeMatrixLoadKHR_1(i16 addrspace(4)* noundef, i64 noundef,
i32 noundef, i32 noundef) local_unnamed_addr #2
+
+; Function Attrs: convergent
+declare dso_local spir_func noundef
%spirv.CooperativeMatrixKHR._char_2_48_12_3 addrspace(4)*
@_Z32__spirv_CooperativeMatrixLoadKHR_2(i8 addrspace(4)* noundef, i64 noundef)
local_unnamed_addr #2
+
+; Function Attrs: convergent
+declare dso_local spir_func noundef %spirv.CooperativeMatrixKHR._int_3_12_12_3
addrspace(4)*
@_Z34__spirv_CooperativeMatrixMulAddKHR(%spirv.CooperativeMatrixKHR._char_0_12_48_3
addrspace(4)* noundef, %spirv.CooperativeMatrixKHR._char_2_48_12_3
addrspace(4)* noundef, %spirv.CooperativeMatrixKHR._int_3_12_12_3 addrspace(4)*
noundef, i32 noundef) local_unnamed_addr #2
+
+; Function Attrs: convergent
+declare dso_local spir_func void @_Z33__spirv_CooperativeMatrixStoreKHR(i16
addrspace(4)* noundef, %spirv.CooperativeMatrixKHR._int_3_12_12_3 addrspace(4)*
noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
+
+; Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
+declare void @llvm.assume(i1 noundef) #2
+
+attributes #0 = { convergent norecurse "frame-pointer"="all"
"min-legal-vector-width"="0" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" "sycl-module-id"="./joint_matrix_test.cpp"
"uniform-work-group-size"="true" }
+attributes #1 = { convergent "frame-pointer"="all" "no-trapping-math"="true"
"stack-protector-buffer-size"="8" }
+attributes #2 = { inaccessiblememonly nofree nosync nounwind willreturn }
+attributes #3 = { convergent }
+
+!llvm.module.flags = !{!0, !1}
+!opencl.spir.version = !{!2}
+!spirv.Source = !{!3}
+!llvm.ident = !{!4}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
+!1 = !{i32 7, !"frame-pointer", i32 2}
+!2 = !{i32 1, i32 2}
+!3 = !{i32 4, i32 100000}
+!4 = !{!"clang version 13.0.0 (https://github.com/intel/llvm.git
b3243d9f711a1cd80681530d6017324796668d51)"}
+!5 = !{i32 -1, i32 -1, i32 -1, i32 -1}
+!6 = !{i32 16}
+!7 = !{!8, !10, !12}
+!8 = distinct !{!8, !9,
!"_ZN7__spirv29InitSizesSTGlobalInvocationIdILi2EN2cl4sycl2idILi2EEEE8initSizeEv:
%agg.result"}
+!9 = distinct !{!9,
!"_ZN7__spirv29InitSizesSTGlobalInvocationIdILi2EN2cl4sycl2idILi2EEEE8initSizeEv"}
+!10 = distinct !{!10, !11,
!"_ZN7__spirvL22initGlobalInvocationIdILi2EN2cl4sycl2idILi2EEEEET0_v:
%agg.result"}
+!11 = distinct !{!11,
!"_ZN7__spirvL22initGlobalInvocationIdILi2EN2cl4sycl2idILi2EEEEET0_v"}
+!12 = distinct !{!12, !13,
!"_ZN2cl4sycl6detail7Builder10getElementILi2EEEKNS0_7nd_itemIXT_EEEPS5_:
%agg.result"}
+!13 = distinct !{!13,
!"_ZN2cl4sycl6detail7Builder10getElementILi2EEEKNS0_7nd_itemIXT_EEEPS5_"}
+!14 = !{!15, !17, !12}
+!15 = distinct !{!15, !16,
!"_ZN7__spirv28InitSizesSTLocalInvocationIdILi2EN2cl4sycl2idILi2EEEE8initSizeEv:
%agg.result"}
+!16 = distinct !{!16,
!"_ZN7__spirv28InitSizesSTLocalInvocationIdILi2EN2cl4sycl2idILi2EEEE8initSizeEv"}
+!17 = distinct !{!17, !18,
!"_ZN7__spirvL21initLocalInvocationIdILi2EN2cl4sycl2idILi2EEEEET0_v:
%agg.result"}
+!18 = distinct !{!18,
!"_ZN7__spirvL21initLocalInvocationIdILi2EN2cl4sycl2idILi2EEEEET0_v"}
+!19 = distinct !{!19, !20, !21}
+!20 = !{!"llvm.loop.mustprogress"}
+!21 = !{!"llvm.loop.unroll.disable"}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/image_signedness.ll
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/image_signedness.ll
---
old/SPIRV-LLVM-Translator-493353d7fdc655f9f31abc874dd0adef7dd241c1/test/transcoding/image_signedness.ll
2023-11-29 12:18:38.000000000 +0100
+++
new/SPIRV-LLVM-Translator-2221771c28dc224d5d560faf6a2cd73f8ecf713d/test/transcoding/image_signedness.ll
2024-02-14 10:48:25.000000000 +0100
@@ -5,6 +5,8 @@
; RUN: spirv-val %t.spv
; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
+; RUN: llvm-spirv -r --spirv-target-env=SPV-IR %t.spv -o %t.rev.bc
+; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-SPV-IR
; ModuleID = 'image_signedness.ll'
target datalayout =
"e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
@@ -21,6 +23,11 @@
; CHECK-LLVM: call spir_func <4 x i32>
@_Z12read_imageui20ocl_image1d_array_rwDv2_i(
; CHECK-LLVM: call spir_func <4 x i32> @_Z12read_imageui14ocl_image1d_roi(
; CHECK-LLVM: call spir_func <4 x i32> @_Z11read_imagei14ocl_image1d_roi(
+; CHECK-SPV-IR: call spir_func <4 x i32>
@_Z37__spirv_ImageSampleExplicitLod_Ruint4PU3AS140__spirv_SampledImage__void_0_0_0_0_0_0_0iif(
+; CHECK-SPV-IR: call spir_func <4 x i32>
@_Z36__spirv_ImageSampleExplicitLod_Rint4PU3AS140__spirv_SampledImage__void_0_0_0_0_0_0_0iif(
+; CHECK-SPV-IR: call spir_func <4 x i32>
@_Z24__spirv_ImageRead_Ruint4PU3AS133__spirv_Image__void_0_0_1_0_0_0_2Dv2_ii(
+; CHECK-SPV-IR: call spir_func <4 x i32>
@_Z24__spirv_ImageRead_Ruint4PU3AS133__spirv_Image__void_0_0_0_0_0_0_0ii(
+; CHECK-SPV-IR: call spir_func <4 x i32>
@_Z23__spirv_ImageRead_Rint4PU3AS133__spirv_Image__void_0_0_0_0_0_0_0ii(
; Function Attrs: convergent nounwind
define dso_local spir_kernel void @imagereads(%opencl.image1d_ro_t
addrspace(1)* %im, %opencl.image1d_array_rw_t addrspace(1)* %ima, <4 x i32>
addrspace(1)* nocapture %res, <4 x i32> addrspace(1)* nocapture %resu)
local_unnamed_addr #0 !kernel_arg_addr_space !4 !kernel_arg_access_qual !5
!kernel_arg_type !6 !kernel_arg_base_type !7 !kernel_arg_type_qual !8 {
@@ -42,6 +49,8 @@
; CHECK-LLVM-LABEL: @imagewrites
; CHECK-LLVM: call spir_func void @_Z12write_imagei14ocl_image2d_woDv2_iDv4_i(
; CHECK-LLVM: call spir_func void @_Z13write_imageui14ocl_image2d_woDv2_iDv4_j(
+; CHECK-SPV-IR: call spir_func void
@_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_1_0_0_0_0_0_1Dv2_iDv4_ii(
+; CHECK-SPV-IR: call spir_func void
@_Z18__spirv_ImageWritePU3AS133__spirv_Image__void_1_0_0_0_0_0_1Dv2_iDv4_ji(
; Function Attrs: alwaysinline convergent nounwind
define spir_kernel void @imagewrites(i32 %offset, <4 x i32> addrspace(1)*
nocapture readonly %input, <4 x i32> addrspace(1)* nocapture readonly %inputu,
%opencl.image2d_wo_t addrspace(1)* %output) local_unnamed_addr #0
!kernel_arg_addr_space !14 !kernel_arg_access_qual !15 !kernel_arg_type !16
!kernel_arg_base_type !17 !kernel_arg_type_qual !18 !kernel_arg_name !19
!kernel_attributes !20 {
