Author: matt
Date: 2007-11-19 00:27:56 -0700 (Mon, 19 Nov 2007)
New Revision: 6997
Modified:
usrp2/trunk/fpga/top/u2_basic/u2_basic.v
Log:
change declaration order to please ISE
Modified: usrp2/trunk/fpga/top/u2_basic/u2_basic.v
===================================================================
--- usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2007-11-19 06:37:40 UTC (rev
6996)
+++ usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2007-11-19 07:27:56 UTC (rev
6997)
@@ -472,6 +472,7 @@
// /////////////////////////////////////////////////////////////////////////
// ATR Controller, Slave #11
+ wire run_rx, run_tx;
atr_controller atr_controller
(.clk_i(wb_clk),.rst_i(wb_rst),
.adr_i(s11_adr[3:0]),.dat_i(s11_dat_o),.dat_o(s11_dat_i),
@@ -487,7 +488,6 @@
reg adc_ovf_a_reg1, adc_ovf_a_reg2, adc_ovf_b_reg1,
adc_ovf_b_reg2;
wire [31:0] sample_rx, sample_tx;
- wire run_rx, run_tx;
wire strobe_rx, strobe_tx;
always @(posedge dsp_clk)
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