Author: matt
Date: 2007-12-15 16:00:46 -0700 (Sat, 15 Dec 2007)
New Revision: 7198
Modified:
usrp2/trunk/fpga/control_lib/longfifo.v
Log:
need to reset the write address on a clear
Modified: usrp2/trunk/fpga/control_lib/longfifo.v
===================================================================
--- usrp2/trunk/fpga/control_lib/longfifo.v 2007-12-15 23:00:04 UTC (rev
7197)
+++ usrp2/trunk/fpga/control_lib/longfifo.v 2007-12-15 23:00:46 UTC (rev
7198)
@@ -33,6 +33,8 @@
always @(posedge clk)
if(rst)
wr_addr <= 0;
+ else if(clear)
+ wr_addr <= 0;
else if(write)
wr_addr <= wr_addr + 1;
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