Author: matt Date: 2007-12-26 18:13:14 -0700 (Wed, 26 Dec 2007) New Revision: 7277
Modified: usrp2/trunk/firmware/lib/u2_init.c Log: proper clock set up. Just need to turn on clocks to daughterboards when needed Modified: usrp2/trunk/firmware/lib/u2_init.c =================================================================== --- usrp2/trunk/firmware/lib/u2_init.c 2007-12-26 23:51:15 UTC (rev 7276) +++ usrp2/trunk/firmware/lib/u2_init.c 2007-12-27 01:13:14 UTC (rev 7277) @@ -48,7 +48,7 @@ // Set up AD9510 spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004500, 24, 0); // CLK2 drives distribution - spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003D80, 24, 0); // Turn on output 1 (FPGA CLK), normal levels + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003D00, 24, 0); // Turn on output 1 (FPGA CLK), normal levels spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004B80, 24, 0); // Bypass divider 1 spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs @@ -57,6 +57,14 @@ // Allow for clock switchover output_regs->clk_ctrl = 0x1C; + // Set up other clocks + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003C02, 24, 0); // Turn off output 0 (unused) + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00003E00, 24, 0); // Turn on output 2 (clk_exp_out), normal levels + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004D80, 24, 0); // Bypass divider 2 + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004001, 24, 0); // Turn off output 4 (phy_clk) + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004201, 24, 0); // Turn off output 6 (db_tx_clk) + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00004301, 24, 0); // Turn off output 7 (db_rx_clk) + spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs // Enable ADCs output_regs->adc_ctrl = ADC_CTRL_ON; @@ -68,11 +76,7 @@ spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005380, 24, 0); // Bypass Div #5 spi_transact(SPI_TXONLY, SPI_SS_AD9510, 0x00005A01, 24, 0); // Update Regs - //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000004, 16, 0); // Single-R mode - //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000140, 16, 0); // - //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000301, 16, 0); // PLL = - //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000480, 16, 0); // PLL on, automatic - + // Set up AD9777 DAC ad9777_write_reg(0, R0_1R); ad9777_write_reg(1, R1_INTERP_4X | R1_REAL_MIX); ad9777_write_reg(2, 0); _______________________________________________ Commit-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/commit-gnuradio
