Author: matt
Date: 2007-12-30 16:57:38 -0700 (Sun, 30 Dec 2007)
New Revision: 7310
Modified:
usrp2/trunk/fpga/top/u2_basic/u2_basic.v
Log:
time testing debug pins
Modified: usrp2/trunk/fpga/top/u2_basic/u2_basic.v
===================================================================
--- usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2007-12-30 23:56:20 UTC (rev
7309)
+++ usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2007-12-30 23:57:38 UTC (rev
7310)
@@ -592,14 +592,14 @@
irq,
GMII_RXD,
GMII_TXD};
- assign debug_rx_2 = { 5'd0, s8_we, s8_stb, s8_ack, debug_rx[23:0] };
+ //assign debug_rx_2 = { 5'd0, s8_we, s8_stb, s8_ack, debug_rx[23:0] };
- assign debug = debug_rx_2;
+ assign debug = master_time;
assign debug_clk[0] = wb_clk;
assign debug_clk[1] = dsp_clk;
assign debug_gpio_0 = 32'd0;
//assign debug_gpio_1 = debug_rx_1;
- assign debug_gpio_1 = {exp_pps_in, exp_pps_out, pps_in};
+ assign debug_gpio_1 = {exp_pps_in, exp_pps_out, pps_in, pps_int};
endmodule // u2_basic
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