Author: eb
Date: 2008-01-11 14:59:46 -0700 (Fri, 11 Jan 2008)
New Revision: 7403
Modified:
usrp2/trunk/fpga/top/u2_basic/u2_basic.v
Log:
working debug pins w/ iwb_adr
Modified: usrp2/trunk/fpga/top/u2_basic/u2_basic.v
===================================================================
--- usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2008-01-11 19:34:04 UTC (rev
7402)
+++ usrp2/trunk/fpga/top/u2_basic/u2_basic.v 2008-01-11 21:59:46 UTC (rev
7403)
@@ -598,12 +598,17 @@
irq,
6'b0, GMII_RX_DV, GMII_TX_EN,
4'b0, exp_pps_in, exp_pps_out, pps_in, pps_int};
-
+
+ wire [31:0] debug_irq = {uart_tx_o, iwb_adr, iwb_ack,
+ irq,
+ proc_int, 7'b0 };
+
+
// Choose actual debug buses
assign debug = master_time;
assign debug_clk[0] = wb_clk;
assign debug_clk[1] = dsp_clk;
assign debug_gpio_0 = 32'd0; // Not used b/c of ATR
- assign debug_gpio_1 = debug_time;
+ assign debug_gpio_1 = debug_irq;
endmodule // u2_basic
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