Author: matt Date: 2008-01-20 12:50:29 -0700 (Sun, 20 Jan 2008) New Revision: 7480
Modified: usrp2/trunk/fpga/opencores/aemb/doc/CVS/Entries usrp2/trunk/fpga/opencores/aemb/sim/CVS/Entries usrp2/trunk/fpga/opencores/aemb/sim/verilog/CVS/Entries usrp2/trunk/fpga/opencores/aemb/sw/CVS/Entries usrp2/trunk/fpga/opencores/aemb/sw/c/CVS/Entries usrp2/trunk/fpga/opencores/aemb/sw/gccrom Log: keep up with shawn, no changes relevant to us Modified: usrp2/trunk/fpga/opencores/aemb/doc/CVS/Entries =================================================================== --- usrp2/trunk/fpga/opencores/aemb/doc/CVS/Entries 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/doc/CVS/Entries 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,2 +1,2 @@ -/aeMB_datasheet.pdf/1.3/Mon Dec 10 00:41:19 2007/-kb/ +/aeMB_datasheet.pdf/1.3/Tue Jan 15 18:38:57 2008/-kb/ D Modified: usrp2/trunk/fpga/opencores/aemb/sim/CVS/Entries =================================================================== --- usrp2/trunk/fpga/opencores/aemb/sim/CVS/Entries 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/sim/CVS/Entries 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,3 +1,3 @@ D/verilog//// -/cversim/1.5/Wed Dec 12 20:18:00 2007// -/iversim/1.5/Wed Dec 12 20:18:00 2007// +/cversim/1.5/Tue Jan 15 18:38:57 2008// +/iversim/1.5/Tue Jan 15 18:38:57 2008// Modified: usrp2/trunk/fpga/opencores/aemb/sim/verilog/CVS/Entries =================================================================== --- usrp2/trunk/fpga/opencores/aemb/sim/verilog/CVS/Entries 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/sim/verilog/CVS/Entries 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,3 +1,3 @@ -/aemb2.v/1.3/Sun Dec 30 08:00:30 2007// -/edk32.v/1.12/Sun Dec 30 08:00:31 2007// +/aemb2.v/1.3/Tue Jan 15 18:38:57 2008// +/edk32.v/1.12/Tue Jan 15 18:38:57 2008// D Modified: usrp2/trunk/fpga/opencores/aemb/sw/CVS/Entries =================================================================== --- usrp2/trunk/fpga/opencores/aemb/sw/CVS/Entries 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/sw/CVS/Entries 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,2 +1,2 @@ D/c//// -/gccrom/1.12/Wed Dec 12 20:18:00 2007// +/gccrom/1.13/Sun Jan 20 19:47:57 2008// Modified: usrp2/trunk/fpga/opencores/aemb/sw/c/CVS/Entries =================================================================== --- usrp2/trunk/fpga/opencores/aemb/sw/c/CVS/Entries 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/sw/c/CVS/Entries 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,3 +1,3 @@ -/aeMB_testbench.c/1.14/Sun Dec 30 08:00:31 2007// -/libaemb.h/1.3/Sun Dec 30 08:00:32 2007// +/aeMB_testbench.c/1.14/Tue Jan 15 18:38:57 2008// +/libaemb.h/1.3/Tue Jan 15 18:38:57 2008// D Modified: usrp2/trunk/fpga/opencores/aemb/sw/gccrom =================================================================== --- usrp2/trunk/fpga/opencores/aemb/sw/gccrom 2008-01-20 19:35:17 UTC (rev 7479) +++ usrp2/trunk/fpga/opencores/aemb/sw/gccrom 2008-01-20 19:50:29 UTC (rev 7480) @@ -1,6 +1,28 @@ #!/bin/sh -# $Id: gccrom,v 1.12 2007/12/11 00:44:32 sybreon Exp $ +# $Id: gccrom,v 1.13 2008/01/19 16:42:54 sybreon Exp $ + +# Compile using C++ pre-processor +mb-g++ -g -Wl,-defsym -Wl,_HEAP_SIZE=0x800 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -mno-clearbss $@ -o rom.elf -lc_m_bs -lm_m_bs && \ + +# Create a text listing of the compiled code +mb-objdump -DSC rom.elf > rom.dump && \ + +# Convert the ELF file to an SREC file +mb-objcopy -O srec rom.elf rom.srec && \ + +# Generate a Verilog VMEM file from the SREC file +srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \ + +# Cleanup code +rm rom.srec && \ + +# Say Cheeze! +echo "ROM generated" + # $Log: gccrom,v $ +# Revision 1.13 2008/01/19 16:42:54 sybreon +# Uses multiplier + barrel shifter as default. +# # Revision 1.12 2007/12/11 00:44:32 sybreon # Modified for AEMB2 # @@ -38,22 +60,3 @@ # # Revision 1.1 2007/03/09 17:41:56 sybreon # initial import -# - -# Compile using C++ pre-processor -mb-g++ -g -Wl,-defsym -Wl,_STACK_SIZE=0x400 -mxl-soft-div -msoft-float -mxl-barrel-shift -mno-xl-soft-mul -o rom.elf $@ && \ - -# Create a text listing of the compiled code -mb-objdump -dSC rom.elf > rom.dump && \ - -# Convert the ELF file to an SREC file -mb-objcopy -O srec rom.elf rom.srec && \ - -# Generate a Verilog VMEM file from the SREC file -srec_cat rom.srec -o ../sim/dump.vmem -vmem 32 && \ - -# Cleanup code -rm rom.srec && \ - -# Say Cheeze! -echo "ROM generated" _______________________________________________ Commit-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/commit-gnuradio
