Author: matt Date: 2008-02-13 22:55:28 -0700 (Wed, 13 Feb 2008) New Revision: 7675
Modified: usrp2/trunk/fpga/eth/rtl/verilog/MAC_tx/Random_gen.v Log: fix spelling errors Modified: usrp2/trunk/fpga/eth/rtl/verilog/MAC_tx/Random_gen.v =================================================================== --- usrp2/trunk/fpga/eth/rtl/verilog/MAC_tx/Random_gen.v 2008-02-14 05:53:58 UTC (rev 7674) +++ usrp2/trunk/fpga/eth/rtl/verilog/MAC_tx/Random_gen.v 2008-02-14 05:55:28 UTC (rev 7675) @@ -1,6 +1,6 @@ ////////////////////////////////////////////////////////////////////// //// //// -//// Ramdon_gen.v //// +//// Randon_gen.v //// //// //// //// This file is part of the Ethernet IP core project //// //// http://www.opencores.org/projects.cgi/web/ethernet_tri_mode///// @@ -38,7 +38,7 @@ // // CVS Revision History // -// $Log: Ramdon_gen.v,v $ +// $Log: Randon_gen.v,v $ // Revision 1.3 2006/01/19 14:07:54 maverickist // verification is complete. // @@ -50,7 +50,7 @@ // no message // -module Ramdon_gen( +module Randon_gen( Reset , Clk , Init , @@ -67,8 +67,8 @@ //internal signals //****************************************************************************** reg [9:0] Random_sequence ; -reg [9:0] Ramdom ; -reg [9:0] Ramdom_counter ; +reg [9:0] Random ; +reg [9:0] Random_counter ; reg [7:0] Slot_time_counter; //256*2=512bit=1 slot time reg Random_time_meet; @@ -81,17 +81,17 @@ always @ (RetryCnt or Random_sequence) case (RetryCnt) - 4'h0 : Ramdom={9'b0,Random_sequence[0]}; - 4'h1 : Ramdom={8'b0,Random_sequence[1:0]}; - 4'h2 : Ramdom={7'b0,Random_sequence[2:0]}; - 4'h3 : Ramdom={6'b0,Random_sequence[3:0]}; - 4'h4 : Ramdom={5'b0,Random_sequence[4:0]}; - 4'h5 : Ramdom={4'b0,Random_sequence[5:0]}; - 4'h6 : Ramdom={3'b0,Random_sequence[6:0]}; - 4'h7 : Ramdom={2'b0,Random_sequence[7:0]}; - 4'h8 : Ramdom={1'b0,Random_sequence[8:0]}; - 4'h9 : Ramdom={ Random_sequence[9:0]}; - default : Ramdom={ Random_sequence[9:0]}; + 4'h0 : Random={9'b0,Random_sequence[0]}; + 4'h1 : Random={8'b0,Random_sequence[1:0]}; + 4'h2 : Random={7'b0,Random_sequence[2:0]}; + 4'h3 : Random={6'b0,Random_sequence[3:0]}; + 4'h4 : Random={5'b0,Random_sequence[4:0]}; + 4'h5 : Random={4'b0,Random_sequence[5:0]}; + 4'h6 : Random={3'b0,Random_sequence[6:0]}; + 4'h7 : Random={2'b0,Random_sequence[7:0]}; + 4'h8 : Random={1'b0,Random_sequence[8:0]}; + 4'h9 : Random={ Random_sequence[9:0]}; + default : Random={ Random_sequence[9:0]}; endcase always @ (posedge Clk or posedge Reset) @@ -104,18 +104,18 @@ always @ (posedge Clk or posedge Reset) if (Reset) - Ramdom_counter <=0; + Random_counter <=0; else if (Init) - Ramdom_counter <=Ramdom; - else if (Ramdom_counter!=0&&Slot_time_counter==255) - Ramdom_counter <=Ramdom_counter -1 ; + Random_counter <=Random; + else if (Random_counter!=0&&Slot_time_counter==255) + Random_counter <=Random_counter -1 ; always @ (posedge Clk or posedge Reset) if (Reset) Random_time_meet <=1; else if (Init) Random_time_meet <=0; - else if (Ramdom_counter==0) + else if (Random_counter==0) Random_time_meet <=1; endmodule _______________________________________________ Commit-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/commit-gnuradio
