Hello community, here is the log from the commit of package ucode-intel for openSUSE:Factory checked in at 2020-11-12 22:33:07 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/ucode-intel (Old) and /work/SRC/openSUSE:Factory/.ucode-intel.new.24930 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "ucode-intel" Thu Nov 12 22:33:07 2020 rev:51 rq:847755 version:20201110 Changes: -------- --- /work/SRC/openSUSE:Factory/ucode-intel/ucode-intel.changes 2020-06-22 17:42:59.633286499 +0200 +++ /work/SRC/openSUSE:Factory/.ucode-intel.new.24930/ucode-intel.changes 2020-11-12 22:33:33.929802981 +0100 @@ -1,0 +2,65 @@ +Wed Nov 11 08:23:06 UTC 2020 - Marcus Meissner <[email protected]> + +- Updated Intel CPU Microcode to 20201110 official release. + - CVE-2020-8695: Fixed Intel RAPL sidechannel attack (SGX) (bsc#1170446) + - CVE-2020-8698: Fixed Fast Store Forward Predictor INTEL-SA-00381 (bsc#1173594) + - CVE-2020-8696: Vector Register Sampling Active INTEL-SA-00381 (bsc#1173592) + +- Releasenotes: + + - Security updates for [INTEL-SA-00381](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00381.html). + - Security updates for [INTEL-SA-00389](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00389.html). + - Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details. + - Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/613537) for details. + - Update for functional issues. Refer to [Intel® Xeon® Processor E5 v3 Product Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html?wapkw=processor+spec+update+e5) for details. + - Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/10th-gen-core-families-specification-update.html) for details. + - Update for functional issues. Refer to [8th and 9th Gen Intel® Core™ Processor Family Spec Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/8th-gen-core-spec-update.html) for details. + - Update for functional issues. Refer to [7th Gen and 8th Gen (U Quad-Core) Intel® Processor Families Specification Update](https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-spec-update.html) for details. + - Update for functional issues. Refer to [6th Gen Intel® Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/332689) for details. + - Update for functional issues. Refer to [Intel® Xeon® E3-1200 v6 Processor Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v6-spec-update.html) for details. + - Update for functional issues. Refer to [Intel® Xeon® E-2100 and E-2200 Processor Family Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/xeon/xeon-e-2100-specification-update.html) for details. + + ### New Platforms + + | Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products + |:---------------|:---------|:------------|:---------|:---------|:--------- + | CPX-SP | A1 | 06-55-0b/bf | | 0700001e | Xeon Scalable Gen3 + | LKF | B2/B3 | 06-8a-01/10 | | 00000028 | Core w/Hybrid Technology + | TGL | B1 | 06-8c-01/80 | | 00000068 | Core Gen11 Mobile + | CML-H | R1 | 06-a5-02/20 | | 000000e0 | Core Gen10 Mobile + | CML-S62 | G1 | 06-a5-03/22 | | 000000e0 | Core Gen10 + | CML-S102 | Q0 | 06-a5-05/22 | | 000000e0 | Core Gen10 + | CML-U62 V2 | K0 | 06-a6-01/80 | | 000000e0 | Core Gen10 Mobile + + ### Updated Platforms + + | Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products + |:---------------|:---------|:------------|:---------|:---------|:--------- + | HSX-E/EP | Cx/M1 | 06-3f-02/6f | 00000043 | 00000044 | Core Gen4 X series; Xeon E5 v3 + | SKL-U/Y | D0 | 06-4e-03/c0 | 000000d6 | 000000e2 | Core Gen6 Mobile + | SKL-U23e | K1 | 06-4e-03/c0 | 000000d6 | 000000e2 | Core Gen6 Mobile + | SKX-SP | B1 | 06-55-03/97 | 01000157 | 01000159 | Xeon Scalable + | SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02006906 | 02006a08 | Xeon Scalable + | SKX-D | M1 | 06-55-04/b7 | 02006906 | 02006a08 | Xeon D-21xx + | CLX-SP | B0 | 06-55-06/bf | 04002f01 | 04003003 | Xeon Scalable Gen2 + | CLX-SP | B1 | 06-55-07/bf | 05002f01 | 05003003 | Xeon Scalable Gen2 + | APL | D0 | 06-5c-09/03 | 00000038 | 00000040 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx + | APL | E0 | 06-5c-0a/03 | 00000016 | 0000001e | Atom x5-E39xx + | SKL-H/S | R0/N0 | 06-5e-03/36 | 000000d6 | 000000e2 | Core Gen6; Xeon E3 v5 + | GKL-R | R0 | 06-7a-08/01 | 00000016 | 00000018 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 + | ICL-U/Y | D1 | 06-7e-05/80 | 00000078 | 000000a0 | Core Gen10 Mobile + | AML-Y22 | H0 | 06-8e-09/10 | 000000d6 | 000000de | Core Gen8 Mobile + | KBL-U/Y | H0 | 06-8e-09/c0 | 000000d6 | 000000de | Core Gen7 Mobile + | CFL-U43e | D0 | 06-8e-0a/c0 | 000000d6 | 000000e0 | Core Gen8 Mobile + | WHL-U | W0 | 06-8e-0b/d0 | 000000d6 | 000000de | Core Gen8 Mobile + | AML-Y42 | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen10 Mobile + | CML-Y42 | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen10 Mobile + | WHL-U | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen8 Mobile + | KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 000000d6 | 000000de | Core Gen7; Xeon E3 v6 + | CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000d6 | 000000de | Core Gen8 Desktop, Mobile, Xeon E + | CFL-S | B0 | 06-9e-0b/02 | 000000d6 | 000000de | Core Gen8 + | CFL-H/S | P0 | 06-9e-0c/22 | 000000d6 | 000000de | Core Gen9 + | CFL-H | R0 | 06-9e-0d/22 | 000000d6 | 000000de | Core Gen9 Mobile + | CML-U62 | A0 | 06-a6-00/80 | 000000ca | 000000e0 | Core Gen10 Mobile + +------------------------------------------------------------------- Old: ---- microcode-20200616.tar.gz New: ---- microcode-20201110.tar.gz ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ ucode-intel.spec ++++++ --- /var/tmp/diff_new_pack.z21LA5/_old 2020-11-12 22:33:35.745804648 +0100 +++ /var/tmp/diff_new_pack.z21LA5/_new 2020-11-12 22:33:35.745804648 +0100 @@ -17,7 +17,7 @@ Name: ucode-intel -Version: 20200616 +Version: 20201110 Release: 0 Summary: Microcode Updates for Intel x86/x86-64 CPUs License: SUSE-Firmware @@ -64,7 +64,7 @@ %files %defattr(-,root,root) %license license -%doc releasenote +%doc releasenote.md /lib/firmware/intel-ucode/ %changelog ++++++ microcode-20200616.tar.gz -> microcode-20201110.tar.gz ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/README.md new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/README.md --- old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/README.md 1970-01-01 01:00:00.000000000 +0100 +++ new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/README.md 2020-11-11 01:54:26.000000000 +0100 @@ -0,0 +1,106 @@ +# Intel Processor Microcode Package for Linux + +## About + +The Intel Processor Microcode Update (MCU) Package provides a mechanism to release updates for security advisories and functional issues, including errata. In addition, MCUs are responsible for starting the SGX enclave (on processors that support the SGX feature), implementing complex behaviors (such as assists), and more. The preferred method to apply MCUs is using the system BIOS. For a subset of Intel's processors, the MCU can also be updated at runtime using the operating system. The Intel Microcode Package shared here contains updates for those processors that support OS loading of MCUs. + +## Why update the microcode? +Updating your microcode can help to mitigate certain potential security vulnerabilities in CPUs as well as address certain functional issues that could, for example, result in unpredictable system behavior such as hangs, crashes, unexpected reboots, data errors, etc. To learn more about applying MCUs to an Intel processor, see [Microcode Update Guidance](https://software.intel.com/security-software-guidance/insights/microcode-update-guidance). + +## Loading microcode updates + +This package is provided for Linux distributors for inclusion in their OS releases. Intel recommends obtaining the latest MCUs using the OS vendor update mechanism. A good starting point is [OS and Software Vendor](https://software.intel.com/security-software-guidance/insights/guidance-system-administrators-mitigate-transient-execution-side-channel-issues). Expert users can update their microcode directly outside the OS vendor mechanism. However, this method is complex and could result in errors if performed incorrectly. Such errors could include but are not limited to system freezes, inability to boot, performance impacts, logical processors loading different updates, and some updates not taking effect. As a result, this method should be attempted by expert users only. + +MCUs are best loaded from the BIOS. Certain MCUs must only be applied from the BIOS. Such MCUs are never packaged in this package since they are not appropriate for OS distribution. An OEM may receive microcode update packages that are a superset of what is contained in this package for inclusion in a BIOS. + +OS vendors may choose to provide an MCU that the kernel can consume for early loading. For example, Linux can apply an MCU very early in the kernel boot sequence. In situations where a BIOS update isn't available, early loading is the next best alternative to updating processor microcode. **Microcode states are reset on a power reset, hence its required that the MCU be loaded every time during boot process.** + +## Recommendation + +Using the initrd method to load an MCU is recommended as this method will load the MCU at the earliest time for the most coverage. Systems that cannot tolerate downtime may use the late-load method to update a running system without a reboot. + +## About Processor Signature, Family, Model, Stepping and Platform ID + +The Processor Signature is a number identifying the model and version of an Intel processor. It can be obtained using the *CPUID instruction*, via the command *lscpu*, or from the content of */proc/cpuinfo*. It's usually presented as 3 fields: Family, Model, and Stepping. + +For example, if a processor returns a value of "0x000906eb" from the *CPUID instruction*: + +| Reserved | Extended Family | Extended Model | Reserved | Processor Type | Family Code | Model Number | Stepping ID | +|:---------|:----------------|:---------------|:---------|:---------------|:------------|:-------------|:------------| +| 31:28 | 27:20 | 19:16 | 15:14 | 13:12 | 11:8 | 7:4 | 3:0 | +| xxxx | 00000000b | 1001b | xx | 00b | 0110b | 1110b | 1011b | + + +The corresponding Linux formatted file name will be "06-9e-0b", where: +- Extended Family + Family = 0x06 +- Extended Model + Model Number = 0x9e +- Stepping ID = 0xb + +A processor may be implemented for multiple platform types. Intel processors have a 3bit Platform ID field in MSR(17H) that specifies the platform type for up to 8 types. An MCU file for a specified processor model may support multiple platforms. The Platform ID(s) supported by an MCU is an 8bit mask where each set bit indicates a platform type that the MCU supports. The Platform ID of a processor can be read in Linux using rdmsr from [msr-tools](https://github.com/intel/msr-tools). + +## Microcode update instructions + +The [intel-ucode](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/tree/master/intel-ucode) directory contains binary MCU files named in the `family-model-stepping` format. This file format is supported by most modern Linux distributions. It's generally located in the /lib/firmware directory and can be updated through the microcode reload interface following the late-load update instructions below. + +### Early-load update +To update early loading initrd, consult your Linux distribution on how to package MCU files for early loading. Some distributions use `update-initramfs` or `dracut`. Use the OS vendors recommended method to help ensure that the MCU file is updated for early loading before attempting the late-load procedure below. + +### Late-load update +To update the intel-ucode package to the system: +1. Ensure the existence of `/sys/devices/system/cpu/microcode/reload` +2. Download the latest microcode firmware</br> `$ git clone https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files.git` or</br> `$ wget https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/archive/master.zip` +3. Copy `intel-ucode` directory to `/lib/firmware`, overwriting the files in /lib/firmware/intel-ucode/ +4. Write the reload interface to 1 to reload the microcode files, e.g.</br> + `$ echo 1 > /sys/devices/system/cpu/microcode/reload`</br> + Microcode updates will be applied automatically without rebooting the system. +5. Update an existing initramfs so that next time it gets loaded via kernel:</br> +`$ sudo update-initramfs -u`</br> +`$ sudo reboot` +6. Verify that the microcode was updated on boot or reloaded by echo command:</br> +`$ dmesg | grep microcode` or</br> +`$ cat /proc/cpuinfo | grep microcode | sort | uniq` + +If you are using the OS vendor method to apply an MCU, the above steps may have been done automatically during the update process. + +The [intel-ucode-with-caveats](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/tree/master/intel-ucode-with-caveats) directory contains MCUs that need special handling. The BDX-ML MCU is provided in this directory because it requires special commits in the Linux kernel otherwise updating it might result in unexpected system behavior. OS vendors must ensure that the late loader patches (provided in [linux-kernel-patches](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/tree/master/linux-kernel-patches)) are included in the distribution before packaging the BDX-ML MCU for late-loading. + +The [linux-kernel-patches](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/tree/master/linux-kernel-patches) directory consists of kernel patches that address various issues related to applying MCUs. + +## Notes + +* You can only update to a higher MCU version (downgrade is not possible with the provided instructions) +* To calculate Family-Model-Stepping, use Linux command:</br> +`$ printf "%x\n" <number_to_convert_to_hex>` +* There are multiple ways to check the MCU version number BEFORE update. After cloning this Intel Microcode update repo , run the following: + - `$ iucode_tool -l intel-ucode | grep -wF sig` ([iucode_tool](https://gitlab.com/iucode-tool/iucode-tool/-/wikis/home) package is required) + - `$ od -t x4 <Family-Model-Stepping>` will read the first 16 bytes of the microcode binary header specified in \<Family\-Model\-Stepping\>. The third block is the microcode version. For example: +`$ od -t x4 06-55-04`</br> +`0000000 00000001 *02000065* 09052019 00050654` + +## License + +See the [license](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/blob/master/license) file for details. + +## Security Policy + +See the [security.md](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/blob/master/security.md) file for details. + +## Release Note + +See the [releasenote.md](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/blob/master/releasenote.md) file for details. + +## Disclaimers + +Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software, or service activation. Performance varies depending on system configuration. Check with your system manufacturer or retailer or learn more at [www.intel.com](https://www.intel.com). + +No product or component can be absolutely secure. + +All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. + +The products and services described may contain defects or errors known as errata which may cause deviations from published specifications. Current characterized errata are available on request. + +Intel provides these materials as-is, with no express or implied warranties. + +© Intel Corporation. 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new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/releasenote --- old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/releasenote 2020-06-16 18:33:02.000000000 +0200 +++ new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/releasenote 1970-01-01 01:00:00.000000000 +0100 @@ -1,96 +0,0 @@ -Intel Processor Microcode Package for Linux - -CPU microcode is a mechanism to correct certain errata in existing systems. -The normal preferred method to apply microcode updates is using the system -BIOS, but for a subset of Intel's processors this can be done at runtime -using the operating system. This package contains those processors that -support OS loading of microcode updates. - -The target user for this package are OS vendors such as Linux distributions -for inclusion in their OS releases. Intel recommends getting the microcode -using the OS vendor update mechanism. Expert users can of course update their -microcode directly outside the OS vendor mechanism. This method is complex and -thus could be error prone. - -Microcode is best loaded from the BIOS. Certain microcode must only be applied -from the BIOS. Such processor microcode updates are never packaged in this -package since they are not appropriate for OS distribution. An OEM may receive -microcode packages that might be a superset of what is contained in this -package. - -OS vendors may choose to also update microcode that kernel can consume for early -loading. For e.g. Linux can update processor microcode very early in the kernel -boot sequence. In situations when the BIOS update isn't available, early loading -is the next best alternative to updating processor microcode. Microcode states -are reset on a power reset, hence its required to be updated everytime during -boot process. - -Loading microcode using the initrd method is recommended so that the microcode -is loaded at the earliest time for best coverage. Systems that cannot tolerate -downtime may use the late reload method to update a running system without a -reboot. - -== About Processor Signature, Family, Model, Stepping and Platform ID == -Processor signature is a number identifying the model and version of a -Intel processor. It can be obtained using the CPUID instruction, and can -also be obtained via the command lscpu or from the content of /proc/cpuinfo. -It's usually presented as 3 fields: Family, Model and Stepping -(In the table of updates below, they are shorten as F, MO and S). - -The width of Family/Model/Stepping is 12/8/4bit, but when arranged in the -32bit processor signature raw data is like 0FFM0FMS, hexadecimal. -e.g. if a processor signature is 0x000906eb, it means -Family=0x006, Model=0x9e and Stepping=0xb - -A processor product can be implemented for multiple types of platforms, -So in MSR(17H), Intel processors have a 3bit Platform ID field, -that can specify a platform type from at most 8 types. -A microcode file for a specified processor model can support multiple -platforms, so the Platform ID of a microcode (shorten as PI in the table) -is a 8bit mask, each set bit indicates a platform type that it supports. -One can find the platform ID on Linux using rdmsr from msr-tools. - -== Microcode update instructions == --- intel-ucode/ -- -intel-ucode directory contains binary microcode files named in -family-model-stepping pattern. The file is supported in most modern Linux -distributions. It's generally located in the /lib/firmware directory, -and can be updated through the microcode reload interface. - -To update early loading initrd, consult your distribution on how to package -microcode files for early loading. Some distros use update-initramfs or dracut. -As recommended above, please use the OS vendors are recommended method to ensure -microcode file is updated for early loading before attempting the late-load -procedure below. - -To update the intel-ucode package to the system, one need: -1. Ensure the existence of /sys/devices/system/cpu/microcode/reload -2. Copy intel-ucode directory to /lib/firmware, overwrite the files in -/lib/firmware/intel-ucode/ -3. Write the reload interface to 1 to reload the microcode files, e.g. - echo 1 > /sys/devices/system/cpu/microcode/reload - -If you are using the OS vendor method to update microcode, the above steps may -have been done automatically during the update process. - --- intel-ucode-with-caveats/ -- -This directory holds microcode that might need special handling. -BDX-ML microcode is provided in directory, because it need special commits in -the Linux kernel, otherwise, updating it might result in unexpected system -behavior. -OS vendors must ensure that the late loader patches (provided in -linux-kernel-patches\) are included in the distribution before packaging the -BDX-ML microcode for late-loading. - -== 20200616 Release == --- Updates upon 20200609 release -- -Processor Identifier Version Products -Model Stepping F-MO-S/PI Old->New ----- new platforms ---------------------------------------- - ----- updated platforms ------------------------------------ -SKL-U/Y D0 6-4e-3/c0 000000dc->000000d6 Core Gen6 Mobile -SKL-U23e K1 6-4e-3/c0 000000dc->000000d6 Core Gen6 Mobile -SKL-H/S R0/N0 6-5e-3/36 000000dc->000000d6 Core Gen6; Xeon E3 v5 - ----- removed platforms ------------------------------------ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/releasenote.md new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/releasenote.md --- old/Intel-Linux-Processor-Microcode-Data-Files-microcode-20200616/releasenote.md 1970-01-01 01:00:00.000000000 +0100 +++ new/Intel-Linux-Processor-Microcode-Data-Files-microcode-20201110/releasenote.md 2020-11-11 01:54:26.000000000 +0100 @@ -0,0 +1,495 @@ +# Release Notes + +## [microcode-20201110](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20201110) + +### Purpose + +- Security updates for [INTEL-SA-00381](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00381.html). +- Security updates for [INTEL-SA-00389](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00389.html). +- Update for functional issues. Refer to [Second Generation Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/338848) for details. +- Update for functional issues. Refer to [Intel® Xeon® Processor Scalable Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/613537) for details. +- Update for functional issues. Refer to [Intel® Xeon® Processor E5 v3 Product Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html?wapkw=processor+spec+update+e5) for details. +- Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/10th-gen-core-families-specification-update.html) for details. +- Update for functional issues. Refer to [8th and 9th Gen Intel® Core™ Processor Family Spec Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/8th-gen-core-spec-update.html) for details. +- Update for functional issues. Refer to [7th Gen and 8th Gen (U Quad-Core) Intel® Processor Families Specification Update](https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-spec-update.html) for details. +- Update for functional issues. Refer to [6th Gen Intel® Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/332689) for details. +- Update for functional issues. Refer to [Intel® Xeon® E3-1200 v6 Processor Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v6-spec-update.html) for details. +- Update for functional issues. Refer to [Intel® Xeon® E-2100 and E-2200 Processor Family Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/xeon/xeon-e-2100-specification-update.html) for details. + + +### New Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| CPX-SP | A1 | 06-55-0b/bf | | 0700001e | Xeon Scalable Gen3 +| LKF | B2/B3 | 06-8a-01/10 | | 00000028 | Core w/Hybrid Technology +| TGL | B1 | 06-8c-01/80 | | 00000068 | Core Gen11 Mobile +| CML-H | R1 | 06-a5-02/20 | | 000000e0 | Core Gen10 Mobile +| CML-S62 | G1 | 06-a5-03/22 | | 000000e0 | Core Gen10 +| CML-S102 | Q0 | 06-a5-05/22 | | 000000e0 | Core Gen10 +| CML-U62 V2 | K0 | 06-a6-01/80 | | 000000e0 | Core Gen10 Mobile + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| HSX-E/EP | Cx/M1 | 06-3f-02/6f | 00000043 | 00000044 | Core Gen4 X series; Xeon E5 v3 +| SKL-U/Y | D0 | 06-4e-03/c0 | 000000d6 | 000000e2 | Core Gen6 Mobile +| SKL-U23e | K1 | 06-4e-03/c0 | 000000d6 | 000000e2 | Core Gen6 Mobile +| SKX-SP | B1 | 06-55-03/97 | 01000157 | 01000159 | Xeon Scalable +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02006906 | 02006a08 | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 02006906 | 02006a08 | Xeon D-21xx +| CLX-SP | B0 | 06-55-06/bf | 04002f01 | 04003003 | Xeon Scalable Gen2 +| CLX-SP | B1 | 06-55-07/bf | 05002f01 | 05003003 | Xeon Scalable Gen2 +| APL | D0 | 06-5c-09/03 | 00000038 | 00000040 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx +| APL | E0 | 06-5c-0a/03 | 00000016 | 0000001e | Atom x5-E39xx +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000d6 | 000000e2 | Core Gen6; Xeon E3 v5 +| GKL-R | R0 | 06-7a-08/01 | 00000016 | 00000018 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 +| ICL-U/Y | D1 | 06-7e-05/80 | 00000078 | 000000a0 | Core Gen10 Mobile +| AML-Y22 | H0 | 06-8e-09/10 | 000000d6 | 000000de | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 000000d6 | 000000de | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 000000d6 | 000000e0 | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000d6 | 000000de | Core Gen8 Mobile +| AML-Y42 | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen10 Mobile +| CML-Y42 | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen10 Mobile +| WHL-U | V0 | 06-8e-0c/94 | 000000d6 | 000000de | Core Gen8 Mobile +| KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 000000d6 | 000000de | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000d6 | 000000de | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000d6 | 000000de | Core Gen8 +| CFL-H/S | P0 | 06-9e-0c/22 | 000000d6 | 000000de | Core Gen9 +| CFL-H | R0 | 06-9e-0d/22 | 000000d6 | 000000de | Core Gen9 Mobile +| CML-U62 | A0 | 06-a6-00/80 | 000000ca | 000000e0 | Core Gen10 Mobile + +### Removed Platforms + +None + +## [microcode-20200616](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200616) + +### Purpose + +- Revert to previous versions due to reported system hang. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SKL-U/Y | D0 | 06-4e-03/c0 | 000000dc | 000000d6 | Core Gen6 Mobile +| SKL-U23e | K1 | 06-4e-03/c0 | 000000dc | 000000d6 | Core Gen6 Mobile +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000dc | 000000d6 | Core Gen6; Xeon E3 v5 + +### Removed Platforms + +None + +## [microcode-20200609](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200609) + +### Purpose + +- Security updates for [INTEL-SA-00329](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00329.html). + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| HSW | C0 | 06-3c-03/32 | 00000027 | 00000028 | Core Gen4 +| BDW-U/Y | E0/F0 | 06-3d-04/c0 | 0000002e | 0000002f | Core Gen5 +| HSW-U | C0/D0 | 06-45-01/72 | 00000025 | 00000026 | Core Gen4 +| HSW-H | C0 | 06-46-01/32 | 0000001b | 0000001c | Core Gen4 +| BDW-H/E3 | E0/G0 | 06-47-01/22 | 00000021 | 00000022 | Core Gen5 +| SKL-U/Y | D0 | 06-4e-03/c0 | 000000d6 | 000000dc | Core Gen6 Mobile +| SKL-U23e | K1 | 06-4e-03/c0 | 000000d6 | 000000dc | Core Gen6 Mobile +| SKX-SP | B1 | 06-55-03/97 | 01000151 | 01000157 | Xeon Scalable +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02000065 | 02006906 | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 02000065 | 02006906 | Xeon D-21xx +| CLX-SP | B0 | 06-55-06/bf | 0400002c | 04002f01 | Xeon Scalable Gen2 +| CLX-SP | B1 | 06-55-07/bf | 0500002c | 05002f01 | Xeon Scalable Gen2 +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000d6 | 000000dc | Core Gen6; Xeon E3 v5 +| AML-Y22 | H0 | 06-8e-09/10 | 000000ca | 000000d6 | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 000000ca | 000000d6 | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 000000ca | 000000d6 | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000ca | 000000d6 | Core Gen8 Mobile +| AML-Y42 | V0 | 06-8e-0c/94 | 000000ca | 000000d6 | Core Gen10 Mobile +| CML-Y42 | V0 | 06-8e-0c/94 | 000000ca | 000000d6 | Core Gen10 Mobile +| WHL-U | V0 | 06-8e-0c/94 | 000000ca | 000000d6 | Core Gen8 Mobile +| KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 000000ca | 000000d6 | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000ca | 000000d6 | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000ca | 000000d6 | Core Gen8 +| CFL-H/S | P0 | 06-9e-0c/22 | 000000ca | 000000d6 | Core Gen9 +| CFL-H | R0 | 06-9e-0d/22 | 000000ca | 000000d6 | Core Gen9 Mobile + +### Removed Platforms + +None + +## [microcode-20200520](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200520) + +### Purpose + +- Update to SA00233. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SNB-E/EN/EP | C1/M0 | 06-2d-06/6d | 0000061f | 00000621 | Xeon E3/E5, Core X +| SNB-E/EN/EP | C2/M1 | 06-2d-07/6d | 00000718 | 0000071a | Xeon E3/E5, Core X + +### Removed Platforms + +None + +## [microcode-20200508](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20200508) + +### Purpose + +- Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/10th-gen-core-families-specification-update.html) for details. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| ICL-U/Y | D1 | 06-7e-05/80 | 00000046 | 00000078 | Core Gen10 Mobile + +### Removed Platforms + +None + +## [microcode-20191115](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20191115) + +### Purpose + +- Update for functional issues. Refer to [10th Gen Intel® Core™ Processor Families Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/10th-gen-core-families-specification-update.html) for details. +- Update for functional issues. Refer to [8th and 9th Gen Intel® Core™ Processor Family Spec Update](https://www.intel.com/content/www/us/en/products/docs/processors/core/8th-gen-core-spec-update.html) for details. +- Update for functional issues. Refer to [7th Gen and 8th Gen (U Quad-Core) Intel® Processor Families Specification Update](https://www.intel.com/content/www/us/en/processors/core/7th-gen-core-family-spec-update.html) for details. +- Update for functional issues. Refer to [6th Gen Intel® Processor Family Specification Update](https://cdrdv2.intel.com/v1/dl/getContent/332689) for details. +- Update for functional issues. Refer to [Intel® Xeon® E3-1200 v6 Processor Family Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v6-spec-update.html) for details. +- Update for functional issues. Refer to [Intel® Xeon® E-2100 and E-2200 Processor Family Specification Update](https://www.intel.com/content/www/us/en/products/docs/processors/xeon/xeon-e-2100-specification-update.html) for details. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SKL-U/Y | D0 | 06-4e-03/c0 | 000000d4 | 000000d6 | Core Gen6 Mobile +| SKL-U23e | K1 | 06-4e-03/c0 | 000000d4 | 000000d6 | Core Gen6 Mobile +| SKL-H/S/E3 | N0/R0/S0 | 06-5e-03/36 | 000000d4 | 000000d6 | Core Gen6 +| AML-Y22 | H0 | 06-8e-09/10 | 000000c6 | 000000ca | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 000000c6 | 000000ca | Core Gen7 Mobile +| KBL-U23e | J1 | 06-8e-09/c0 | 000000c6 | 000000ca | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 000000c6 | 000000ca | Core Gen8 Mobile +| KBL-R U | Y0 | 06-8e-0a/c0 | 000000c6 | 000000ca | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000c6 | 000000ca | Core Gen8 Mobile +| AML-Y42 | V0 | 06-8e-0c/94 | 000000c6 | 000000ca | Core Gen10 Mobile +| WHL-U | V0 | 06-8e-0c/94 | 000000c6 | 000000ca | Core Gen8 Mobile +| CML-U42 | V0 | 06-8e-0c/94 | 000000c6 | 000000ca | Core Gen10 Mobile +| KBL-G/H/S/X/E3 | B0 | 06-9e-09/2a | 000000c6 | 000000ca | Core Gen7 Desktop, Mobile, Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000c6 | 000000ca | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000c6 | 000000ca | Core Gen8 +| CFL-S | P0 | 06-9e-0c/22 | 000000c6 | 000000ca | Core Gen9 Desktop +| CFL-H/S/E3 | R0 | 06-9e-0d/22 | 000000c6 | 000000ca | Core Gen9 Desktop, Mobile, Xeon E +| CML-U62 | A0 | 06-a6-00/80 | 000000c6 | 000000ca | Core Gen10 Mobile + +### Removed Platforms + +None + +## [microcode-20191113](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20191113) + +### Purpose + +- Security updates for [INTEL-SA-00270](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00270.html). +- Correction in release notes for specific processor to CFL-S only. Prior release showed as CFL-H/S. + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| CFL-S | P0 | 06-9e-0c/22 | 000000ae | 000000c6 | Core Gen9 Desktop + +### Removed Platforms + +None + +## [microcode-20191112](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20191112) + +### Purpose + +- Security updates for [INTEL-SA-00233](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00233.html). +- Security updates for [INTEL-SA-00270](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00270.html). +- Update to SA00270. + +### New Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| AVN | B0/C0 | 06-4d-08/01 | | 0000012D | Atom C2xxx +| CML-U62 | A0 | 06-a6-00/80 | | 000000c6 | Core Gen10 Mobile +| CNL-U | D0 | 06-66-03/80 | | 0000002a | Core Gen8 Mobile +| SKX-SP | B1 | 06-55-03/97 | | 01000151 | Xeon Scalable +| GKL | B0 | 06-7a-01/01 | | 00000032 | Pentium J5005/N5000, Celeron J4005/J4105/N4000/N4100 +| GKL-R | R0 | 06-7a-08/01 | | 00000016 | Pentium J5040/N5030, Celeron J4125/J4025/N4020/N4120 +| ICL U/Y | D1 | 06-7e-05/80 | | 00000046 | Core Gen10 Mobile + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SKL U/Y | D0 | 06-4e-03/c0 | 000000cc | 000000d4 | Core Gen6 Mobile +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 02000064 | 00000065 | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 02000064 | 00000065 | Xeon D-21xx +| CLX-SP | B0 | 06-55-06/bf | 0400002b | 0400002c | Xeon Scalable Gen2 +| CLX-SP | B1 | 06-55-07/bf | 0500002b | 0500002c | Xeon Scalable Gen2 +| SKL H/S/E3 | R0/N0 | 06-5e-03/36 | 000000cc | 000000d4 | Core Gen6 +| AML-Y22 | H0 | 06-8e-09/10 | 000000b4 | 000000c6 | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 000000b4 | 000000c6 | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 000000b4 | 000000c6 | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000b8 | 000000c6 | Core Gen8 Mobile +| AML-Y | V0 | 06-8e-0c/94 | 000000b8 | 000000c6 | Core Gen10 Mobile +| CML-U42 | V0 | 06-8e-0c/94 | 000000b8 | 000000c6 | Core Gen10 Mobile +| WHL-U | V0 | 06-8e-0c/94 | 000000b8 | 000000c6 | Core Gen8 Mobile +| KBL-G/X | H0 | 06-9e-09/2a | 000000b4 | 000000c6 | Core Gen7/Gen8 +| KBL-H/S/E3 | B0 | 06-9e-09/2a | 000000b4 | 000000c6 | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000b4 | 000000c6 | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000b4 | 000000c6 | Core Gen8 +| CFL-H | R0 | 06-9e-0d/22 | 000000b8 | 000000c6 | Core Gen9 Mobile + +### Removed Platforms + +None + +## [microcode-20190918](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190918) + +### Purpose + +- Update for functional issues. Refer to [Intel® Xeon® Processor D-1500, D-1500 NS and D-1600 NS Spec Update](https://www.intel.com/content/www/us/en/products/docs/processors/xeon/xeon-d-1500-specification-update.html) for details. +- Update for functional issues. Refer to [Intel® Xeon® E7-8800 and E7-4800 v3 Processor Specification Update](https://www.intel.com/content/www/us/en/processors/xeon/xeon-e7-v3-spec-update.html) for details. +- Security updates for [INTEL-SA-00270](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00270.html). + +### New Platforms + +None + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| BDW-U/Y | E0/F0 | 06-3d-04/c0 | 0000002d | 0000002e | Core Gen5 +| HSX-EX | E0 | 06-3f-04/80 | 00000014 | 00000016 | Xeon E7 v3 +| BDW-H/E3 | E0/G0 | 06-47-01/22 | 00000020 | 00000021 | Core Gen5 +| BDX-ML | B0/M0/R0 | 06-4f-01/ef | 0b000036 | 0b000038 | Xeon E5/E7 v4; Core i7-69xx/68xx +| BDX-DE | V1 | 06-56-02/10 | 0000001a | 0000001c | Xeon D-1520/40 +| BDX-DE | V2/3 | 06-56-03/10 | 07000017 | 07000019 | Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19 +| BDX-DE | Y0 | 06-56-04/10 | 0f000015 | 0f000017 | Xeon D-1557/59/67/71/77/81/87 +| BDX-NS | A0 | 06-56-05/10 | 0e00000d | 0e00000f | Xeon D-1513N/23/33/43/53 +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 0200005e | 00000064 | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 0200005e | 00000064 | Xeon D-21xx +| CLX-SP | B1 | 06-55-07/bf | 05000021 | 0500002b | Xeon Scalable Gen2 + +### Removed Platforms + +None + +## [microcode-20190618](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190618) + +### Purpose + +- Security updates for [INTEL-SA-00233](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00233.html). + +### New Platforms + +None + +### Updated Platforms0 + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SNB-E/EN/EP | C1/M0 | 06-2d-06/6d | 0000061d | 0000061f | Xeon E3/E5, Core X +| SNB-E/EN/EP | C2/M1 | 06-2d-07/6d | 00000714 | 00000718 | Xeon E3/E5, Core X + +### Removed Platforms + +None + +## [microcode-20190514a](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190514a) + +### Purpose + +- Resolved errors in releasenote from microcode-20190514a. + +### New Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| VLV | C0 | 06-37-08/02 | | 00000838 | Atom Z series +| VLV | C0 | 06-37-08/0C | | 00000838 | Celeron N2xxx, Pentium N35xx +| VLV | D0 | 06-37-09/0F | | 0000090c | Atom E38xx +| CHV | C0 | 06-4c-03/01 | | 00000368 | Atom X series +| CHV | D0 | 06-4c-04/01 | | 00000411 | Atom X series +| CLX-SP | B1 | 06-55-07/bf | | 05000021 | Xeon Scalable Gen2 + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SNB | D2/G1/Q0 | 06-2a-07/12 | 0000002e | 0000002f | Core Gen2 +| IVB | E1/L1 | 06-3a-09/12 | 00000020 | 00000021 | Core Gen3 +| HSW | C0 | 06-3c-03/32 | 00000025 | 00000027 | Core Gen4 +| BDW-U/Y | E0/F0 | 06-3d-04/c0 | 0000002b | 0000002d | Core Gen5 +| IVB-E/EP | C1/M1/S1 | 06-3e-04/ed | 0000042d | 0000042e | Core Gen3 X Series; Xeon E5 v2 +| IVB-EX | D1 | 06-3e-07/ed | 00000714 | 00000715 | Xeon E7 v2 +| HSX-E/EP | Cx/M1 | 06-3f-02/6f | 00000041 | 00000043 | Core Gen4 X series; Xeon E5 v3 +| HSX-EX | E0 | 06-3f-04/80 | 00000013 | 00000014 | Xeon E7 v3 +| HSW-U | C0/D0 | 06-45-01/72 | 00000024 | 00000025 | Core Gen4 +| HSW-H | C0 | 06-46-01/32 | 0000001a | 0000001b | Core Gen4 +| BDW-H/E3 | E0/G0 | 06-47-01/22 | 0000001e | 00000020 | Core Gen5 +| SKL-U/Y | D0/K1 | 06-4e-03/c0 | 000000c6 | 000000cc | Core Gen6 +| BDX-ML | B0/M0/R0 | 06-4f-01/ef | 0b00002e | 0b000036 | Xeon E5/E7 v4; Core i7-69xx/68xx +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 0200005a | 0000005e | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 0200005a | 0000005e | Xeon D-21xx +| BDX-DE | V1 | 06-56-02/10 | 00000019 | 0000001a | Xeon D-1520/40 +| BDX-DE | V2/3 | 06-56-03/10 | 07000016 | 07000017 | Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19 +| BDX-DE | Y0 | 06-56-04/10 | 0f000014 | 0f000015 | Xeon D-1557/59/67/71/77/81/87 +| BDX-NS | A0 | 06-56-05/10 | 0e00000c | 0e00000d | Xeon D-1513N/23/33/43/53 +| APL | D0 | 06-5c-09/03 | 00000036 | 00000038 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx +| APL | E0 | 06-5c-0a/03 | 0000000c | 00000016 | Atom x5-E39xx +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000c6 | 000000cc | Core Gen6; Xeon E3 v5 +| DNV | B0 | 06-5f-01/01 | 00000024 | 0000002e | Atom C Series +| GLK | B0 | 06-7a-01/01 | 0000002c | 0000002e | Pentium Silver N/J5xxx, Celeron N/J4xxx +| AML-Y22 | H0 | 06-8e-09/10 | 0000009e | 000000b4 | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 0000009a | 000000b4 | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 0000009e | 000000b4 | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000a4 | 000000b8 | Core Gen8 Mobile +| WHL-U | V0 | 06-8e-0d/94 | 000000b2 | 000000b8 | Core Gen8 Mobile +| KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 0000009a | 000000b4 | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000aa | 000000b4 | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000aa | 000000b4 | Core Gen8 +| CFL-H/S | P0 | 06-9e-0c/22 | 000000a2 | 000000ae | Core Gen9 +| CFL-H | R0 | 06-9e-0d/22 | 000000b0 | 000000b8 | Core Gen9 Mobile + +### Removed Platforms + +None + +## [microcode-20190514](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190514) + +### Purpose + +- Security updates for [INTEL-SA-00233](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00233.html). + +### New Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| VLV | C0 | 06-37-08/02 | | 00000838 | Atom Z series +| VLV | C0 | 06-37-08/0C | | 00000838 | Celeron N2xxx, Pentium N35xx +| VLV | D0 | 06-37-09/0F | | 0000090c | Atom E38xx +| CHV | C0 | 06-4c-03/01 | | 00000368 | Atom X series +| CHV | D0 | 06-4c-04/01 | | 00000411 | Atom X series +| CLX-SP | B1 | 06-55-07/bf | | 05000021 | Xeon Scalable Gen2 + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| SNB | D2/G1/Q0 | 06-2a-07/12 | 0000002e | 0000002f | Core Gen2 +| IVB | E1/L1 | 06-3a-09/12 | 00000020 | 00000021 | Core Gen3 +| HSW | C0 | 06-3c-03/32 | 00000025 | 00000027 | Core Gen4 +| BDW-U/Y | E0/F0 | 06-3d-04/c0 | 0000002b | 0000002d | Core Gen5 +| IVB-E/EP | C1/M1/S1 | 06-3e-04/ed | 0000042e | 0000042f | Core Gen3 X Series; Xeon E5 v2 +| IVB-EX | D1 | 06-3e-07/ed | 00000714 | 00000715 | Xeon E7 v2 +| HSX-E/EP | Cx/M1 | 06-3f-02/6f | 00000041 | 00000043 | Core Gen4 X series; Xeon E5 v3 +| HSX-EX | E0 | 06-3f-04/80 | 00000013 | 00000014 | Xeon E7 v3 +| HSW-U | C0/D0 | 06-45-01/72 | 00000024 | 00000025 | Core Gen4 +| HSW-H | C0 | 06-46-01/32 | 0000001a | 0000001b | Core Gen4 +| BDW-H/E3 | E0/G0 | 06-47-01/22 | 0000001e | 00000020 | Core Gen5 +| SKL-U/Y | D0/K1 | 06-4e-03/c0 | 000000c6 | 000000cc | Core Gen6 +| BDX-ML | B0/M0/R0 | 06-4f-01/ef | 0b00002e | 00000036 | Xeon E5/E7 v4; Core i7-69xx/68xx +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 0200005a | 0000005e | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 0200005a | 0000005e | Xeon D-21xx +| BDX-DE | V1 | 06-56-02/10 | 00000019 | 0000001a | Xeon D-1520/40 +| BDX-DE | V2/3 | 06-56-03/10 | 07000016 | 07000017 | Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19 +| BDX-DE | Y0 | 06-56-04/10 | 0f000014 | 0f000015 | Xeon D-1557/59/67/71/77/81/87 +| BDX-NS | A0 | 06-56-05/10 | 0e00000c | 0e00000d | Xeon D-1513N/23/33/43/53 +| APL | D0 | 06-5c-09/03 | 00000036 | 00000038 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx +| SKL-H/S | R0/N0 | 06-5e-03/36 | 000000c6 | 000000cc | Core Gen6; Xeon E3 v5 +| DNV | B0 | 06-5f-01/01 | 00000024 | 0000002e | Atom C Series +| GLK | B0 | 06-7a-01/01 | 0000002c | 0000002e | Pentium Silver N/J5xxx, Celeron N/J4xxx +| AML-Y22 | H0 | 06-8e-09/10 | 0000009e | 000000b4 | Core Gen8 Mobile +| KBL-U/Y | H0 | 06-8e-09/c0 | 0000009a | 000000b4 | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 0000009e | 000000b4 | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | 000000a4 | 000000b8 | Core Gen8 Mobile +| WHL-U | V0 | 06-8e-0d/94 | 000000b2 | 000000b8 | Core Gen8 Mobile +| KBL-G/H/S/E3 | B0 | 06-9e-09/2a | 0000009a | 000000b4 | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 000000aa | 000000b4 | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 000000aa | 000000b4 | Core Gen8 +| CFL-H/S | P0 | 06-9e-0c/22 | 000000a2 | 000000ae | Core Gen9 +| CFL-H | R0 | 06-9e-0d/22 | 000000b0 | 000000b8 | Core Gen9 Mobile + +### Removed Platforms + +None + +## [microcode-20190312](https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20190312) + +### Purpose + +- Security updates for [INTEL-SA-00088](https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00088.html). + +### New Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| AML-Y22 | H0 | 06-8e-09/10 | | 0000009e | Core Gen8 Mobile +| WHL-U | W0 | 06-8e-0b/d0 | | 000000a4 | Core Gen8 Mobile +| WHL-U | V0 | 06-8e-0d/94 | | 000000b2 | Core Gen8 Mobile +| CFL-S | P0 | 06-9e-0c/22 | | 000000a2 | Core Gen9 Desktop +| CFL-H | R0 | 06-9e-0d/22 | | 000000b0 | Core Gen9 Mobile + +### Updated Platforms + +| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products +|:---------------|:---------|:------------|:---------|:---------|:--------- +| HSX-E/EP | Cx/M1 | 06-3f-02/6f | 0000003d | 00000041 | Core Gen4 X series; Xeon E5 v3 +| HSX-EX | E0 | 06-3f-04/80 | 00000012 | 00000013 | Xeon E7 v3 +| SKX-SP | H0/M0/U0 | 06-55-04/b7 | 0200004d | 0000005a | Xeon Scalable +| SKX-D | M1 | 06-55-04/b7 | 0200004d | 0000005a | Xeon D-21xx +| BDX-DE | V1 | 06-56-02/10 | 00000017 | 00000019 | Xeon D-1520/40 +| BDX-DE | V2/3 | 06-56-03/10 | 07000013 | 07000016 | Xeon D-1518/19/21/27/28/31/33/37/41/48, Pentium D1507/08/09/17/19 +| BDX-DE | Y0 | 06-56-04/10 | 0f000012 | 0f000014 | Xeon D-1557/59/67/71/77/81/87 +| BDX-NS | A0 | 06-56-05/10 | 0e00000a | 0e00000c | Xeon D-1513N/23/33/43/53 +| APL | D0 | 06-5c-09/03 | 00000032 | 00000036 | Pentium N/J4xxx, Celeron N/J3xxx, Atom x5/7-E39xx +| APL | E0 | 06-5c-0a/03 | 0000000c | 00000010 | Atom x5/7-E39xx +| GLK | B0 | 06-7a-01/01 | 00000028 | 0000002c | Pentium Silver N/J5xxx, Celeron N/J4xxx +| KBL-U/Y | H0 | 06-8e-09/c0 | 0000008e | 0000009a | Core Gen7 Mobile +| CFL-U43e | D0 | 06-8e-0a/c0 | 00000096 | 0000009e | Core Gen8 Mobile +| KBL-H/S/E3 | B0 | 06-9e-09/2a | 0000008e | 0000009a | Core Gen7; Xeon E3 v6 +| CFL-H/S/E3 | U0 | 06-9e-0a/22 | 00000096 | 000000aa | Core Gen8 Desktop, Mobile, Xeon E +| CFL-S | B0 | 06-9e-0b/02 | 0000008e | 000000aa | Core Gen8 + +### Removed Platforms + +None _______________________________________________ openSUSE Commits mailing list -- [email protected] To unsubscribe, email [email protected] List Netiquette: https://en.opensuse.org/openSUSE:Mailing_list_netiquette List Archives: https://lists.opensuse.org/archives/list/[email protected]
