Script 'mail_helper' called by obssrc Hello community, here is the log from the commit of package cpuid for openSUSE:Factory checked in at 2025-04-07 19:15:13 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/cpuid (Old) and /work/SRC/openSUSE:Factory/.cpuid.new.1907 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "cpuid" Mon Apr 7 19:15:13 2025 rev:23 rq:1267748 version:20250316 Changes: -------- --- /work/SRC/openSUSE:Factory/cpuid/cpuid.changes 2025-03-07 16:49:06.594869438 +0100 +++ /work/SRC/openSUSE:Factory/.cpuid.new.1907/cpuid.changes 2025-04-07 19:15:17.564641429 +0200 @@ -1,0 +2,34 @@ +Mon Apr 7 14:49:29 UTC 2025 - Valentin Lefebvre <valentin.lefeb...@suse.com> + +- Update to release 20250316 + * cpuid.c: Updated synth decoding for (0,6),(11,6) to mention Atom + P6900, name determined from an Intel SA about DSA. SSG* confirms that + Grand Ridge is Crestmont. + * cpuid.c: Changed uarch synth for (0,6),(10,15) to Crestmont. The + Sierra Forest name appears only under synth decoding, similar to + Meteor Lake & Grand Ridge. + * cpuid.c: Added synth decoding for (0,6),(11,7) Xeon E-2400 & Xeon 6300. + * cpuid.c: Improved synth decoding for (0,6),(10,15),3 Sierra Forest C0, + Xeon 6 6700E-Series. + * cpuid.c: Changed synth decoding for (8,15),(9,0-7) Van Gogh to + Custom APU: Steam Deck. + * cpuid.c: Changed synth decoding for (8,15),(9,8-15) Mero to + Custom APU: Magic Leap Demophon. + * cpuid.c: Changed synth decoding for (11,15),(1,*) to "5th Gen", and + uarch decoding for (11,15),(1,*) to "Zen 5c". + * cpuid.c: Changed synth decoding for (10,15),(7,0-7) to be + Phoenix/Hawk Point. For (10,15),(7,5) specifically, instlatx64 has + samples: Ryzen 7 8845HS (Hawk Point) and Ryzen 7 8700G (Phoenix). It + may not be possible to differentiate the cases with just cpuid data. + * cpuid.c: Added synth decoding for (0,6),(0,9,2) Timna, a canceled + precursor to Banias, circa 2000. + * cpuid.c: Improved synth decoding for (0,6),(12,5) Arrow Lake-H and its + A1 (2) stepping. + * cpuid.c: Improved synth decoding for (0,6),(12,6) Arrow Lake-H and its + A0/B0 (2) stepping. + * cpuid.c: Improved synth decoding for (0,6),(11,5) Arrow Lake-U and its + A1 (0) stepping. + * cpuid.c: Added AMD PkgType for Ryzen 9000 (11,15),(4,*). + * cpuid.man: Added 57896 doc. + +------------------------------------------------------------------- Old: ---- cpuid-20241023.src.tar.gz New: ---- cpuid-20250316.src.tar.gz ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ cpuid.spec ++++++ --- /var/tmp/diff_new_pack.RWHKXu/_old 2025-04-07 19:15:18.096663760 +0200 +++ /var/tmp/diff_new_pack.RWHKXu/_new 2025-04-07 19:15:18.100663928 +0200 @@ -17,7 +17,7 @@ Name: cpuid -Version: 20241023 +Version: 20250316 Release: 0 Summary: x86 CPU identification tool License: GPL-2.0-or-later ++++++ _scmsync.obsinfo ++++++ --- /var/tmp/diff_new_pack.RWHKXu/_old 2025-04-07 19:15:18.128665104 +0200 +++ /var/tmp/diff_new_pack.RWHKXu/_new 2025-04-07 19:15:18.128665104 +0200 @@ -1,5 +1,5 @@ -mtime: 1741338554 -commit: 954ceb779a9611af147d1c920eee6141bc239cd9e524cdb91bb6bc883b0b35f9 +mtime: 1744037800 +commit: c3cd94a99c7633f51e29e67290bd8de0d90c06eee9fd01d0db7ba3f79e59a7bc url: https://src.opensuse.org/jengelh/cpuid revision: master ++++++ build.specials.obscpio ++++++ ++++++ cpuid-20241023.src.tar.gz -> cpuid-20250316.src.tar.gz ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/ChangeLog new/cpuid-20250316/ChangeLog --- old/cpuid-20241023/ChangeLog 2024-10-23 15:37:44.000000000 +0200 +++ new/cpuid-20250316/ChangeLog 2025-03-17 03:35:38.000000000 +0100 @@ -1,4 +1,54 @@ -Mon Oct 23 2024 Todd Allen <todd.al...@etallen.com> +Sun Mar 16 2025 Todd Allen <todd.al...@etallen.com> + * Made new release. + +Thu Mar 13 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Updated synth decoding for (0,6),(11,6) to mention Atom + P6900, name determined from an Intel SA about DSA. SSG* confirms that + Grand Ridge is Crestmont. + * cpuid.c: Changed uarch synth for (0,6),(10,15) to Crestmont. The + Sierra Forest name appears only under synth decoding, similar to + Meteor Lake & Grand Ridge. + +Sat Mar 1 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Added synth decoding for (0,6),(11,7) Xeon E-2400 & Xeon 6300. + +Thu Feb 13 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Improved synth decoding for (0,6),(10,15),3 Sierra Forest C0, + Xeon 6 6700E-Series. + +Mon Feb 10 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Changed synth decoding for (8,15),(9,0-7) Van Gogh to + Custom APU: Steam Deck. + * cpuid.c: Changed synth decoding for (8,15),(9,8-15) Mero to + Custom APU: Magic Leap Demophon. + +Sat Feb 8 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Changed synth decoding for (11,15),(1,*) to "5th Gen", and + uarch decoding for (11,15),(1,*) to "Zen 5c". + +Mon Jan 13 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Changed synth decoding for (10,15),(7,0-7) to be + Phoenix/Hawk Point. For (10,15),(7,5) specifically, instlatx64 has + samples: Ryzen 7 8845HS (Hawk Point) and Ryzen 7 8700G (Phoenix). It + may not be possible to differentiate the cases with just cpuid data. + +Tue Jan 7 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Added synth decoding for (0,6),(0,9,2) Timna, a canceled + precursor to Banias, circa 2000. + +Tue Jan 7 2025 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Improved synth decoding for (0,6),(12,5) Arrow Lake-H and its + A1 (2) stepping. + * cpuid.c: Improved synth decoding for (0,6),(12,6) Arrow Lake-H and its + A0/B0 (2) stepping. + * cpuid.c: Improved synth decoding for (0,6),(11,5) Arrow Lake-U and its + A1 (0) stepping. + +Mon Oct 28 2024 Todd Allen <todd.al...@etallen.com> + * cpuid.c: Added AMD PkgType for Ryzen 9000 (11,15),(4,*). + * cpuid.man: Added 57896 doc. + +Wed Oct 23 2024 Todd Allen <todd.al...@etallen.com> * Made new release. Wed Oct 23 2024 Todd Allen <todd.al...@etallen.com> diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/FAMILY.NOTES new/cpuid-20250316/FAMILY.NOTES --- old/cpuid-20241023/FAMILY.NOTES 2024-10-23 14:55:15.000000000 +0200 +++ new/cpuid-20250316/FAMILY.NOTES 2025-03-13 15:16:49.000000000 +0100 @@ -128,7 +128,7 @@ Twin Lake Raptor Lake ----------------------------------------------------------------------------------------------------------------------------------------- - 2023 Crestmont Meteor Lake Sierra Forest Grand Ridge? + 2023 Crestmont Meteor Lake Sierra Forest Grand Ridge ----------------------------------------------------------------------------------------------------------------------------------------- 2024 Skymont Arrow Lake Lunar Lake @@ -257,7 +257,7 @@ Excavator Carrizo Carrizo Toronto Brown Falcon/Merlin Falcon (+) Bristol Ridge/Stoney Ridge Bristol Ridge/Stoney Ridge Prairie Falcon --------------------------------------------------------------------------------------------------------------------------------------- - Jaguar Kabini Kabini/Temash Kyoto Kabini + Jaguar Kabini/(PS4)/(Xbox One) Kabini/Temash Kyoto Kabini Puma (2014) Beema/Mullins Steppe Eagle (SoC)/Crowned Eagle (CPU) --------------------------------------------------------------------------------------------------------------------------------------- @@ -267,36 +267,37 @@ AMD Zen and later: - Desktop Desktop Enthusiast Mobile Server Embedded + Desktop Desktop Enthusiast Mobile Server Embedded -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- - Zen (14nm) 1000: Summit Ridge 1000: Whitehaven 2000: Raven Ridge 1st Gen: Naples/Snowy Owl V1000: Great Horned Owl/R1000: Banded Kestrel - 1000: Dali 1000: Dali - Zen+ (12nm) 2000: Pinnacle Ridge 2000: Colfax - 3000: Picasso 3000: Picasso - Zen 2 (7nm) 3000: Castle Peak 2nd Gen: Rome==Starship V2000: Grey Hawk - (update) 3000: Matisse 4000: Renoir - 5000: Lucienne - 7000: Mendocino - Van Gogh - Zen 3 (7nm) 5000: Vermeer 5000: Chagall==Genesis Peak 5000: Cezanne/Barcelo 3rd Gen: Milan - 6000/7000: Rembrandt V3000: still Rembrandt? - Trento (Frontier super) - Badami (?) - Zen 4 (5nm) 7000: Raphael 7000: Storm Peak 7000/8000: Phoenix 4th Gen: Genoa{==Stones?}(standard) - 7000: Dragon Range - (MI300 super) - 8000: Hawk Point - Zen 4c (5nm) 4th Gen: 97x4: Bergamo{==Stones-dense?}(cloud) - 4th Gen: 8xy4: Siena{==Stones-dense?}(edge) - Zen 5 9000: Granite Ridge 5th Gen: Turin==Breithorn (>= 2024) + Zen (14nm) 1000: Summit Ridge 1000: Whitehaven 2000: Raven Ridge 1st Gen: Naples/Snowy Owl V1000: Great Horned Owl/R1000: Banded Kestrel + 1000: Dali 1000: Dali + Zen+ (12nm) 2000: Pinnacle Ridge 2000: Colfax + 3000: Picasso 3000: Picasso + Zen 2 (7nm) 3000: Castle Peak 2nd Gen: Rome==Starship V2000: Grey Hawk + (update) 3000: Matisse 4000: Renoir + 5000: Lucienne + 7000: Mendocino + Cardinal (PS5) Van Gogh (Steam Deck) + ProjectX (Xbox X) Mero (MagicLeap Demophon) + Zen 3 (7nm) 5000: Vermeer 5000: Chagall==Genesis Peak 5000: Cezanne/Barcelo 3rd Gen: Milan + 6000/7000: Rembrandt V3000: still Rembrandt? + Trento (Frontier super) + Badami (?) + Zen 4 (5nm) 7000: Raphael 7000: Storm Peak 7000/8000: Phoenix 4th Gen: Genoa{==Stones?}(standard) + 7000: Dragon Range + (MI300 super) + 8000: Hawk Point + Zen 4c (N5) 4th Gen: 97x4: Bergamo{==Stones-dense?}(cloud) + 4th Gen: 8xy4: Siena{==Stones-dense?}(edge) + Zen 5 (N4P) 9000: Granite Ridge AI 300: Strix Point 5th Gen: 9xy5: Turin{==Breithorn} + Zen 5c (N3) 5th Gen: 9xy5: Sorano{==Breithorn-dense}(edge?) -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- - ? 9000: Shimada Peak? 9000: Fire Range? 5th Gen: Sorano==Breithorn-dense(edge) - ? 9000: Strix Point? - ? 9000: Krackan Point(edge)? - ? Strix Halo==Sarlak (>= 2025)? - ? Escher (>= 2025)? - ? Bald Eagle Point (>= 2025)? - ? Zen 6 Venice==Weisshorn (>= 2025) + ? 9000: Shimada Peak? 9000: Fire Range + ? 9000: Krackan Point(edge)? + ? AI ???: Strix Halo==Sarlak? + ? AI ???: Bald Eagle Point? + ? Escher? + ? Zen 6 10000: Medusa (2026)? 6th Gen: Venice==Weisshorn -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Ryzen = Desktop/Mobile diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/Makefile new/cpuid-20250316/Makefile --- old/cpuid-20241023/Makefile 2024-10-23 15:37:40.000000000 +0200 +++ new/cpuid-20250316/Makefile 2025-03-17 03:35:54.000000000 +0100 @@ -9,7 +9,7 @@ INSTALL_STRIP=-s PACKAGE=cpuid -VERSION=20241023 +VERSION=20250316 RELEASE=1 PROG=$(PACKAGE) @@ -67,7 +67,7 @@ install -D -m 444 cpuinfo2cpuid.man.gz $(BUILDROOT)/usr/share/man/man1/cpuinfo2cpuid.1.gz clean: - rm -f $(PROG) $(PROG).i386 $(PROG).x86_64 + rm -f $(PROG) $(PROG).opt $(PROG).i386 $(PROG).x86_64 rm -f $(PROG).man.gz rm -f cpuinfo2cpuid.man cpuinfo2cpuid.man.gz rm -f $(PACKAGE).spec diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/cpuid.c new/cpuid-20250316/cpuid.c --- old/cpuid-20241023/cpuid.c 2024-10-23 15:29:42.000000000 +0200 +++ new/cpuid-20250316/cpuid.c 2025-03-13 15:28:39.000000000 +0100 @@ -1,7 +1,7 @@ /* ** cpuid dumps CPUID information for each CPU. ** Copyright 2003,2004,2005,2006,2010,2011,2012,2013,2014,2015,2016,2017,2018, -** 2020,2021,2022,2023,2024 by Todd Allen. +** 2020,2021,2022,2023,2024,2025 by Todd Allen. ** ** This program is free software; you can redistribute it and/or ** modify it under the terms of the GNU General Public License @@ -27,8 +27,7 @@ // ILPMDF* is the Intel Linux Processor Microcode Data Files, which provides // microcode updates. Its purpose is not to list CPUID values, but it does so -// to help identify CPUs for each microcode update. The identificiations are -// in: +// to help identify CPUs for each microcode update. The identifications are in: // releasenote.md // MRG* is a table that forms the bulk of Intel Microcode Revision Guidance (or @@ -2299,10 +2298,10 @@ FMQ ( 0, 6, 10,12, Hc, *u = "Redwood Cove", *f = "shrink of Raptor Cove, optim of Golden Cove", *p = "Intel 4"); // MSR_CPUID_table*; (engr?) sample via instlatx64 from Komachi_ENSAKA FM ( 0, 6, 10,13, *u = "Granite Rapids", *ciu = TRUE, *f = "Redwood Cove, shrink of Raptor Cove, optim of Golden Cove", *p = "Intel 4"); // MSR_CPUID_table*; LX*; (engr?) sample via instlatx64 from Komachi_ENSAKA FM ( 0, 6, 10,14, *u = "Granite Rapids", *ciu = TRUE, *f = "Redwood Cove, shrink of Raptor Cove, optim of Golden Cove", *p = "Intel 4"); // MSR_CPUID_table*; LX* - FM ( 0, 6, 10,15, *u = "Sierra Forest", *p = "Intel 3"); // MSR_CPUID_table*; LX*; (engr?) sample via instlatx64 from Komachi_ENSAKA + FM ( 0, 6, 10,15, *u = "Crestmont", *p = "Intel 3"); // MSR_CPUID_table*; LX*; (engr?) sample via instlatx64 from Komachi_ENSAKA FMQ ( 0, 6, 11, 5, Ha, *u = "Skymont", *p = "TSMC N3B"); // MSR_CPUID_table* FMQ ( 0, 6, 11, 5, Hc, *u = "Lion Cove", *p = "TSMC N3B"); // MSR_CPUID_table* - FM ( 0, 6, 11, 6, *u = "Crestmont", *p = "Intel 7"); // MSR_CPUID_table*; LX*; (although assumption that Grand Ridge is Crestmont) + FM ( 0, 6, 11, 6, *u = "Crestmont", *p = "Intel 7"); // MSR_CPUID_table*; LX*; SSG* specifies Crestmont FMQ ( 0, 6, 11, 7, Ha, *u = "Gracemont", *p = "Intel 7"); // MSR_CPUID_table*; LX*; DPTF* FMQ ( 0, 6, 11, 7, Hc, *u = "Raptor Cove", *f = "optim of Golden Cove", *p = "Intel 7"); // MSR_CPUID_table*; LX*; DPTF* FMQ ( 0, 6, 11,10, Ha, *u = "Gracemont", *p = "Intel 7"); // DPTF*; Coreboot* @@ -2462,8 +2461,8 @@ FMm (10,15, 10, 0, *u = "Zen 4c", *p = "TSMC N5"); FMm (11,15, 0, 0, *u = "Zen 5", *p = "TSMC N4P"); // LX* & tangentially documented: 58088 AMD 1Ah Models 00h-0Fh and Models 10h-1Fh ACPI v6.5 Porting Guide FMm (11,15, 0, 8, *u = "Zen 5", *p = "TSMC N4P"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian - FMm (11,15, 1, 0, *u = "Zen 5", *p = "TSMC N3"); // tangentially documented: 58088 AMD 1Ah Models 00h-0Fh and Models 10h-1Fh ACPI v6.5 Porting Guide - FMm (11,15, 1, 8, *u = "Zen 5", *p = "TSMC N3"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian + FMm (11,15, 1, 0, *u = "Zen 5c", *p = "TSMC N3"); // tangentially documented: 58088 AMD 1Ah Models 00h-0Fh and Models 10h-1Fh ACPI v6.5 Porting Guide + FMm (11,15, 1, 8, *u = "Zen 5c", *p = "TSMC N3"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 2, 0, *u = "Zen 5", *p = "TSMC N4P"); // undocumented, but engr sample via instlatx64 from milkyway.cs.rpi.edu (996435) FMm (11,15, 2, 8, *u = "Zen 5", *p = "TSMC N4P"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 3, 0, *u = "Zen 5", *p = "TSMC N4P"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian @@ -2972,6 +2971,9 @@ FMQ ( 0, 6, 0, 8, dP, "Intel Pentium III (Coppermine)"); FM ( 0, 6, 0, 8, "Intel Pentium III (unknown type) (Coppermine)"); // Intel docs (252665, 300303). + FMSQ( 0, 6, 0, 9, 2, dC, "Intel Celeron (Timna)"); + FMSQ( 0, 6, 0, 9, 2, dP, "Intel Pentium (Timna)"); + FMS ( 0, 6, 0, 9, 2, "Intel Pentium (unknown type) (Timna)"); FMSQ( 0, 6, 0, 9, 5, dC, "Intel Celeron M (Banias B1)"); FMSQ( 0, 6, 0, 9, 5, dP, "Intel Pentium M (Banias B1)"); FMS ( 0, 6, 0, 9, 5, "Intel Pentium M (unknown type) (Banias B1)"); @@ -3492,6 +3494,9 @@ FMS ( 0, 6, 5, 6, 2, "Intel Xeon D-1500 (Broadwell-DE V1)"); FMS ( 0, 6, 5, 6, 3, "Intel Xeon D-1500 (Broadwell-DE V2/V3)"); // V3 from MRG* 2018-03-06 FMS ( 0, 6, 5, 6, 4, "Intel Xeon D-1500 (Broadwell-DE Y0)"); + // SSG* suggests that FMS (0,6),(5,6),5 may also include some Xeon D-16xx + // (Hewitt Lake) instances, but I've seen none, and am not sure how to + // distinguish. FMS ( 0, 6, 5, 6, 5, "Intel Xeon D-1500N (Broadwell-DE A1)"); FM ( 0, 6, 5, 6, "Intel Xeon (unknown type) (Broadwell-DE)"); // Intel docs (334646) omit the stepping number for B0. But as of Jan 2020, @@ -3877,20 +3882,31 @@ FM ( 0, 6, 10,12, "Intel (unknown type) (Meteor Lake-S)"); // MSR_CPUID_table*; LX*; (engr?) sample via instlatx64 from Komachi_ENSAKA FM ( 0, 6, 10,13, "Intel (unknown type) (Granite Rapids)"); // MSR_CPUID_table*; (engr?) sample via instlatx64 from Komachi_ENSAKA FM ( 0, 6, 10,14, "Intel (unknown type) (Granite Rapids)"); // MSR_CPUID_table* + FMSQ( 0, 6, 10,15, 3, sX, "Intel Xeon 6 6700E-Series (Sierra Forest C0)"); // stepping from ILPMDF* 2025-02-11 + FMS ( 0, 6, 10,15, 3, "Intel (unknown type) (Sierra Forest C0)"); // stepping from ILPMDF* 2025-02-11 FMQ ( 0, 6, 10,15, sX, "Intel Xeon 6 (Sierra Forest)"); // MSR_CPUID_table*; sample from CCRT FM ( 0, 6, 10,15, "Intel (unknown type) (Sierra Forest)"); // MSR_CPUID_table*; sample from CCRT & (engr?) sample via instlatx64 from Komachi_ENSAKA - FM ( 0, 6, 11, 5, "Intel (unknown type) (Arrow Lake-U)"); // MSR_CPUID_table*; Intel SDE 9.33.0 misc/cpuid/arl/cpuid.def - FM ( 0, 6, 11, 6, "Intel Atom (Grand Ridge)"); // MSR_CPUID_table* + // Intel doc 834774 + FMSQ( 0, 6, 11, 5, 0, dU, "Intel Core Ultra 2xxS (Arrow Lake-U A1)"); + FMS ( 0, 6, 11, 5, 0, "Intel (unknown type) (Arrow Lake-U A1)"); + FMQ ( 0, 6, 11, 5, dU, "Intel Core Ultra 2xxS (Arrow Lake-U)"); + FM ( 0, 6, 11, 5, "Intel (unknown type) (Arrow Lake-U)"); + // Grand Ridge: Atom P6900 name from: + // https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01194.html + // SSG* mentions stepping 4, but with no name: + FM ( 0, 6, 11, 6, "Intel Atom P6900 (Grand Ridge)"); // MSR_CPUID_table* // Intel doc 740518 provides steppings 1 & 2, but without names // Intel doc 743844 provides steppings 1 & 2, with names! FMSQ( 0, 6, 11, 7, 0, Ha, "Intel Core i*-13000 / i*-14000 E-core (Raptor Lake-S/HX A0)"); // Coreboot* FMSQ( 0, 6, 11, 7, 0, Hc, "Intel Core i*-13000 / i*-14000 P-core (Raptor Lake-S/HX A0)"); // Coreboot* FMSQ( 0, 6, 11, 7, 0, dc, "Intel Core i*-13000 / i*-14000 (Raptor Lake-S/HX A0)"); // Coreboot* FMS ( 0, 6, 11, 7, 0, "Intel (unknown type) (Raptor Lake-S/HX A0)"); // Coreboot* + FMSQ( 0, 6, 10, 7, 1, sX, "Intel Xeon E-2400 / 6300 (Raptor Lake-E B0)"); FMSQ( 0, 6, 11, 7, 1, Ha, "Intel Core i*-13000 / i*-14000 E-core (Raptor Lake-S/HX B0)"); FMSQ( 0, 6, 11, 7, 1, Hc, "Intel Core i*-13000 / i*-14000 P-core (Raptor Lake-S/HX B0)"); FMSQ( 0, 6, 11, 7, 1, dc, "Intel Core i*-13000 / i*-14000 (Raptor Lake-S/HX B0)"); FMS ( 0, 6, 11, 7, 1, "Intel (unknown type) (Raptor Lake-S/HX B0)"); + FMQ ( 0, 6, 10, 7, sX, "Intel Xeon E-2400 / 6300 (Raptor Lake-E)"); FMQ ( 0, 6, 11, 7, Ha, "Intel Core i*-13000 / i*-14000 E-core (Raptor Lake-S/HX)"); FMQ ( 0, 6, 11, 7, Hc, "Intel Core i*-13000 / i*-14000 P-core (Raptor Lake-S/HX)"); FMQ ( 0, 6, 11, 7, dc, "Intel Core i*-13000 / i*-14000 (Raptor Lake-S/HX)"); @@ -3916,6 +3932,7 @@ FMS ( 0, 6, 11,13, 1, "Intel (unknown type) (Lunar Lake B0)"); FMQ ( 0, 6, 11,13, dU, "Intel Core Ultra 2xxV (Lunar Lake)"); FM ( 0, 6, 11,13, "Intel (unknown type) (Lunar Lake)"); + // Intel doc 764616 // ILPMDF* 20231114 claims this covers stepping N0 as well as A0. // ILPMDF* 20240910 claims that this now also covers Twin Lake N0. // Is Twin Lake (Intel N250) distinguishable from @@ -3948,10 +3965,14 @@ FMQ ( 0, 6, 11,15, Hc, "Intel Core i*-13000 P-core (Raptor Lake-S/HX/P)"); FMQ ( 0, 6, 11,15, dc, "Intel Core i*-13000 (Raptor Lake-S/HX/P)"); FM ( 0, 6, 11,15, "Intel (unknown type) (Raptor Lake-S/HX/P)"); + // Intel doc 834774 + FMSQ( 0, 6, 12, 5, 2, dU, "Intel Core Ultra 2xxS (Arrow Lake-H A1)"); + FMS ( 0, 6, 12, 5, 2, "Intel (unknown type) (Arrow Lake-H A1)"); + FMQ ( 0, 6, 12, 5, dU, "Intel Core Ultra 2xxS (Arrow Lake-H)"); FM ( 0, 6, 12, 5, "Intel (unknown type) (Arrow Lake)"); // Intel doc 834774 - FMSQ( 0, 6, 12, 6, 2, dU, "Intel Core Ultra 2xxS (Arrow Lake-S B0)"); - FMS ( 0, 6, 12, 6, 2, "Intel (unknown type) (Arrow Lake-S B0)"); + FMSQ( 0, 6, 12, 6, 2, dU, "Intel Core Ultra 2xxS (Arrow Lake-S A0/B0)"); + FMS ( 0, 6, 12, 6, 2, "Intel (unknown type) (Arrow Lake-S A0/B0)"); FMQ ( 0, 6, 12, 6, dU, "Intel Core Ultra 2xxS (Arrow Lake-S)"); FM ( 0, 6, 12, 6, "Intel (unknown type) (Arrow Lake-S)"); FM ( 0, 6, 12,12, "Intel (unknown type) (Panther Lake)"); // MSR_CPUID_table*, LX* @@ -4893,10 +4914,10 @@ FMmQ( 8,15, 6, 0, dR, "AMD Ryzen 4000 (Renoir %c%u)"); FMm ( 8,15, 6, 0, "AMD (unknown type) (Renoir/Grey Hawk %c%u)"); FMm ( 8,15, 6, 8, "AMD Ryzen 5000 (Lucienne %c%u)"); // undocumented, but instlatx64 samples - FMm ( 8,15, 7, 0, "AMD Ryzen 3000 (Matisse %c%u)"); // PPR 56176, but samples from Steven Noonan + FMm ( 8,15, 7, 0, "AMD Ryzen 3000 (Matisse %c%u)"); // PPR 56176, samples from Steven Noonan FM ( 8,15, 8, 4, "AMD 4800S Desktop Kit (ProjectX)"); // undocumented, but sample via instlatx64 - FMm ( 8,15, 9, 0, "AMD Ryzen (Van Gogh %c%u)"); // undocumented, but samples from instlatx64 - FMm ( 8,15, 9, 8, "AMD Ryzen (Mero %c%u)"); // undocumented, but (engr?) sample via instlatx64 from @zimogorets + FMm ( 8,15, 9, 0, "AMD Custom APU: Steam Deck (Van Gogh %c%u)"); // undocumented, but samples from instlatx64 + FMm ( 8,15, 9, 8, "AMD Custom APU: Magic Leap Demophon (Mero %c%u)"); // undocumented, but (engr?) sample via instlatx64 from @zimogorets FMm ( 8,15, 10, 0, "AMD Ryzen 7000 (Mendocino %c%u)"); // PPR 57243 F ( 8,15, "AMD (unknown model)"); FMm (10,15, 0, 0, "AMD EPYC (3rd Gen) (Milan %c%u)"); // 56683 @@ -4908,7 +4929,7 @@ FMm (10,15, 4, 0, "AMD Ryzen 6000/7000 (Rembrandt %c%u)"); // undocumented, but instlatx64 samples FMm (10,15, 5, 0, "AMD Ryzen 5000 (Cezanne/Barcelo %c%u)"); // PPR 56569 FMm (10,15, 6, 0, "AMD Ryzen 7000 (Raphael %c%u)"); // PPR 56713 - FMm (10,15, 7, 0, "AMD Ryzen 7000/8000 (Phoenix %c%u)"); // PPR 57019 + FMm (10,15, 7, 0, "AMD Ryzen 7000/8000 (Phoenix/Hawk Point %c%u)"); // PPR 57019, instlatx64 sample of Ryzen 7 8845HS, which AMD also says is Hawk Point FM (10,15, 7,12, "AMD Ryzen (Hawk Point %c%u)"); // sample via instlatx64 from geekbench.com (special case only for model 12?) FMm (10,15, 7, 8, "AMD Ryzen (Phoenix 2 %c%u)"); // Coreboot* FMm (10,15, 8, 0, "AMD Instinct MI300C"); // undocumented, but LKML: https://lkml.org/lkml/2023/7/21/835 from AMD's Yazen Ghannam @@ -4917,15 +4938,15 @@ F (10,15, "AMD (unknown model)"); FMm (11,15, 0, 0, "AMD EPYC (5th Gen) (Turin %c%u)"); // PPR 57238 FMm (11,15, 0, 8, "AMD EPYC (5th Gen) (Turin %c%u)"); // PPR 57238 - FMm (11,15, 1, 0, "AMD EPYC (unknown type) (Sorano %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian - FMm (11,15, 1, 8, "AMD EPYC (unknown type) (Sorano %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian + FMm (11,15, 1, 0, "AMD EPYC (5th Gen) (Sorano %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian + FMm (11,15, 1, 8, "AMD EPYC (5th Gen) (Sorano %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian // Are all these Strix Point's Ryzen AI 300 CPU's? // I suspect the latter ones are not. FMm (11,15, 2, 0, "AMD Ryzen AI 300 (Strix Point %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 2, 8, "AMD Ryzen AI 300 (Strix Point %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 3, 0, "AMD Ryzen (Strix Point %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 3, 8, "AMD Ryzen (Strix Point %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian - FMm (11,15, 4, 0, "AMD Ryzen 9000 (Granite Ridge %c%u)"); // undocumented, but LX*, sample from Chan Edison & engr sample via instlatx64 from einsteinathome.org (13142934) + FMm (11,15, 4, 0, "AMD Ryzen 9000 (Granite Ridge %c%u)"); // PPR 57896 FMm (11,15, 4, 8, "AMD Ryzen 9000 (Granite Ridge %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 5, 0, "AMD EPYC (unknown type) (Venice %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian FMm (11,15, 5, 8, "AMD EPYC (unknown type) (Venice %c%u)"); // undocumented, but LLVM patch from AMD's Ganesh Gopalasubramanian @@ -8852,6 +8873,13 @@ static ccstring pkg_type[1<<4] = { NULL, NULL, NULL, + NULL, + "SP5 (4)" }; + use_pkg_type = pkg_type; + } else if (MaskMm(val_1_eax) == ShftXM(4) + ShftM(0)) { + static ccstring pkg_type[1<<4] = { NULL, + NULL, + NULL, NULL, "SP5 (4)" }; use_pkg_type = pkg_type; diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/cpuid.man new/cpuid-20250316/cpuid.man --- old/cpuid-20241023/cpuid.man 2024-10-23 15:38:19.000000000 +0200 +++ new/cpuid-20250316/cpuid.man 2025-03-17 03:36:43.000000000 +0100 @@ -1,7 +1,7 @@ .\" -.\" $Id: cpuid.man,v 20241023 2024/10/23 7:36:59 todd $ +.\" $Id: cpuid.man,v 20250316 2025/03/16 20:35:23 todd $ .\" -.TH CPUID 1 "23 Oct 2024" "20241023" +.TH CPUID 1 "16 Mar 2025" "20250316" .SH NAME cpuid \- Dump CPUID information for each CPU .SH SYNOPSIS @@ -688,6 +688,9 @@ 57238: Processor Programming Reference (PPR) for AMD Family 1Ah Model 02h, Revision C1 Processors .br +57896: Processor Programming Reference (PPR) for AMD Family 1Ah Model 44h, +Revision B0 Processors +.br 58015: AMD EPYC 9004 Series Architecture Overview .br 58268: AMD EPYC 8004 Series Architecture Overview diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/cpuid-20241023/cpuid.spec new/cpuid-20250316/cpuid.spec --- old/cpuid-20241023/cpuid.spec 2024-10-23 15:39:16.000000000 +0200 +++ new/cpuid-20250316/cpuid.spec 2025-03-17 03:38:21.000000000 +0100 @@ -1,4 +1,4 @@ -%define version 20241023 +%define version 20250316 %define release 1 Summary: dumps CPUID information about the CPU(s) Name: cpuid
