Script 'mail_helper' called by obssrc
Hello community,
here is the log from the commit of package spirv-llvm-translator for
openSUSE:Factory checked in at 2025-10-14 18:06:11
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/spirv-llvm-translator (Old)
and /work/SRC/openSUSE:Factory/.spirv-llvm-translator.new.18484 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "spirv-llvm-translator"
Tue Oct 14 18:06:11 2025 rev:26 rq:1311132 version:21.1.1
Changes:
--------
---
/work/SRC/openSUSE:Factory/spirv-llvm-translator/spirv-llvm-translator.changes
2025-09-30 17:38:55.916552074 +0200
+++
/work/SRC/openSUSE:Factory/.spirv-llvm-translator.new.18484/spirv-llvm-translator.changes
2025-10-14 18:06:35.898417989 +0200
@@ -1,0 +2,11 @@
+Sat Oct 11 13:28:27 UTC 2025 - Aaron Puchert <[email protected]>
+
+- Update to version 21.1.1.
+ * Support for SPV_INTEL_shader_atomic_bfloat16 extension.
+ * Implement SPV_INTEL_bfloat16_arithmetic.
+ * Fix BFloat16 mangling.
+ * Fix error propagation in parseSPIRV.
+- Remove Add-support-for-SPV_INTEL_function_variants.patch: the
+ required functionality is now available in spirv-headers.
+
+-------------------------------------------------------------------
Old:
----
Add-support-for-SPV_INTEL_function_variants.patch
SPIRV-LLVM-Translator-21.1.0.tar.gz
New:
----
SPIRV-LLVM-Translator-21.1.1.tar.gz
----------(Old B)----------
Old: * Fix error propagation in parseSPIRV.
- Remove Add-support-for-SPV_INTEL_function_variants.patch: the
required functionality is now available in spirv-headers.
----------(Old E)----------
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ spirv-llvm-translator.spec ++++++
--- /var/tmp/diff_new_pack.j1U9sG/_old 2025-10-14 18:06:36.750454183 +0200
+++ /var/tmp/diff_new_pack.j1U9sG/_new 2025-10-14 18:06:36.754454353 +0200
@@ -23,7 +23,7 @@
%define sover 21
Name: spirv-llvm-translator
-Version: 21.1.0
+Version: 21.1.1
Release: 0
Summary: LLVM/SPIR-V Bi-Directional Translator library
License: BSD-3-Clause
@@ -31,9 +31,6 @@
URL: https://github.com/KhronosGroup/SPIRV-LLVM-Translator
Source:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/archive/refs/tags/v%{version}.tar.gz#/SPIRV-LLVM-Translator-%{version}.tar.gz
Source101: %{name}.rpmlintrc
-# Temporarily revert upstream commit because the counterpart in spirv-headers
-# (https://github.com/KhronosGroup/SPIRV-Headers/pull/532) is not released yet.
-Patch0:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/commit/aaa23785dcbd7cabebad860edd9a3aebfc6bbb41.patch#/Add-support-for-SPV_INTEL_function_variants.patch
BuildRequires: cmake >= 3.3
BuildRequires: gcc%{?gcc_version} >= 9
BuildRequires: gcc%{?gcc_version}-c++ >= 9
@@ -69,7 +66,6 @@
%prep
%setup -q -n SPIRV-LLVM-Translator-%{version}
-%patch -P 0 -p 1 -R
%build
%cmake \
++++++ SPIRV-LLVM-Translator-21.1.0.tar.gz ->
SPIRV-LLVM-Translator-21.1.1.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/include/LLVMSPIRVExtensions.inc
new/SPIRV-LLVM-Translator-21.1.1/include/LLVMSPIRVExtensions.inc
--- old/SPIRV-LLVM-Translator-21.1.0/include/LLVMSPIRVExtensions.inc
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/include/LLVMSPIRVExtensions.inc
2025-09-29 12:53:11.000000000 +0200
@@ -77,6 +77,8 @@
EXT(SPV_INTEL_2d_block_io)
EXT(SPV_INTEL_subgroup_matrix_multiply_accumulate)
EXT(SPV_KHR_bfloat16)
+EXT(SPV_INTEL_bfloat16_arithmetic)
EXT(SPV_INTEL_ternary_bitwise_function)
EXT(SPV_INTEL_int4)
EXT(SPV_INTEL_function_variants)
+EXT(SPV_INTEL_shader_atomic_bfloat16)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/Mangler/ManglingUtils.cpp
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/Mangler/ManglingUtils.cpp
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/Mangler/ManglingUtils.cpp
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/Mangler/ManglingUtils.cpp
2025-09-29 12:53:11.000000000 +0200
@@ -93,6 +93,7 @@
"intel_sub_group_avc_ime_result_dual_reference_streamin_t"
};
+// clang-format off
const char *MangledTypes[PRIMITIVE_NUM] = {
"b", // BOOL
"h", // UCHAR
@@ -106,7 +107,7 @@
"Dh", // HALF
"f", // FLOAT
"d", // DOUBLE
- "u6__bf16", // __BF16
+ "DF16b", // __BF16
"v", // VOID
"z", // VarArg
"14ocl_image1d_ro", // PRIMITIVE_IMAGE1D_RO_T
@@ -175,6 +176,7 @@
"55ocl_intel_sub_group_avc_ime_single_reference_streamin_t", //
PRIMITIVE_SUB_GROUP_AVC_IME_SINGLE_REF_STREAMIN_T
"53ocl_intel_sub_group_avc_ime_dual_reference_streamin_t" //
PRIMITIVE_SUB_GROUP_AVC_IME_DUAL_REF_STREAMIN_T
};
+// clang-format on
const char *ReadableAttribute[ATTR_NUM] = {
"restrict", "volatile", "const", "__private",
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore' old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/SPIRVUtil.cpp
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/SPIRVUtil.cpp
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/SPIRVUtil.cpp 2025-08-01
09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/SPIRVUtil.cpp 2025-09-29
12:53:11.000000000 +0200
@@ -525,6 +525,11 @@
char Mangled = Copy.back();
std::string Mangled2 = Copy.substr(Copy.size() - 2);
+ std::string Mangled5 = Copy.substr(Copy.size() - 5);
+ if (Mangled5 == "DF16b") {
+ return ParamType::FLOAT;
+ }
+
if (isMangledTypeFP(Mangled) || isMangledTypeHalf(Mangled2)) {
return ParamType::FLOAT;
} else if (isMangledTypeUnsigned(Mangled)) {
@@ -1913,6 +1918,9 @@
NumElems = VecTy->getNumElements();
Ty = VecTy->getElementType();
}
+ if (Ty->isBFloatTy() &&
+ BM->hasCapability(internal::CapabilityBFloat16ArithmeticINTEL))
+ return true;
if ((!Ty->isFloatTy() && !Ty->isDoubleTy() && !Ty->isHalfTy()) ||
(!BM->hasCapability(CapabilityVectorAnyINTEL) &&
((NumElems > 4) && (NumElems != 8) && (NumElems != 16)))) {
@@ -1929,6 +1937,9 @@
NumElems = VecTy->getNumElements();
Ty = VecTy->getElementType();
}
+ if (Ty->isBFloatTy() &&
+ BM->hasCapability(internal::CapabilityBFloat16ArithmeticINTEL))
+ return true;
if ((!Ty->isIntegerTy()) ||
(!BM->hasCapability(CapabilityVectorAnyINTEL) &&
((NumElems > 4) && (NumElems != 8) && (NumElems != 16)))) {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/SPIRVWriter.cpp
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/SPIRVWriter.cpp
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/SPIRVWriter.cpp 2025-08-01
09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/SPIRVWriter.cpp 2025-09-29
12:53:11.000000000 +0200
@@ -4201,6 +4201,20 @@
// -spirv-allow-unknown-intrinsics work correctly.
auto IID = II->getIntrinsicID();
switch (IID) {
+ case Intrinsic::fabs:
+ case Intrinsic::fma:
+ case Intrinsic::maxnum:
+ case Intrinsic::minnum:
+ case Intrinsic::fmuladd: {
+ Type *Ty = II->getType();
+ if (Ty->isBFloatTy())
+ BM->addCapability(internal::CapabilityBFloat16ArithmeticINTEL);
+ break;
+ }
+ default:
+ break;
+ }
+ switch (IID) {
case Intrinsic::assume: {
// llvm.assume translation is currently supported only within
// SPV_KHR_expect_assume extension, ignore it otherwise, since it's
@@ -5485,6 +5499,11 @@
SmallVector<std::string, 2> Dec;
if (isBuiltinTransToExtInst(CI->getCalledFunction(), &ExtSetKind, &ExtOp,
&Dec)) {
+ if (const auto *FirstArg = F->getArg(0)) {
+ const auto *Type = FirstArg->getType();
+ if (Type->isBFloatTy())
+ BM->addCapability(internal::CapabilityBFloat16ArithmeticINTEL);
+ }
if (DemangledName.find("__spirv_ocl_printf") != StringRef::npos) {
auto *FormatStrPtr = cast<PointerType>(CI->getArgOperand(0)->getType());
if (FormatStrPtr->getAddressSpace() !=
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVEntry.h
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVEntry.h
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVEntry.h
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVEntry.h
2025-09-29 12:53:11.000000000 +0200
@@ -916,6 +916,8 @@
case CapabilityFunctionVariantsINTEL:
case CapabilitySpecConditionalINTEL:
return ExtensionID::SPV_INTEL_function_variants;
+ case internal::CapabilityBFloat16ArithmeticINTEL:
+ return ExtensionID::SPV_INTEL_bfloat16_arithmetic;
default:
return {};
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVEnum.h
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVEnum.h
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVEnum.h
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVEnum.h
2025-09-29 12:53:11.000000000 +0200
@@ -228,6 +228,8 @@
{CapabilityBFloat16TypeKHR, CapabilityCooperativeMatrixKHR});
ADD_VEC_INIT(CapabilityInt4CooperativeMatrixINTEL,
{CapabilityInt4TypeINTEL, CapabilityCooperativeMatrixKHR});
+ ADD_VEC_INIT(internal::CapabilityBFloat16ArithmeticINTEL,
+ {CapabilityBFloat16TypeKHR});
}
template <> inline void SPIRVMap<SPIRVExecutionModelKind, SPIRVCapVec>::init()
{
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVInstruction.h
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVInstruction.h
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVInstruction.h
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVInstruction.h
2025-09-29 12:53:11.000000000 +0200
@@ -3019,6 +3019,8 @@
public:
std::optional<ExtensionID> getRequiredExtension() const override {
assert(hasType());
+ if (getType()->isTypeFloat(16, FPEncodingBFloat16KHR))
+ return ExtensionID::SPV_INTEL_shader_atomic_bfloat16;
if (getType()->isTypeFloat(16))
return ExtensionID::SPV_EXT_shader_atomic_float16_add;
return ExtensionID::SPV_EXT_shader_atomic_float_add;
@@ -3026,6 +3028,8 @@
SPIRVCapVec getRequiredCapability() const override {
assert(hasType());
+ if (getType()->isTypeFloat(16, FPEncodingBFloat16KHR))
+ return {internal::CapabilityAtomicBFloat16AddINTEL};
if (getType()->isTypeFloat(16))
return {CapabilityAtomicFloat16AddEXT};
if (getType()->isTypeFloat(32))
@@ -3033,26 +3037,30 @@
if (getType()->isTypeFloat(64))
return {CapabilityAtomicFloat64AddEXT};
llvm_unreachable(
- "AtomicFAddEXT can only be generated for f16, f32, f64 types");
+ "AtomicFAddEXT can only be generated for bf16, f16, f32, f64 types");
}
};
class SPIRVAtomicFMinMaxEXTBase : public SPIRVAtomicInstBase {
public:
std::optional<ExtensionID> getRequiredExtension() const override {
+ if (getType()->isTypeFloat(16, FPEncodingBFloat16KHR))
+ return ExtensionID::SPV_INTEL_shader_atomic_bfloat16;
return ExtensionID::SPV_EXT_shader_atomic_float_min_max;
}
SPIRVCapVec getRequiredCapability() const override {
assert(hasType());
+ if (getType()->isTypeFloat(16, FPEncodingBFloat16KHR))
+ return {internal::CapabilityAtomicBFloat16MinMaxINTEL};
if (getType()->isTypeFloat(16))
return {CapabilityAtomicFloat16MinMaxEXT};
if (getType()->isTypeFloat(32))
return {CapabilityAtomicFloat32MinMaxEXT};
if (getType()->isTypeFloat(64))
return {CapabilityAtomicFloat64MinMaxEXT};
- llvm_unreachable(
- "AtomicF(Min|Max)EXT can only be generated for f16, f32, f64 types");
+ llvm_unreachable("AtomicF(Min|Max)EXT can only be generated for bf16, f16,
"
+ "f32, f64 types");
}
};
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVModule.cpp
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVModule.cpp
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVModule.cpp
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVModule.cpp
2025-09-29 12:53:11.000000000 +0200
@@ -1732,6 +1732,8 @@
SPIRVValue *Op1,
SPIRVValue *Op2,
SPIRVBasicBlock *BB) {
+ if (Type->isTypeFloat(16, FPEncodingBFloat16KHR) && TheOpCode != OpDot)
+ addCapability(internal::CapabilityBFloat16ArithmeticINTEL);
return addInstruction(SPIRVInstTemplateBase::create(
TheOpCode, Type, getId(),
getVec(Op1->getId(), Op2->getId()), BB, this),
@@ -1755,6 +1757,8 @@
SPIRVType *TheType,
SPIRVValue *Op,
SPIRVBasicBlock *BB) {
+ if (TheType->isTypeFloat(16, FPEncodingBFloat16KHR) && TheOpCode != OpDot)
+ addCapability(internal::CapabilityBFloat16ArithmeticINTEL);
return addInstruction(
SPIRVInstTemplateBase::create(TheOpCode, TheType, getId(),
getVec(Op->getId()), BB, this),
@@ -2572,7 +2576,7 @@
SPIRVWord Header[5] = {0};
I.read(reinterpret_cast<char *>(&Header), sizeof(Header));
- SPIRVErrorLog ErrorLog = MI.getErrorLog();
+ SPIRVErrorLog &ErrorLog = MI.getErrorLog();
if (!ErrorLog.checkError(!I.eof(), SPIRVEC_InvalidModule,
"input file is empty") ||
!ErrorLog.checkError(!I.fail(), SPIRVEC_InvalidModule,
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h
2025-09-29 12:53:11.000000000 +0200
@@ -625,6 +625,9 @@
add(CapabilityLongCompositesINTEL, "LongCompositesINTEL");
add(CapabilityOptNoneEXT, "OptNoneEXT");
add(CapabilityAtomicFloat16AddEXT, "AtomicFloat16AddEXT");
+ add(internal::CapabilityAtomicBFloat16AddINTEL, "AtomicBFloat16AddINTEL");
+ add(internal::CapabilityAtomicBFloat16MinMaxINTEL,
+ "AtomicBFloat16MinMaxINTEL");
add(CapabilityDebugInfoModuleINTEL, "DebugInfoModuleINTEL");
add(CapabilityBFloat16ConversionINTEL, "Bfloat16ConversionINTEL");
add(CapabilitySplitBarrierINTEL, "SplitBarrierINTEL");
@@ -687,6 +690,7 @@
add(CapabilityInt4CooperativeMatrixINTEL, "Int4CooperativeMatrixINTEL");
add(CapabilityFunctionVariantsINTEL, "FunctionVariantsINTEL");
add(CapabilitySpecConditionalINTEL, "SpecConditionalINTEL");
+ add(internal::CapabilityBFloat16ArithmeticINTEL, "BFloat16ArithmeticINTEL");
}
SPIRV_DEF_NAMEMAP(Capability, SPIRVCapabilityNameMap)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/spirv_internal.hpp
new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/spirv_internal.hpp
--- old/SPIRV-LLVM-Translator-21.1.0/lib/SPIRV/libSPIRV/spirv_internal.hpp
2025-08-01 09:28:13.000000000 +0200
+++ new/SPIRV-LLVM-Translator-21.1.1/lib/SPIRV/libSPIRV/spirv_internal.hpp
2025-09-29 12:53:11.000000000 +0200
@@ -106,7 +106,10 @@
ICapGlobalVariableDecorationsINTEL = 6146,
ICapabilityTaskSequenceINTEL = 6162,
ICapabilityCooperativeMatrixCheckedInstructionsINTEL = 6192,
+ ICapabilityBFloat16ArithmeticINTEL = 6226,
ICapabilityCooperativeMatrixOffsetInstructionsINTEL = 6238,
+ ICapabilityAtomicBFloat16AddINTEL = 6255,
+ ICapabilityAtomicBFloat16MinMaxINTEL = 6256,
ICapabilityCooperativeMatrixPrefetchINTEL = 6411,
ICapabilityMaskedGatherScatterINTEL = 6427,
ICapabilityJointMatrixWIInstructionsINTEL = 6435,
@@ -202,6 +205,9 @@
_SPIRV_OP(Op, ConvertHandleToImageINTEL)
_SPIRV_OP(Op, ConvertHandleToSamplerINTEL)
_SPIRV_OP(Op, ConvertHandleToSampledImageINTEL)
+
+_SPIRV_OP(Capability, AtomicBFloat16AddINTEL)
+_SPIRV_OP(Capability, AtomicBFloat16MinMaxINTEL)
#undef _SPIRV_OP
constexpr SourceLanguage SourceLanguagePython =
@@ -263,6 +269,8 @@
static_cast<Capability>(ICapTokenTypeINTEL);
constexpr Capability CapabilityGlobalVariableDecorationsINTEL =
static_cast<Capability>(ICapGlobalVariableDecorationsINTEL);
+constexpr Capability CapabilityBFloat16ArithmeticINTEL =
+ static_cast<Capability>(ICapabilityBFloat16ArithmeticINTEL);
constexpr ExecutionMode ExecutionModeNamedSubgroupSizeINTEL =
static_cast<ExecutionMode>(IExecModeNamedSubgroupSizeINTEL);
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_bfloat16/bfloat16_math.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_bfloat16/bfloat16_math.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_bfloat16/bfloat16_math.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_bfloat16/bfloat16_math.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,271 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_KHR_bfloat16
--spirv-ext=+SPV_INTEL_bfloat16_arithmetic -o %t.spv
+; RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s
--check-prefix=CHECK-SPIRV
+
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefix=CHECK-LLVM
+
+; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_KHR_bfloat16 2>&1 >/dev/null |
FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_bfloat16_arithmetic 2>&1
>/dev/null | FileCheck %s --check-prefix=CHECK-ERROR
+; CHECK-ERROR: RequiresExtension: Feature requires the following SPIR-V
extension:
+
+source_filename = "bfloat16.cpp"
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spirv64-unknown-unknown"
+
+; CHECK-SPIRV: Capability BFloat16TypeKHR
+; CHECK-SPIRV: Capability BFloat16ArithmeticINTEL
+; CHECK-SPIRV: Extension "SPV_INTEL_bfloat16_arithmetic"
+; CHECK-SPIRV: Extension "SPV_KHR_bfloat16"
+; CHECK-SPIRV: 4 TypeFloat [[BFLOAT:[0-9]+]] 16 0
+; CHECK-SPIRV: 5 Function [[#]] [[#]] [[#]] [[#]]
+; CHECK-SPIRV: 7 Phi [[BFLOAT]] [[#]] [[#]] [[#]] [[#]] [[#]]
+; CHECK-SPIRV: 2 ReturnValue [[#]]
+; CHECK-SPIRV: 4 Variable [[#]] [[ADDR1:[0-9]+]]
+; CHECK-SPIRV: 4 Variable [[#]] [[ADDR2:[0-9]+]]
+; CHECK-SPIRV: 4 Variable [[#]] [[ADDR3:[0-9]+]]
+; CHECK-SPIRV: 6 Load [[BFLOAT]] [[DATA1:[0-9]+]] [[ADDR1]]
+; CHECK-SPIRV: 6 Load [[BFLOAT]] [[DATA2:[0-9]+]] [[ADDR2]]
+; CHECK-SPIRV: 6 Load [[BFLOAT]] [[DATA3:[0-9]+]] [[ADDR3]]
+; Undef
+; Constant
+; ConstantComposite
+; ConstantNull
+; SpecConstant
+; SpecConstantComposite
+; CHECK-SPIRV: 4 ConvertFToU [[#]] [[#]] [[DATA1]]
+; CHECK-SPIRV: 4 ConvertFToS [[#]] [[#]] [[DATA1]]
+; CHECK-SPIRV: 4 ConvertSToF [[BFLOAT]] [[#]] [[#]]
+; CHECK-SPIRV: 4 ConvertUToF [[BFLOAT]] [[#]] [[#]]
+; Bitcast
+; CHECK-SPIRV: 4 FNegate [[BFLOAT]] [[#]] [[DATA1]]
+; CHECK-SPIRV: 5 FAdd [[BFLOAT]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FSub [[BFLOAT]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FMul [[BFLOAT]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FDiv [[BFLOAT]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FRem [[BFLOAT]] [[#]] [[DATA1]] [[DATA2]]
+; FMod
+; VectorTimesScalar
+; CHECK-SPIRV: 4 IsNan [[#]] [[#]] [[DATA1]]
+; CHECK-SPIRV: 4 IsInf [[#]] [[#]] [[DATA1]]
+; IsFinite
+; CHECK-SPIRV: 4 IsNormal [[#]] [[#]] [[DATA1]]
+; CHECK-SPIRV: 5 Ordered [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 Unordered [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 6 Select [[BFLOAT]] [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdNotEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordNotEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdLessThan [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordLessThan [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdGreaterThan [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordGreaterThan [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdLessThanEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordLessThanEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FOrdGreaterThanEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 5 FUnordGreaterThanEqual [[#]] [[#]] [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] fabs [[DATA1]]
+; CHECK-SPIRV: 8 ExtInst [[BFLOAT]] [[#]] [[#]] fclamp [[DATA1]] [[DATA2]]
[[DATA3]]
+; CHECK-SPIRV: 8 ExtInst [[BFLOAT]] [[#]] [[#]] fma [[DATA1]] [[DATA2]]
[[DATA3]]
+; CHECK-SPIRV: 7 ExtInst [[BFLOAT]] [[#]] [[#]] fmax [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 7 ExtInst [[BFLOAT]] [[#]] [[#]] fmin [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 8 ExtInst [[BFLOAT]] [[#]] [[#]] mad [[DATA1]] [[DATA2]]
[[DATA3]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] nan [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_cos [[DATA1]]
+; CHECK-SPIRV: 7 ExtInst [[BFLOAT]] [[#]] [[#]] native_divide [[DATA1]]
[[DATA2]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_exp [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_exp10 [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_exp2 [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_log [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_log10 [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_log2 [[DATA1]]
+; CHECK-SPIRV: 7 ExtInst [[BFLOAT]] [[#]] [[#]] native_powr [[DATA1]] [[DATA2]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_recip [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_rsqrt [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_sin [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_sqrt [[DATA1]]
+; CHECK-SPIRV: 6 ExtInst [[BFLOAT]] [[#]] [[#]] native_tan [[DATA1]]
+
+; CHECK-LLVM: define spir_func void @OpPhi(bfloat %data1, bfloat %data2)
+; CHECK-LLVM: %OpPhi = phi bfloat [ %data1, %blockA ], [ %data2, %blockB ]
+; CHECK-LLVM: ret bfloat %OpReturnValue
+; CHECK-LLVM: [[ADDR1:[%a-z0-9]+]] = alloca bfloat
+; CHECK-LLVM: [[ADDR2:[%a-z0-9]+]] = alloca bfloat
+; CHECK-LLVM: [[ADDR3:[%a-z0-9]+]] = alloca bfloat
+; CHECK-LLVM: [[DATA1:[%a-z0-9]+]] = load bfloat, ptr [[ADDR1]]
+; CHECK-LLVM: [[DATA2:[%a-z0-9]+]] = load bfloat, ptr [[ADDR2]]
+; CHECK-LLVM: [[DATA3:[%a-z0-9]+]] = load bfloat, ptr [[ADDR3]]
+; %OpUndef
+; %OpConstant
+; %OpConstantComposite
+; %OpConstantNull
+; %OpSpecConstant
+; %OpSpecConstantComposite
+; CHECK-LLVM: %OpConvertFToU = fptoui bfloat [[DATA1]] to i32
+; CHECK-LLVM: %OpConvertFToS = fptosi bfloat [[DATA1]] to i32
+; CHECK-LLVM: %OpConvertSToF = sitofp i32 0 to bfloat
+; CHECK-LLVM: %OpConvertUToF = uitofp i32 0 to bfloat
+; %OpBitcast
+; CHECK-LLVM: %OpFNegate = fneg bfloat [[DATA1]]
+; CHECK-LLVM: %OpFAdd = fadd bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFSub = fsub bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFMul = fmul bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFDiv = fdiv bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFRem = frem bfloat [[DATA1]], [[DATA2]]
+; %OpFMod
+; %OpVectorTimesScalar
+; CHECK-LLVM: %[[#]] = call spir_func i32 @_Z5isnanDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %[[#]] = call spir_func i32 @_Z5isinfDF16b(bfloat [[DATA1]])
+; %OpIsFinite
+; CHECK-LLVM: %[[#]] = call spir_func i32 @_Z8isnormalDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %OpOrdered = fcmp ord bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpUnordered = fcmp uno bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpSelect = select i1 true, bfloat [[DATA1]], bfloat [[DATA2]]
+; CHECK-LLVM: %OpFOrdEqual = fcmp oeq bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordEqual = fcmp ueq bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFOrdNotEqual = fcmp one bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordNotEqual = fcmp une bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFOrdLessThan = fcmp olt bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordLessThan = fcmp ult bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFOrdGreaterThan = fcmp ogt bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordGreaterThan = fcmp ugt bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFOrdLessThanEqual = fcmp ole bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordLessThanEqual = fcmp ule bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFOrdGreaterThanEqual = fcmp oge bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %OpFUnordGreaterThanEqual = fcmp uge bfloat [[DATA1]], [[DATA2]]
+; CHECK-LLVM: %fabs = call spir_func bfloat @_Z4fabsDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %fclamp = call spir_func bfloat @_Z5clampDF16bDF16bDF16b(bfloat
[[DATA1]], bfloat [[DATA2]], bfloat [[DATA3]])
+; CHECK-LLVM: %fma = call spir_func bfloat @_Z3fmaDF16bDF16bDF16b(bfloat
[[DATA1]], bfloat [[DATA2]], bfloat [[DATA3]])
+; CHECK-LLVM: %fmax = call spir_func bfloat @_Z4fmaxDF16bDF16b(bfloat
[[DATA1]], bfloat [[DATA2]])
+; CHECK-LLVM: %fmin = call spir_func bfloat @_Z4fminDF16bDF16b(bfloat
[[DATA1]], bfloat [[DATA2]])
+; CHECK-LLVM: %mad = call spir_func bfloat @_Z3madDF16bDF16bDF16b(bfloat
[[DATA1]], bfloat [[DATA2]], bfloat [[DATA3]])
+; CHECK-LLVM: %nan = call spir_func bfloat @_Z3nanDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_cos = call spir_func bfloat @_Z10native_cosDF16b(bfloat
[[DATA1]])
+; CHECK-LLVM: %native_divide = call spir_func bfloat
@_Z13native_divideDF16bDF16b(bfloat [[DATA1]], bfloat [[DATA2]])
+; CHECK-LLVM: %native_exp = call spir_func bfloat @_Z10native_expDF16b(bfloat
[[DATA1]])
+; CHECK-LLVM: %native_exp10 = call spir_func bfloat
@_Z12native_exp10DF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_exp2 = call spir_func bfloat
@_Z11native_exp2DF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_log = call spir_func bfloat @_Z10native_logDF16b(bfloat
[[DATA1]])
+; CHECK-LLVM: %native_log10 = call spir_func bfloat
@_Z12native_log10DF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_log2 = call spir_func bfloat
@_Z11native_log2DF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_powr = call spir_func bfloat
@_Z11native_powrDF16bDF16b(bfloat [[DATA1]], bfloat [[DATA2]])
+; CHECK-LLVM: %native_recip = call spir_func bfloat
@_Z12native_recipDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_rsqrt = call spir_func bfloat
@_Z12native_rsqrtDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_sin = call spir_func bfloat @_Z10native_sinDF16b(bfloat
[[DATA1]])
+; CHECK-LLVM: %native_sqrt = call spir_func bfloat
@_Z11native_sqrtDF16b(bfloat [[DATA1]])
+; CHECK-LLVM: %native_tan = call spir_func bfloat @_Z10native_tanDF16b(bfloat
[[DATA1]])
+
+declare spir_func bfloat @_Z5clampDF16bDF16bDF16b(bfloat, bfloat, bfloat)
+declare spir_func bfloat @_Z3nanDF16b(bfloat)
+declare spir_func bfloat @_Z10native_cosDF16b(bfloat)
+declare spir_func bfloat @_Z13native_divideDF16bDF16b(bfloat, bfloat)
+declare spir_func bfloat @_Z10native_expDF16b(bfloat)
+declare spir_func bfloat @_Z12native_exp10DF16b(bfloat)
+declare spir_func bfloat @_Z11native_exp2DF16b(bfloat)
+declare spir_func bfloat @_Z10native_logDF16b(bfloat)
+declare spir_func bfloat @_Z12native_log10DF16b(bfloat)
+declare spir_func bfloat @_Z11native_log2DF16b(bfloat)
+declare spir_func bfloat @_Z11native_powrDF16bDF16b(bfloat, bfloat)
+declare spir_func bfloat @_Z12native_recipDF16b(bfloat)
+declare spir_func bfloat @_Z12native_rsqrtDF16b(bfloat)
+declare spir_func bfloat @_Z10native_sinDF16b(bfloat)
+declare spir_func bfloat @_Z11native_sqrtDF16b(bfloat)
+declare spir_func bfloat @_Z10native_tanDF16b(bfloat)
+
+define spir_func void @OpPhi(bfloat %data1, bfloat %data2) {
+ br label %blockA
+blockA:
+ br label %phi
+blockB:
+ br label %phi
+phi:
+ %OpPhi = phi bfloat [ %data1, %blockA ], [ %data2, %blockB ]
+ ret void
+}
+
+define spir_func bfloat @OpReturnValue(bfloat %OpReturnValue) {
+ ret bfloat %OpReturnValue
+}
+
+define spir_kernel void @testMath() {
+entry:
+ %addr1 = alloca bfloat
+ %addr2 = alloca bfloat
+ %addr3 = alloca bfloat
+ %data1 = load bfloat, ptr %addr1
+ %data2 = load bfloat, ptr %addr2
+ %data3 = load bfloat, ptr %addr3
+ ; %OpUndef
+ ; %OpConstant
+ ; %OpConstantComposite
+ ; %OpConstantNull
+ ; %OpSpecConstant
+ ; %OpSpecConstantComposite
+ %OpConvertFToU = fptoui bfloat %data1 to i32
+ %OpConvertFToS = fptosi bfloat %data1 to i32
+ %OpConvertSToF = sitofp i32 0 to bfloat
+ %OpConvertUToF = uitofp i32 0 to bfloat
+ ; %OpBitcast
+ %OpFNegate = fneg bfloat %data1
+ %OpFAdd = fadd bfloat %data1, %data2
+ %OpFSub = fsub bfloat %data1, %data2
+ %OpFMul = fmul bfloat %data1, %data2
+ %OpFDiv = fdiv bfloat %data1, %data2
+ %OpFRem = frem bfloat %data1, %data2
+ ; %OpFMod
+ ; %OpVectorTimesScalar
+ %OpIsNan = call i1 @llvm.is.fpclass.bfloat(bfloat %data1, i32 3)
+ %OpIsInf = call i1 @llvm.is.fpclass.bfloat(bfloat %data1, i32 516)
+ ; %OpIsFinite
+ %OpIsNormal = call i1 @llvm.is.fpclass.bfloat(bfloat %data1, i32 264)
+ %OpOrdered = fcmp ord bfloat %data1, %data2
+ %OpUnordered = fcmp uno bfloat %data1, %data2
+ %OpSelect = select i1 true, bfloat %data1, bfloat %data2
+ %OpFOrdEqual = fcmp oeq bfloat %data1, %data2
+ %OpFUnordEqual = fcmp ueq bfloat %data1, %data2
+ %OpFOrdNotEqual = fcmp one bfloat %data1, %data2
+ %OpFUnordNotEqual = fcmp une bfloat %data1, %data2
+ %OpFOrdLessThan = fcmp olt bfloat %data1, %data2
+ %OpFUnordLessThan = fcmp ult bfloat %data1, %data2
+ %OpFOrdGreaterThan = fcmp ogt bfloat %data1, %data2
+ %OpFUnordGreaterThan = fcmp ugt bfloat %data1, %data2
+ %OpFOrdLessThanEqual = fcmp ole bfloat %data1, %data2
+ %OpFUnordLessThanEqual = fcmp ule bfloat %data1, %data2
+ %OpFOrdGreaterThanEqual = fcmp oge bfloat %data1, %data2
+ %OpFUnordGreaterThanEqual = fcmp uge bfloat %data1, %data2
+ %fabs = call bfloat @llvm.fabs.bfloat(bfloat %data1)
+ %fclamp = call spir_func bfloat @_Z5clampDF16bDF16bDF16b(bfloat %data1,
bfloat %data2, bfloat %data3)
+ %fma = call bfloat @llvm.fma.bfloat(bfloat %data1, bfloat %data2, bfloat
%data3)
+ %fmax = call bfloat @llvm.maxnum.bfloat(bfloat %data1, bfloat %data2)
+ %fmin = call bfloat @llvm.minnum.bfloat(bfloat %data1, bfloat %data2)
+ %mad = call bfloat @llvm.fmuladd.bfloat(bfloat %data1, bfloat %data2, bfloat
%data3)
+ %nan = call spir_func bfloat @_Z3nanDF16b(bfloat %data1)
+ %native_cos = call spir_func bfloat @_Z10native_cosDF16b(bfloat %data1)
+ %native_divide = call spir_func bfloat @_Z13native_divideDF16bDF16b(bfloat
%data1, bfloat %data2)
+ %native_exp = call spir_func bfloat @_Z10native_expDF16b(bfloat %data1)
+ %native_exp10 = call spir_func bfloat @_Z12native_exp10DF16b(bfloat %data1)
+ %native_exp2 = call spir_func bfloat @_Z11native_exp2DF16b(bfloat %data1)
+ %native_log = call spir_func bfloat @_Z10native_logDF16b(bfloat %data1)
+ %native_log10 = call spir_func bfloat @_Z12native_log10DF16b(bfloat %data1)
+ %native_log2 = call spir_func bfloat @_Z11native_log2DF16b(bfloat %data1)
+ %native_powr = call spir_func bfloat @_Z11native_powrDF16bDF16b(bfloat
%data1, bfloat %data2)
+ %native_recip = call spir_func bfloat @_Z12native_recipDF16b(bfloat %data1)
+ %native_rsqrt = call spir_func bfloat @_Z12native_rsqrtDF16b(bfloat %data1)
+ %native_sin = call spir_func bfloat @_Z10native_sinDF16b(bfloat %data1)
+ %native_sqrt = call spir_func bfloat @_Z11native_sqrtDF16b(bfloat %data1)
+ %native_tan = call spir_func bfloat @_Z10native_tanDF16b(bfloat %data1)
+ ret void
+}
+
+!opencl.enable.FP_CONTRACT = !{}
+!opencl.spir.version = !{!0}
+!opencl.ocl.version = !{!1}
+!opencl.used.extensions = !{!2}
+!opencl.used.optional.core.features = !{!3}
+!opencl.compiler.options = !{!3}
+
+!0 = !{i32 1, i32 2}
+!1 = !{i32 2, i32 0}
+!2 = !{!"cl_khr_fp16"}
+!3 = !{}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFAddEXT.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFAddEXT.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFAddEXT.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFAddEXT.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,30 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc
--spirv-ext=+SPV_INTEL_shader_atomic_bfloat16,+SPV_KHR_bfloat16 -o %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o %t.spt
+; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
+
+; RUN: llvm-spirv --spirv-target-env=SPV-IR -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spir64-unknown-unknown"
+
+; CHECK-SPIRV-DAG: Capability AtomicBFloat16AddINTEL
+; CHECK-SPIRV-DAG: Capability BFloat16TypeKHR
+; CHECK-SPIRV-DAG: Extension "SPV_INTEL_shader_atomic_bfloat16"
+; CHECK-SPIRV-DAG: Extension "SPV_KHR_bfloat16"
+
+; CHECK-SPIRV: TypeFloat [[BFLOAT:[0-9]+]] 16 0
+
+; Function Attrs: convergent norecurse nounwind
+define dso_local spir_func bfloat @test_AtomicFAddEXT_bfloat(ptr addrspace(4)
align 2 dereferenceable(4) %Arg) {
+entry:
+ %0 = addrspacecast ptr addrspace(4) %Arg to ptr addrspace(1)
+ ; CHECK-SPIRV: AtomicFAddEXT [[BFLOAT]]
+ ; CHECK-LLVM-SPV: call spir_func bfloat
@_Z21__spirv_AtomicFAddEXTPU3AS1DF16biiDF16b({{.*}}bfloat
+ %ret = tail call spir_func bfloat
@_Z21__spirv_AtomicFAddEXTPU3AS1DF16biiDF16b(ptr addrspace(1) %0, i32 1, i32
896, bfloat 1.000000e+00)
+ ret bfloat %ret
+}
+
+; Function Attrs: convergent
+declare dso_local spir_func bfloat
@_Z21__spirv_AtomicFAddEXTPU3AS1DF16biiDF16b(ptr addrspace(1), i32, i32, bfloat)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMaxEXT.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMaxEXT.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMaxEXT.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMaxEXT.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,30 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc
--spirv-ext=+SPV_INTEL_shader_atomic_bfloat16,+SPV_KHR_bfloat16 -o %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o %t.spt
+; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
+
+; RUN: llvm-spirv --spirv-target-env=SPV-IR -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spir64-unknown-unknown"
+
+; CHECK-SPIRV-DAG: Capability AtomicBFloat16MinMaxINTEL
+; CHECK-SPIRV-DAG: Capability BFloat16TypeKHR
+; CHECK-SPIRV-DAG: Extension "SPV_INTEL_shader_atomic_bfloat16"
+; CHECK-SPIRV-DAG: Extension "SPV_KHR_bfloat16"
+
+; CHECK-SPIRV: TypeFloat [[BFLOAT:[0-9]+]] 16 0
+
+; Function Attrs: convergent norecurse nounwind
+define dso_local spir_func bfloat @test_AtomicFMaxEXT_bfloat(ptr addrspace(4)
align 2 dereferenceable(4) %Arg) {
+entry:
+ %0 = addrspacecast ptr addrspace(4) %Arg to ptr addrspace(1)
+ ; CHECK-SPIRV: AtomicFMaxEXT [[BFLOAT]]
+ ; CHECK-LLVM-SPV: call spir_func bfloat
@_Z21__spirv_AtomicFMaxEXTPU3AS1DF16biiDF16b({{.*}}bfloat
+ %ret = tail call spir_func bfloat
@_Z21__spirv_AtomicFMaxEXTPU3AS1DF16biiDF16b(ptr addrspace(1) %0, i32 1, i32
896, bfloat 1.000000e+00)
+ ret bfloat %ret
+}
+
+; Function Attrs: convergent
+declare dso_local spir_func bfloat
@_Z21__spirv_AtomicFMaxEXTPU3AS1DF16biiDF16b(ptr addrspace(1), i32, i32, bfloat)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMinEXT.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMinEXT.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMinEXT.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/AtomicFMinEXT.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,30 @@
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc
--spirv-ext=+SPV_INTEL_shader_atomic_bfloat16,+SPV_KHR_bfloat16 -o %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o %t.spt
+; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV
+
+; RUN: llvm-spirv --spirv-target-env=SPV-IR -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis %t.rev.bc -o - | FileCheck %s --check-prefixes=CHECK-LLVM-SPV
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spir64-unknown-unknown"
+
+; CHECK-SPIRV-DAG: Capability AtomicBFloat16MinMaxINTEL
+; CHECK-SPIRV-DAG: Capability BFloat16TypeKHR
+; CHECK-SPIRV-DAG: Extension "SPV_INTEL_shader_atomic_bfloat16"
+; CHECK-SPIRV-DAG: Extension "SPV_KHR_bfloat16"
+
+; CHECK-SPIRV: TypeFloat [[BFLOAT:[0-9]+]] 16 0
+
+; Function Attrs: convergent norecurse nounwind
+define dso_local spir_func bfloat @test_AtomicFMinEXT_bfloat(ptr addrspace(4)
align 2 dereferenceable(4) %Arg) {
+entry:
+ %0 = addrspacecast ptr addrspace(4) %Arg to ptr addrspace(1)
+ ; CHECK-SPIRV: AtomicFMinEXT [[BFLOAT]]
+ ; CHECK-LLVM-SPV: call spir_func bfloat
@_Z21__spirv_AtomicFMinEXTPU3AS1DF16biiDF16b({{.*}}bfloat
+ %ret = tail call spir_func bfloat
@_Z21__spirv_AtomicFMinEXTPU3AS1DF16biiDF16b(ptr addrspace(1) %0, i32 1, i32
896, bfloat 1.000000e+00)
+ ret bfloat %ret
+}
+
+; Function Attrs: convergent
+declare dso_local spir_func bfloat
@_Z21__spirv_AtomicFMinEXTPU3AS1DF16biiDF16b(ptr addrspace(1), i32, i32, bfloat)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fadd.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fadd.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fadd.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fadd.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,34 @@
+; RUN: llvm-as < %s -o %t.bc
+; RUN: llvm-spirv
--spirv-ext=+SPV_INTEL_shader_atomic_bfloat16,+SPV_KHR_bfloat16 %t.bc -o %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s
+
+; CHECK-DAG: Extension "SPV_INTEL_shader_atomic_bfloat16"
+; CHECK-DAG: Extension "SPV_KHR_bfloat16"
+; CHECK-DAG: Capability AtomicBFloat16AddINTEL
+; CHECK-DAG: Capability BFloat16TypeKHR
+; CHECK: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-DAG: Constant [[Int]] [[Scope_CrossDevice:[0-9]+]] 0 {{$}}
+; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK: TypeFloat [[BFloat:[0-9]+]] 16 0
+; CHECK: Variable {{[0-9]+}} [[BFloatPointer:[0-9]+]]
+; CHECK: Constant [[BFloat]] [[BFloatValue:[0-9]+]] 16936
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global bfloat
0.000000e+00, align 8
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fadd ptr addrspace(1) @f, bfloat 42.000000e+00 seq_cst
+; CHECK: AtomicFAddEXT [[BFloat]] {{[0-9]+}} [[BFloatPointer]]
[[Scope_CrossDevice]] [[MemSem_SequentiallyConsistent]] [[BFloatValue]]
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fminfmax.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fminfmax.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fminfmax.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/atomicrmw_fminfmax.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,36 @@
+; RUN: llvm-as < %s -o %t.bc
+; RUN: llvm-spirv
--spirv-ext=+SPV_INTEL_shader_atomic_bfloat16,+SPV_KHR_bfloat16 %t.bc -o %t.spv
+; RUN: llvm-spirv -to-text %t.spv -o - | FileCheck %s
+
+; CHECK-DAG: Extension "SPV_INTEL_shader_atomic_bfloat16"
+; CHECK-DAG: Extension "SPV_KHR_bfloat16"
+; CHECK-DAG: AtomicBFloat16MinMaxINTEL
+; CHECK-DAG: Capability BFloat16TypeKHR
+; CHECK: TypeInt [[Int:[0-9]+]] 32 0
+; CHECK-DAG: Constant [[Int]] [[Scope_CrossDevice:[0-9]+]] 0 {{$}}
+; CHECK-DAG: Constant [[Int]] [[MemSem_SequentiallyConsistent:[0-9]+]] 16
+; CHECK: TypeFloat [[BFloat:[0-9]+]] 16 0
+; CHECK: Variable {{[0-9]+}} [[BFloatPointer:[0-9]+]]
+; CHECK: Constant [[BFloat]] [[BFloatValue:[0-9]+]] 16936
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global bfloat
0.000000e+00, align 4
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fmin ptr addrspace(1) @f, bfloat 42.000000e+00 seq_cst
+; CHECK: AtomicFMinEXT [[BFloat]] {{[0-9]+}} [[BFloatPointer]]
[[Scope_CrossDevice]] [[MemSem_SequentiallyConsistent]] [[BFloatValue]]
+ %1 = atomicrmw fmax ptr addrspace(1) @f, bfloat 42.000000e+00 seq_cst
+; CHECK: AtomicFMaxEXT [[BFloat]] {{[0-9]+}} [[BFloatPointer]]
[[Scope_CrossDevice]] [[MemSem_SequentiallyConsistent]] [[BFloatValue]]
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/negative.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/negative.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/negative.ll
1970-01-01 01:00:00.000000000 +0100
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/INTEL/SPV_INTEL_shader_atomic_bfloat16/negative.ll
2025-09-29 12:53:11.000000000 +0200
@@ -0,0 +1,29 @@
+; RUN: llvm-as < %s -o %t.bc
+; RUN: not llvm-spirv --spirv-ext=+SPV_INTEL_shader_atomic_bfloat16 %t.bc 2>&1
| FileCheck %s --check-prefix=CHECK-NO-BF
+; RUN: not llvm-spirv --spirv-ext=+SPV_KHR_bfloat16 %t.bc 2>&1 | FileCheck %s
--check-prefix=CHECK-NO-ATOM
+
+; CHECK-NO-BF: RequiresExtension: Feature requires the following SPIR-V
extension:
+; CHECK-NO-BF-NEXT: SPV_KHR_bfloat16
+; CHECK-NO-BF-NEXT: NOTE: LLVM module contains bfloat type, translation of
which requires this extension
+
+; CHECK-NO-ATOM: RequiresExtension: Feature requires the following SPIR-V
extension:
+; CHECK-NO-ATOM-NEXT: SPV_INTEL_shader_atomic_bfloat16
+
+target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64"
+
+@f = common dso_local local_unnamed_addr addrspace(1) global bfloat
0.000000e+00, align 8
+
+; Function Attrs: nounwind
+define dso_local spir_func void @test_atomicrmw_fadd() local_unnamed_addr #0 {
+entry:
+ %0 = atomicrmw fadd ptr addrspace(1) @f, bfloat 42.000000e+00 seq_cst
+
+ ret void
+}
+
+attributes #0 = { nounwind "correctly-rounded-divide-sqrt-fp-math"="false"
"disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false"
"min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false"
"no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false"
"no-trapping-math"="false" "stack-protector-buffer-size"="8"
"unsafe-fp-math"="false" "use-soft-float"="false" }
+
+!llvm.module.flags = !{!0}
+
+!0 = !{i32 1, !"wchar_size", i32 4}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/KHR/SPV_KHR_bfloat16/bfloat16_dot.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/KHR/SPV_KHR_bfloat16/bfloat16_dot.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/KHR/SPV_KHR_bfloat16/bfloat16_dot.ll
2025-08-01 09:28:13.000000000 +0200
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/KHR/SPV_KHR_bfloat16/bfloat16_dot.ll
2025-09-29 12:53:11.000000000 +0200
@@ -20,9 +20,9 @@
; CHECK-LLVM: %addrB = alloca <2 x bfloat>
; CHECK-LLVM: %dataA = load <2 x bfloat>, ptr %addrA
; CHECK-LLVM: %dataB = load <2 x bfloat>, ptr %addrB
-; CHECK-LLVM: %call = call spir_func bfloat @_Z3dotDv2_u6__bf16S_(<2 x bfloat>
%dataA, <2 x bfloat> %dataB)
+; CHECK-LLVM: %call = call spir_func bfloat @_Z3dotDv2_DF16bS_(<2 x bfloat>
%dataA, <2 x bfloat> %dataB)
-declare spir_func bfloat @_Z3dotDv2_u6__bf16Dv2_S_(<2 x bfloat>, <2 x bfloat>)
+declare spir_func bfloat @_Z3dotDv2_DF16bDv2_S_(<2 x bfloat>, <2 x bfloat>)
define spir_kernel void @test() {
entry:
@@ -30,7 +30,7 @@
%addrB = alloca <2 x bfloat>
%dataA = load <2 x bfloat>, ptr %addrA
%dataB = load <2 x bfloat>, ptr %addrB
- %call = call spir_func bfloat @_Z3dotDv2_u6__bf16Dv2_S_(<2 x bfloat> %dataA,
<2 x bfloat> %dataB)
+ %call = call spir_func bfloat @_Z3dotDv2_DF16bDv2_S_(<2 x bfloat> %dataA, <2
x bfloat> %dataB)
ret void
}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
---
old/SPIRV-LLVM-Translator-21.1.0/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
2025-08-01 09:28:13.000000000 +0200
+++
new/SPIRV-LLVM-Translator-21.1.1/test/extensions/KHR/SPV_KHR_bfloat16/cooperative_matrix_bfloat16.ll
2025-09-29 12:53:11.000000000 +0200
@@ -21,14 +21,14 @@
; CHECK-SPIRV-DAG: Constant [[#BFloatTy]] [[#]] 16256
; CHECK-SPIRV: CompositeConstruct [[#MatTy]]
-; CHECK-LLVM: call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3,
12, 12, 2) @_Z26__spirv_CompositeConstructu6__bf16(bfloat 0xR3F80)
+; CHECK-LLVM: call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3,
12, 12, 2) @_Z26__spirv_CompositeConstructDF16b(bfloat 0xR3F80)
target datalayout =
"e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
target triple = "spir64-unknown-unknown"
-declare spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12, 12, 2)
@_Z26__spirv_CompositeConstructu6__bf16(bfloat)
+declare spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12, 12, 2)
@_Z26__spirv_CompositeConstructDF16b(bfloat)
define spir_kernel void @test() {
- %mat = call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12,
12, 2) @_Z26__spirv_CompositeConstructu6__bf16(bfloat 1.0)
+ %mat = call spir_func target("spirv.CooperativeMatrixKHR", bfloat, 3, 12,
12, 2) @_Z26__spirv_CompositeConstructDF16b(bfloat 1.0)
ret void
}
