Script 'mail_helper' called by obssrc Hello community, here is the log from the commit of package asl for openSUSE:Factory checked in at 2026-10-12 22:06:26 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Comparing /work/SRC/openSUSE:Factory/asl (Old) and /work/SRC/openSUSE:Factory/.asl.new.3698736 (New) ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "asl" Mon Oct 12 22:06:26 2026 rev:40 rq:1384157 version:1.42_bld314 Changes: -------- --- /work/SRC/openSUSE:Factory/asl/asl.changes 2026-09-30 16:24:56.691084219 +0200 +++ /work/SRC/openSUSE:Factory/.asl.new.3698736/asl.changes 2026-10-12 22:06:48.905303863 +0200 @@ -1,0 +2,8 @@ +Mon Oct 12 06:01:29 UTC 2026 - Martin Hauke <[email protected]> + +- Update to version 142-bld314 + Bugfix + * SC/MP: E register is also allowed as displacement for PC-based + addressing. + +------------------------------------------------------------------- Old: ---- asl-current-142-bld313.tar.bz2 New: ---- asl-current-142-bld314.tar.bz2 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ Other differences: ------------------ ++++++ asl.spec ++++++ --- /var/tmp/diff_new_pack.Pz1xMu/_old 2026-10-12 22:06:49.765339798 +0200 +++ /var/tmp/diff_new_pack.Pz1xMu/_new 2026-10-12 22:06:49.768339923 +0200 @@ -16,7 +16,7 @@ # -%define rev 313 +%define rev 314 Name: asl Version: 1.42_bld%{rev} Release: 0 ++++++ asl-current-142-bld313.tar.bz2 -> asl-current-142-bld314.tar.bz2 ++++++ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/asmpars.c new/asl-current/asmpars.c --- old/asl-current/asmpars.c 2026-09-27 00:16:35.000000000 +0200 +++ new/asl-current/asmpars.c 2026-10-11 17:51:23.000000000 +0200 @@ -1085,6 +1085,10 @@ /* Necessary leading 0 for Intel-style hex consts does not count: */ if ((p_int_format->Id == eIntFormatIntHex) && first_digit && (*ctx.pExpr == '0') && as_isalpha(ctx.pExpr[1])) { } + else if ((p_int_format->Id == eIntFormatCOct) && first_digit && (*ctx.pExpr == '0')) + { } + else if ((p_int_format->Id == eIntFormatNatHex) && first_digit && (*ctx.pExpr == '0')) + { } else num_digits++; first_digit = False; @@ -1094,13 +1098,13 @@ if (neg_flag) { *p_flags = eSymbolFlag_Negative; - *p_num_bits = -1; + *p_num_bits = INTSYM_NUM_BITS_DEFAULT; *p_value = -acc; } else { *p_flags = eSymbolFlag_None; - *p_num_bits = force_restricted_extension_digits ? (num_digits * as_log2(ctx.Base)) : 0; + *p_num_bits = force_restricted_extension_digits ? (num_digits * as_log2(ctx.Base)) : INTSYM_NUM_BITS_DEFAULT; *p_value = acc; } return True; diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/changelog new/asl-current/changelog --- old/asl-current/changelog 2026-09-27 09:36:54.000000000 +0200 +++ new/asl-current/changelog 2026-10-11 17:51:50.000000000 +0200 @@ -1,3 +1,8 @@ +2026-10-11 [1.42 Bld 314] + +- Bugfix : SC/MP: E register is also allowed as displacement + for PC-based addressing + 2026-09-27 [1.42 Bld 313] - Bugfix : SC/MP: correct check for instructions crossing diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/codec16c.c new/asl-current/codec16c.c --- old/asl-current/codec16c.c 2026-06-01 21:51:06.000000000 +0200 +++ new/asl-current/codec16c.c 2026-10-11 17:51:23.000000000 +0200 @@ -590,8 +590,6 @@ } } - WrStrErrorPos(ErrNum_InvAddrMode, p_arg); - check: return p_vals->mode; } diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/codescmp.c new/asl-current/codescmp.c --- old/asl-current/codescmp.c 2026-09-26 16:50:31.000000000 +0200 +++ new/asl-current/codescmp.c 2026-10-11 17:51:23.000000000 +0200 @@ -239,12 +239,7 @@ switch (DecodeReg(&Left, &BAsmCode[1], NULL, eSymbolSize8Bit, False)) { case eIsReg: - /* 0x80 -> use E register only applies if pointer register is not P0(PC): */ - if (*Arg == REG_PC) - { - WrStrErrorPos(ErrNum_InvAddrMode, &Left); - return False; - } + /* E is the only 8 bit register known to DecodeReg() */ break; case eRegAbort: return False; @@ -254,8 +249,8 @@ BAsmCode[1] = EvalStrIntExpressionWithResult(&Left, SInt8, &result); if (!result.OK) return False; - /* Depending on pointer register, valid range is -128...+127 or -127...+127: */ - if ((*Arg != REG_PC) && (BAsmCode[1] == 0x80) && !mFirstPassUnknownOrQuestionable(result.Flags)) + /* valid range is -127...+127: */ + if ((BAsmCode[1] == 0x80) && !mFirstPassUnknownOrQuestionable(result.Flags)) WrStrErrorPos(ErrNum_MeansE, &Left); } } @@ -275,11 +270,10 @@ if (!ChkSamePage(Target, PCVal, 12, Flags)); - /* Since the pointer register is P0(PC) in this case, a displacement of 0x80 - (-128) does not signify usage of E register, and can be used at - this place: */ + /* Since a displacement of 0x80 (-128) signifies usage of E register, + it cannot be used at this place: */ - else if ((Disp > 0x7f) && (Disp < 0xf80)) WrError(ErrNum_DistTooBig); + else if ((Disp > 0x7f) && (Disp < 0xf81)) WrError(ErrNum_DistTooBig); else { BAsmCode[1] = Disp & 0xff; diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/operator.c new/asl-current/operator.c --- old/asl-current/operator.c 2026-09-26 23:23:02.000000000 +0200 +++ new/asl-current/operator.c 2026-10-11 17:51:23.000000000 +0200 @@ -66,6 +66,35 @@ } \ while (0) +#define PromoteNegativeLInt() \ + do \ + { \ + if ((pLVal->Flags & eSymbolFlag_Negative) \ + && (pErg->Typ == TempInt) \ + && (pErg->Contents.Int.Value < 0)) \ + pErg->Flags |= eSymbolFlag_Negative; \ + } \ + while (0) + +static Byte max_numbits(Byte l_bits, Byte r_bits) +{ + if ((l_bits == INTSYM_NUM_BITS_DEFAULT) || (r_bits == INTSYM_NUM_BITS_DEFAULT)) + return INTSYM_NUM_BITS_DEFAULT; + return max(l_bits, r_bits); +} + +static Byte min_numbits(Byte l_bits, Byte r_bits) +{ + if ((l_bits != INTSYM_NUM_BITS_DEFAULT) && (r_bits != INTSYM_NUM_BITS_DEFAULT)) + return min(l_bits, r_bits); + else if (l_bits != INTSYM_NUM_BITS_DEFAULT) + return l_bits; + else if (r_bits != INTSYM_NUM_BITS_DEFAULT) + return r_bits; + else + return INTSYM_NUM_BITS_DEFAULT; +} + /*!------------------------------------------------------------------------ * \fn reg_cmp(const TempResult *p_val1, const TempResult *p_val2) * \brief compare two register symbols @@ -108,6 +137,8 @@ return 0; } +#define MASK(nbits) ((((LargeWord)1) << (nbits)) - 1) + static Boolean OneComplOp(TempResult *pErg, TempResult *pLVal, TempResult *pRVal) { UNUSED(pLVal); @@ -115,19 +146,59 @@ return False; as_tempres_set_int(pErg, ~(pRVal->Contents.Int.Value)); - if (pRVal->Contents.Int.NumBits != INTSYM_NUM_BITS_DEFAULT) - pErg->Contents.Int.Value &= (((LargeWord)1) << (pErg->Contents.Int.NumBits = pRVal->Contents.Int.NumBits)) - 1; + if (force_restricted_extension_digits && (pRVal->Contents.Int.NumBits != INTSYM_NUM_BITS_DEFAULT)) + { + pErg->Contents.Int.NumBits = pRVal->Contents.Int.NumBits; + pErg->Contents.Int.Value &= MASK(pRVal->Contents.Int.NumBits); + } PromoteRValFlags(); return True; } +static void shift_left_core(TempResult *p_dest, const TempResult *p_src, LargeWord shift) +{ + as_tempres_set_int(p_dest, p_src->Contents.Int.Value << shift); + if (force_restricted_extension_digits && (p_src->Contents.Int.NumBits != INTSYM_NUM_BITS_DEFAULT)) + { + LargeWord new_num_bits = p_src->Contents.Int.NumBits + shift; + if (new_num_bits < (sizeof(LargeWord) * 8)) + p_dest->Contents.Int.NumBits = new_num_bits; + } +} + +static void shift_right_core(TempResult *p_dest, const TempResult *p_src, LargeWord shift) +{ + as_tempres_set_int(p_dest, p_src->Contents.Int.Value >> shift); + if (shift < (int)(sizeof(LargeWord) * 8)) + { + LargeWord Mask = MASK((sizeof(LargeWord) * 8) - shift); + + /* For right shift of negative number, enforce arithmetic shift. Otherwise, + explicitly mask out implicit arithmetic shift from compiler: */ + if ((p_src->Contents.Int.Value < 0) && (p_src->Flags & eSymbolFlag_Negative)) + p_dest->Contents.Int.Value |= ~Mask; + else + p_dest->Contents.Int.Value &= Mask; + } + if (force_restricted_extension_digits && (p_src->Contents.Int.NumBits != INTSYM_NUM_BITS_DEFAULT)) + { + LargeInt new_num_bits = (LargeInt)p_src->Contents.Int.NumBits + shift; + if (new_num_bits > 0) + p_dest->Contents.Int.NumBits = new_num_bits; + } +} + static Boolean ShLeftOp(TempResult *pErg, TempResult *pLVal, TempResult *pRVal) { if (!pLVal || !pRVal) return False; - as_tempres_set_int(pErg, pLVal->Contents.Int.Value << pRVal->Contents.Int.Value); + if (pRVal->Contents.Int.Value < 0) + shift_right_core(pErg, pLVal, -pRVal->Contents.Int.Value); + else + shift_left_core(pErg, pLVal, pRVal->Contents.Int.Value); PromoteLRValFlags(); + PromoteNegativeLInt(); return True; } @@ -136,8 +207,12 @@ if (!pLVal || !pRVal) return False; - as_tempres_set_int(pErg, pLVal->Contents.Int.Value >> pRVal->Contents.Int.Value); + if (pRVal->Contents.Int.Value < 0) + shift_left_core(pErg, pLVal, -pRVal->Contents.Int.Value); + else + shift_right_core(pErg, pLVal, pRVal->Contents.Int.Value); PromoteLRValFlags(); + PromoteNegativeLInt(); return True; } @@ -170,6 +245,8 @@ return False; as_tempres_set_int(pErg, pLVal->Contents.Int.Value & pRVal->Contents.Int.Value); + if (force_restricted_extension_digits) + pErg->Contents.Int.NumBits = min_numbits(pLVal->Contents.Int.NumBits, pRVal->Contents.Int.NumBits); PromoteLRValFlags(); return True; } @@ -180,6 +257,8 @@ return False; as_tempres_set_int(pErg, pLVal->Contents.Int.Value | pRVal->Contents.Int.Value); + if (force_restricted_extension_digits) + pErg->Contents.Int.NumBits = max_numbits(pLVal->Contents.Int.NumBits, pRVal->Contents.Int.NumBits); PromoteLRValFlags(); return True; } @@ -190,6 +269,12 @@ return False; as_tempres_set_int(pErg, pLVal->Contents.Int.Value ^ pRVal->Contents.Int.Value); + if (force_restricted_extension_digits) + { + pErg->Contents.Int.NumBits = max_numbits(pLVal->Contents.Int.NumBits, pRVal->Contents.Int.NumBits); + if (pErg->Contents.Int.NumBits) + pErg->Contents.Int.Value &= MASK(pErg->Contents.Int.NumBits); + } PromoteLRValFlags(); return True; } diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/p2hex.c new/asl-current/p2hex.c --- old/asl-current/p2hex.c 2026-06-29 22:51:13.000000000 +0200 +++ new/asl-current/p2hex.c 2026-10-11 17:51:23.000000000 +0200 @@ -191,7 +191,7 @@ Word *WBuffer = (Word *) Buffer; LongWord ErgStart, byte_erg_start, ErgStop = 0xfffffffful, byte_erg_stop, - target_word_intel_offset = 0, byte_intel_offset = 0, MaxAdr; + byte_intel_offset = 0, MaxAdr; LongInt NextPos; LongWord ValidSegs; Word ErgLen = 0, ChkSum, RecCnt, Gran, intel_segment; @@ -355,13 +355,12 @@ break; case eHexFormatIntel: FormatOccured |= eIntelOccured; - byte_intel_offset = target_word_intel_offset = 0; + byte_intel_offset = 0; break; case eHexFormatIntel16: FormatOccured |= eIntelOccured; byte_intel_offset = record_byte_offset(ErgStart, 0, Gran); byte_intel_offset -= byte_intel_offset & 0x0f; - target_word_intel_offset = record_target_word_length(byte_intel_offset, Gran); intel_segment = LoWord(byte_intel_offset >> 4); ChkSum = 2 + Lo(intel_segment) + Hi(intel_segment) + 2; chkio_fprintf(TargFile, TargName, ":02000002%04X%02X\n", intel_segment, Lo(0x100 - ChkSum)); @@ -372,7 +371,6 @@ FormatOccured |= eIntelOccured; byte_intel_offset = record_byte_offset(ErgStart, 0, Gran); byte_intel_offset -= byte_intel_offset & 0xffff; - target_word_intel_offset = record_target_word_length(byte_intel_offset, Gran); write_intel_bank_record = True; if (MaxIntel < 2) MaxIntel = 2; @@ -625,7 +623,6 @@ if ((ActFormat == eHexFormatIntel32) && write_intel_bank_record) { byte_intel_offset += 0x10000; - target_word_intel_offset = record_target_word_length(byte_intel_offset, Gran); } } Binary files old/asl-current/tests/t_fred/t_fred.ori and new/asl-current/tests/t_fred/t_fred.ori differ Binary files old/asl-current/tests/t_fred/t_fred.p and new/asl-current/tests/t_fred/t_fred.p differ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/tests/t_scmp/t_scmp.asm new/asl-current/tests/t_scmp/t_scmp.asm --- old/asl-current/tests/t_scmp/t_scmp.asm 2026-06-01 21:51:07.000000000 +0200 +++ new/asl-current/tests/t_scmp/t_scmp.asm 2026-10-11 17:51:23.000000000 +0200 @@ -9,88 +9,91 @@ ereg reg e pcnt equ pc - lde - xae - ane - ore - xre - dae - ade - cae - - sio - sr - srl - rr - rrl - - halt - ccl - scl - dint - ien - csa - cas - nop - - ldi 0x12 - ani 0x23 - ori 0x34 - xri 0x45 - dai 0x56 - adi 0x67 - cai 0x78 - dly 0x89 - - xpal pc - xpah p2 ; it is valid to use just - xpah 2 ; the register # instead of Pn - xppc p1 - xppc 1 - - expect 1350 ; E cannot be used as displacement if - ld e(pc) ; pointer register is PC + lde ; 40 + xae ; 01 + ane ; 50 + ore ; 58 + xre ; 60 + dae ; 68 + ade ; 70 + cae ; 78 + + sio ; 19 + sr ; 1C + srl ; 1D + rr ; 1E + rrl ; 1F + + halt ; 00 + ccl ; 02 + scl ; 03 + dint ; 04 + ien ; 05 + csa ; 06 + cas ; 07 + nop ; 08 + + ldi 0x12 ; C4 12 + ani 0x23 ; D4 23 + ori 0x34 ; DC 34 + xri 0x45 ; E4 45 + dai 0x56 ; EC 56 + adi 0x67 ; F4 67 + cai 0x78 ; FC 78 + dly 0x89 ; 8F 89 + + xpal pc ; 30 + xpah p2 ; 36 ; it is valid to use just + xpah 2 ; 36 ; the register # instead of Pn + xppc p1 ; 3D + xppc 1 ; 3D + + ld e(pc) ; C0 80 ; pointer register is PC + st @e(p2) ; CE 80 + st @ereg(2) ; CE 80 + ld -127(pc) ; C0 81 + expect 440 + ld -128(pc) ; C0 80 endexpect - st @e(p2) - st @ereg(2) - ld -127(pc) - ld -128(pc) ; 0x80 as displacement is allowed for PC... - ld -127(p1) + ld -127(p1) ; C1 81 expect 440 - ld -128(p2) ; ...but not on P1...P3 + ld -128(p2) ; C2 80 ; ...but not on P1...P3 endexpect expect 1445 ld @-127(pc) ; no auto-increment with PC endexpect - and 10(p1) - and 10(1) - or @-20(p3) - or @-20(3) - xor vari -vari: dad -30(p2) - dad -30(2) - add @40(p1) - add @40(1) - add @x'28'(p1) - add @x'28(p1) - cad vari - - jmp vari - jp 10(p2) - jp 10(2) - jz vari - jnz vari - - ild vari - dld -5(p2) - dld -5(2) + and 10(p1) ; D1 0A + and 10(1) ; D1 0A + or @-20(p3) ; DF EC + or @-20(3) ; DF EC + xor vari ; E0 FF +vari: dad -30(p2) ; EA E2 + dad -30(2) ; EA E2 + add @40(p1) ; F5 28 + add @40(1) ; F5 28 + add @x'28'(p1) ; F5 28 + add @x'28(p1) ; F5 28 + cad vari ; F8 F3 + + jmp vari ; 90 F0 + jp 10(p2) ; 96 0A + jp 10(2) ; 96 0A + jz vari ; 98 EA + jnz vari ; 9C E8 + + ild vari ; A8 E7 + dld -5(p2) ; BA FB + dld -5(2) ; BA FB ; org 0xfff ; ldi 0x20 org 384 - ld $-127 ; displacement of -128 is allowed if pointer reg is PC + ld $-126 ; C0 81 + expect 1330 + ld $-127 + endexpect expect 1330 ; would result in a displacement ld $-128 ; of -129, which is out of range Binary files old/asl-current/tests/t_scmp/t_scmp.ori and new/asl-current/tests/t_scmp/t_scmp.ori differ diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' '--exclude=.svnignore' old/asl-current/version.h new/asl-current/version.h --- old/asl-current/version.h 2026-09-27 09:36:57.000000000 +0200 +++ new/asl-current/version.h 2026-10-11 17:52:00.000000000 +0200 @@ -14,7 +14,7 @@ #define AS_VERSION_MAJOR 1 #define AS_VERSION_MINOR 42 -#define AS_VERSION_BUILD 313 +#define AS_VERSION_BUILD 314 /* The standard C stringification magic: */
