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here is the log from the commit of package CoreFreq for openSUSE:Factory 
checked in at 2026-10-18 19:25:40
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/CoreFreq (Old)
 and      /work/SRC/openSUSE:Factory/.CoreFreq.new.3698736 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Package is "CoreFreq"

Sun Oct 18 19:25:40 2026 rev:56 rq:1385845 version:2.1.5

Changes:
--------
--- /work/SRC/openSUSE:Factory/CoreFreq/CoreFreq.changes        2026-09-10 
11:51:08.949981307 +0200
+++ /work/SRC/openSUSE:Factory/.CoreFreq.new.3698736/CoreFreq.changes   
2026-10-18 19:25:58.013391140 +0200
@@ -1,0 +2,11 @@
+Sat Oct 17 18:19:17 UTC 2026 - Michael Pujos <[email protected]>
+
+- Update to 2.1.5
+  * [AMD]
+    - [Zen] Fix XFR ratio rounding calculation from HSMP registers
+    - Adding the 400 Series (Gorgon Point)
+    - Adding the Ryzen 5 3501U and Ryzen 3 3100U processors (Picasso)
+    - Adding the Ryzen 5 7525U processor (Van Gogh / Laptop)
+    - Adding the AMD Ryzen 7 H 449 processor (Gorgon Point)
+
+-------------------------------------------------------------------

Old:
----
  CoreFreq-2.1.4.tar.gz

New:
----
  CoreFreq-2.1.5.tar.gz

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

Other differences:
------------------
++++++ CoreFreq.spec ++++++
--- /var/tmp/diff_new_pack.TKhBmz/_old  2026-10-18 19:25:58.755422200 +0200
+++ /var/tmp/diff_new_pack.TKhBmz/_new  2026-10-18 19:25:58.757422284 +0200
@@ -17,7 +17,7 @@
 
 
 Name:           CoreFreq
-Version:        2.1.4
+Version:        2.1.5
 Release:        0
 Summary:        CPU monitoring software for 64-bit processors
 License:        GPL-2.0-or-later

++++++ CoreFreq-2.1.4.tar.gz -> CoreFreq-2.1.5.tar.gz ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/CoreFreq-2.1.4/Makefile new/CoreFreq-2.1.5/Makefile
--- old/CoreFreq-2.1.4/Makefile 2026-08-16 11:37:05.000000000 +0200
+++ new/CoreFreq-2.1.5/Makefile 2026-10-17 14:53:21.000000000 +0200
@@ -4,7 +4,7 @@
 
 COREFREQ_MAJOR = 2
 COREFREQ_MINOR = 1
-COREFREQ_REV = 4
+COREFREQ_REV = 5
 HW = $(shell uname -m)
 CC ?= cc
 WARNING ?= -Wall -Wfatal-errors
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/CoreFreq-2.1.4/x86_64/corefreqk.c 
new/CoreFreq-2.1.5/x86_64/corefreqk.c
--- old/CoreFreq-2.1.4/x86_64/corefreqk.c       2026-08-16 11:37:05.000000000 
+0200
+++ new/CoreFreq-2.1.5/x86_64/corefreqk.c       2026-10-17 14:53:21.000000000 
+0200
@@ -8336,10 +8336,10 @@
        if (XtraCOF.value != 0 && XtraCOF.value != 0xffffffff)
        {
                unsigned int    CPB = XtraCOF.BoostRatio >> 2,
-                               XFR = !!(XtraCOF.BoostRatio & 0b11);
+                               XFR =(XtraCOF.BoostRatio + 3) >> 2;
 
                PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(CPB)] = CPB;
-               PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(XFR)] = CPB + XFR;
+               PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(XFR)] = XFR;
        }
        if (PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(CPB)] == 0)
        {
@@ -9233,10 +9233,10 @@
            if ((rx == HSMP_RESULT_OK) && (arg[0].value > 0))
            {
                unsigned int    CPB = arg[0].value / PRECISION,
-                               XFR = arg[0].value != (CPB * PRECISION);
+                               XFR =(arg[0].value + PRECISION - 1) / PRECISION;
 
                PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(CPB)] = CPB;
-               PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(XFR)] = CPB + XFR;
+               PUBLIC(RO(Core, AT(cpu)))->Boost[BOOST(XFR)] = XFR;
            }
            else if (IS_HSMP_OOO(rx))
            {
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn' 
'--exclude=.svnignore' old/CoreFreq-2.1.4/x86_64/corefreqk.h 
new/CoreFreq-2.1.5/x86_64/corefreqk.h
--- old/CoreFreq-2.1.4/x86_64/corefreqk.h       2026-08-16 11:37:05.000000000 
+0200
+++ new/CoreFreq-2.1.5/x86_64/corefreqk.h       2026-10-17 14:53:21.000000000 
+0200
@@ -2016,6 +2016,7 @@
        [Zen2/Matisse]          8F_71h Stepping 0        7 nm
        [Zen2/Xbox              8F_74h Stepping 0        7 nm
        [Zen2/Van Gogh]         8F_90h Stepping 1        7 nm   Valve Jupiter
+       [Zen2/Van Gogh]         8F_90h Stepping 2        7 nm   Handheld|Laptop
        [Zen2/Van Gogh]         8F_91h Stepping 0        6 nm   Valve Galileo
        [Zen2/Mendocino]        8F_A0h Stepping 0        6 nm   [MDN]   */
 #define _AMD_Zen       {.ExtFamily=0x8, .Family=0xF, .ExtModel=0x0, .Model=0x1}
@@ -3849,7 +3850,8 @@
 };
 enum {
        CN_VANGOGH,
-       CN_VANGOGH_HANDHELD
+       CN_VANGOGH_HANDHELD,
+       CN_VANGOGH_LAPTOP
 };
 enum {
        CN_MENDOCINO
@@ -3992,7 +3994,8 @@
 
 static char *Arch_AMD_Zen2_Jupiter[] = ZLIST(
                [CN_VANGOGH]            =       "Zen2/Van Gogh/Aerith",
-               [CN_VANGOGH_HANDHELD]   =       "Zen2/Van Gogh/Handheld"
+               [CN_VANGOGH_HANDHELD]   =       "Zen2/Van Gogh/Handheld",
+               [CN_VANGOGH_LAPTOP]     =       "Zen2/Van Gogh/Laptop"
 );
 static char *Arch_AMD_Zen2_Galileo[] = ZLIST(
                [CN_VANGOGH]            =       "Zen2/Van Gogh/Sephiroth"
@@ -6111,6 +6114,28 @@
        .UncoreUnlocked = 0,
        .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
        },
+       {
+       .Brand = ZLIST("AMD Ryzen 5 3501U"),
+       .Boost = {+16, 0},
+       .Param.Offset = {105, 0, 0},
+       .CodeNameIdx = CN_PICASSO,
+       .TgtRatioUnlocked = 1,
+       .ClkRatioUnlocked = 0b10,
+       .TurboUnlocked = 0,
+       .UncoreUnlocked = 0,
+       .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+       },
+       {
+       .Brand = ZLIST("AMD Ryzen 3 3100U"),
+       .Boost = {+13, 0},
+       .Param.Offset = {105, 0, 0},
+       .CodeNameIdx = CN_PICASSO,
+       .TgtRatioUnlocked = 1,
+       .ClkRatioUnlocked = 0b10,
+       .TurboUnlocked = 0,
+       .UncoreUnlocked = 0,
+       .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+       },
        /*              Ryzen Embedded R1000 Processor Family           */
        {
        .Brand = ZLIST("AMD Ryzen Embedded R1102G"),
@@ -7180,7 +7205,7 @@
        },
        {
        .Brand = ZLIST("AMD Ryzen 9 3950X"),
-       .Boost = {+11, +1},
+       .Boost = {0, 0},
        .Param.Offset = {0, 0, 0},      /*      TjMax from SMU = 95     */
        .CodeNameIdx = CN_MATISSE,
        .TgtRatioUnlocked = 1,
@@ -7220,6 +7245,18 @@
        .HSMP_Capable = 0,
        .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
        },
+       {
+       .Brand = ZLIST("AMD Ryzen 5 7525U"),
+       .Boost = {+10, 0},
+       .Param.Offset = {100, 0, 0},
+       .CodeNameIdx = CN_VANGOGH_LAPTOP,
+       .TgtRatioUnlocked = 1,
+       .ClkRatioUnlocked = 0b10,
+       .TurboUnlocked = 0,
+       .UncoreUnlocked = 0,
+       .HSMP_Capable = 0,
+       .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+       },
        {0}
 };
 static PROCESSOR_SPECIFIC AMD_Zen2_MDN_Specific[] = {
@@ -9817,7 +9854,7 @@
        .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
        },
        {
-       .Brand = ZLIST( "AMD Ryzen AI 7 H PRO 450",             \
+       .Brand = ZLIST( "AMD Ryzen AI 7 H PRO 450", /* zh-cn */ \
                        "AMD Ryzen AI 7 PRO 450",               \
                        "AMD Ryzen AI 7 H 450", /* zh-cn */     \
                        "AMD Ryzen AI 7 450"                    ),
@@ -9825,6 +9862,32 @@
        .Param.Offset = {100, 0, 0},
        .CodeNameIdx = CN_GORGON_POINT2,
        .TgtRatioUnlocked = 1,
+       .ClkRatioUnlocked = 0b10,
+       .TurboUnlocked = 0,
+       .UncoreUnlocked = 0,
+       .HSMP_Capable = 0,
+       .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+       },
+       {
+       .Brand = ZLIST( "AMD Ryzen 7 H 449",    /* zh-cn */     \
+                       "AMD Ryzen 7 449"                       ),
+       .Boost = {+30, 0},
+       .Param.Offset = {100, 0, 0},
+       .CodeNameIdx = CN_GORGON_POINT2,
+       .TgtRatioUnlocked = 1,
+       .ClkRatioUnlocked = 0b10,
+       .TurboUnlocked = 0,
+       .UncoreUnlocked = 0,
+       .HSMP_Capable = 0,
+       .Latch=LATCH_TGT_RATIO_UNLOCK|LATCH_CLK_RATIO_UNLOCK|LATCH_TURBO_UNLOCK
+       },
+       {
+       .Brand = ZLIST( "AMD Ryzen 5 H 439",    /* zh-cn */     \
+                       "AMD Ryzen 5 439"                       ),
+       .Boost = {+26, 0},
+       .Param.Offset = {100, 0, 0},
+       .CodeNameIdx = CN_GORGON_POINT2,
+       .TgtRatioUnlocked = 1,
        .ClkRatioUnlocked = 0b10,
        .TurboUnlocked = 0,
        .UncoreUnlocked = 0,

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