Script 'mail_helper' called by obssrc
Hello community,
here is the log from the commit of package kicad-templates for openSUSE:Factory
checked in at 2023-04-27 20:00:32
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Comparing /work/SRC/openSUSE:Factory/kicad-templates (Old)
and /work/SRC/openSUSE:Factory/.kicad-templates.new.1533 (New)
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Package is "kicad-templates"
Thu Apr 27 20:00:32 2023 rev:26 rq:1083038 version:7.0.2
Changes:
--------
--- /work/SRC/openSUSE:Factory/kicad-templates/kicad-templates.changes
2023-03-12 16:26:34.121378507 +0100
+++
/work/SRC/openSUSE:Factory/.kicad-templates.new.1533/kicad-templates.changes
2023-04-27 20:00:48.373880286 +0200
@@ -1,0 +2,6 @@
+Tue Apr 25 02:01:48 UTC 2023 - Stefan Brüns <[email protected]>
+
+- update to 7.0.2:
+ See https://www.kicad.org/blog/2023/04/KiCad-7.0.2-Release/ for details.
+
+-------------------------------------------------------------------
Old:
----
kicad-templates-7.0.1.tar.bz2
New:
----
kicad-templates-7.0.2.tar.bz2
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Other differences:
------------------
++++++ kicad-templates.spec ++++++
--- /var/tmp/diff_new_pack.sDFSSo/_old 2023-04-27 20:00:48.893883343 +0200
+++ /var/tmp/diff_new_pack.sDFSSo/_new 2023-04-27 20:00:48.897883366 +0200
@@ -20,7 +20,7 @@
%define compatversion 7.0.0
Name: kicad-templates
-Version: 7.0.1
+Version: 7.0.2
Release: 0
Summary: Project templates for KiCad
# License is CC-BY-SA-4.0 but there is an exception
++++++ kicad-templates-7.0.1.tar.bz2 -> kicad-templates-7.0.2.tar.bz2 ++++++
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_dru
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_dru
---
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_dru
2023-02-11 18:53:22.000000000 +0100
+++
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_dru
1970-01-01 01:00:00.000000000 +0100
@@ -1,46 +0,0 @@
-(version 1)
-#----------------------------------------------------------------------------------------------------
-# AISLER custom DRC rules.
-# Make Hardware less Hard.
-#----------------------------------------------------------------------------------------------------
-# We created these custom rules to warn you if your design hits our
manufacturing bounderies.
-# You can disable the custom rules by commenting them out, though we advise
against it.
-# These rules are valid as of February 2023 please check for updated ones on
our forum.
-# Please also note that these rules do not catch every single manufacturing
limit.
-# If you are not certain please check the documentation on our website.
-#----------------------------------------------------------------------------------------------------
-
-# As our tooling is finite we only support certain trough hole sizes.
-# Please keep the plated trough holes below 5.65mm in diameter.
-# We provide a community post for more details:
-# https://community.aisler.net/t/plated-and-non-plated-holes/50
-
-(rule "Max Drill Hole Size PTH"
- (constraint hole_size (max 5.655mm))
- (condition "A.Pad_Type == 'Through-hole'"))
-
-#----------------------------------------------------------------------------------------------------
-# We dont support micro or buried vias
-
-(rule "Disallow buried via"
- (constraint disallow buried_via))
-
-(rule "Disallow micro via"
- (constraint disallow micro_via))
-
-#----------------------------------------------------------------------------------------------------
-# The Soldermask is pulled back by a bit to account for slight missalignment
during manufacturing.
-# We do this on our own, please keep the soldermask margin set to 0.
-
-(rule "Disallow solder mask margin overrides"
- (constraint assertion "A.Soldermask_Margin_Override == 0mm")
- (condition "A.Type == 'Pad'"))
-
-#----------------------------------------------------------------------------------------------------
-
-#Its is important to keep a safe distance between the Vias.
-#This even applies to vias of the same net.
-
-(rule "Distance between Vias"
- (constraint hole_to_hole (min 0.55mm))
- (condition "A.Type == 'Via' && B.Type == 'Via'"))
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pcb
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pcb
---
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pcb
2023-02-11 18:53:22.000000000 +0100
+++
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pcb
1970-01-01 01:00:00.000000000 +0100
@@ -1,93 +0,0 @@
-(kicad_pcb (version 20221018) (generator pcbnew)
-
- (general
- (thickness 1.67)
- )
-
- (paper "A4")
- (layers
- (0 "F.Cu" signal)
- (31 "B.Cu" signal)
- (32 "B.Adhes" user "B.Adhesive")
- (33 "F.Adhes" user "F.Adhesive")
- (34 "B.Paste" user)
- (35 "F.Paste" user)
- (36 "B.SilkS" user "B.Silkscreen")
- (37 "F.SilkS" user "F.Silkscreen")
- (38 "B.Mask" user)
- (39 "F.Mask" user)
- (40 "Dwgs.User" user "User.Drawings")
- (41 "Cmts.User" user "User.Comments")
- (42 "Eco1.User" user "User.Eco1")
- (43 "Eco2.User" user "User.Eco2")
- (44 "Edge.Cuts" user)
- (45 "Margin" user)
- (46 "B.CrtYd" user "B.Courtyard")
- (47 "F.CrtYd" user "F.Courtyard")
- (48 "B.Fab" user)
- (49 "F.Fab" user)
- (50 "User.1" user)
- (51 "User.2" user)
- (52 "User.3" user)
- (53 "User.4" user)
- (54 "User.5" user)
- (55 "User.6" user)
- (56 "User.7" user)
- (57 "User.8" user)
- (58 "User.9" user)
- )
-
- (setup
- (stackup
- (layer "F.SilkS" (type "Top Silk Screen") (color "White") (material
"Direct Printing"))
- (layer "F.Paste" (type "Top Solder Paste"))
- (layer "F.Mask" (type "Top Solder Mask") (color "Green") (thickness
0.025) (material "Liquid Ink") (epsilon_r 3.7) (loss_tangent 0.029))
- (layer "F.Cu" (type "copper") (thickness 0.035))
- (layer "dielectric 1" (type "core") (color "FR4 natural") (thickness
1.55) (material "FR4") (epsilon_r 4.6) (loss_tangent 0.035))
- (layer "B.Cu" (type "copper") (thickness 0.035))
- (layer "B.Mask" (type "Bottom Solder Mask") (color "Green") (thickness
0.025) (material "Liquid Ink") (epsilon_r 3.7) (loss_tangent 0.029))
- (layer "B.Paste" (type "Bottom Solder Paste"))
- (layer "B.SilkS" (type "Bottom Silk Screen") (color "White") (material
"Direct Printing"))
- (copper_finish "ENIG")
- (dielectric_constraints no)
- )
- (pad_to_mask_clearance 0)
- (pcbplotparams
- (layerselection 0x00010fc_ffffffff)
- (plot_on_all_layers_selection 0x0000000_00000000)
- (disableapertmacros false)
- (usegerberextensions false)
- (usegerberattributes true)
- (usegerberadvancedattributes true)
- (creategerberjobfile true)
- (dashed_line_dash_ratio 12.000000)
- (dashed_line_gap_ratio 3.000000)
- (svgprecision 4)
- (plotframeref false)
- (viasonmask true)
- (mode 1)
- (useauxorigin false)
- (hpglpennumber 1)
- (hpglpenspeed 20)
- (hpglpendiameter 15.000000)
- (dxfpolygonmode true)
- (dxfimperialunits true)
- (dxfusepcbnewfont true)
- (psnegative false)
- (psa4output false)
- (plotreference true)
- (plotvalue true)
- (plotinvisibletext false)
- (sketchpadsonfab false)
- (subtractmaskfromsilk false)
- (outputformat 1)
- (mirror false)
- (drillshape 1)
- (scaleselection 1)
- (outputdirectory "")
- )
- )
-
- (net 0 "")
-
-)
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pro
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pro
---
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pro
2023-02-11 18:53:22.000000000 +0100
+++
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_pro
1970-01-01 01:00:00.000000000 +0100
@@ -1,261 +0,0 @@
-{
- "board": {
- "3dviewports": [],
- "design_settings": {
- "defaults": {
- "board_outline_line_width": 0.09999999999999999,
- "copper_line_width": 0.19999999999999998,
- "copper_text_italic": false,
- "copper_text_size_h": 1.5,
- "copper_text_size_v": 1.5,
- "copper_text_thickness": 0.3,
- "copper_text_upright": false,
- "courtyard_line_width": 0.049999999999999996,
- "dimension_precision": 4,
- "dimension_units": 3,
- "dimensions": {
- "arrow_length": 1270000,
- "extension_offset": 500000,
- "keep_text_aligned": true,
- "suppress_zeroes": false,
- "text_position": 0,
- "units_format": 1
- },
- "fab_line_width": 0.09999999999999999,
- "fab_text_italic": false,
- "fab_text_size_h": 1.0,
- "fab_text_size_v": 1.0,
- "fab_text_thickness": 0.15,
- "fab_text_upright": false,
- "other_line_width": 0.15,
- "other_text_italic": false,
- "other_text_size_h": 1.0,
- "other_text_size_v": 1.0,
- "other_text_thickness": 0.15,
- "other_text_upright": false,
- "pads": {
- "drill": 0.762,
- "height": 1.524,
- "width": 1.524
- },
- "silk_line_width": 0.15,
- "silk_text_italic": false,
- "silk_text_size_h": 1.0,
- "silk_text_size_v": 1.0,
- "silk_text_thickness": 0.15,
- "silk_text_upright": false,
- "zones": {
- "min_clearance": 0.508
- }
- },
- "diff_pair_dimensions": [
- {
- "gap": 0.0,
- "via_gap": 0.0,
- "width": 0.0
- }
- ],
- "drc_exclusions": [],
- "meta": {
- "version": 2
- },
- "rule_severities": {
- "annular_width": "error",
- "clearance": "error",
- "connection_width": "warning",
- "copper_edge_clearance": "error",
- "copper_sliver": "warning",
- "courtyards_overlap": "error",
- "diff_pair_gap_out_of_range": "error",
- "diff_pair_uncoupled_length_too_long": "error",
- "drill_out_of_range": "error",
- "duplicate_footprints": "warning",
- "extra_footprint": "warning",
- "footprint": "error",
- "footprint_type_mismatch": "ignore",
- "hole_clearance": "error",
- "hole_near_hole": "error",
- "invalid_outline": "error",
- "isolated_copper": "warning",
- "item_on_disabled_layer": "error",
- "items_not_allowed": "error",
- "length_out_of_range": "error",
- "lib_footprint_issues": "warning",
- "lib_footprint_mismatch": "warning",
- "malformed_courtyard": "error",
- "microvia_drill_out_of_range": "error",
- "missing_courtyard": "ignore",
- "missing_footprint": "warning",
- "net_conflict": "warning",
- "npth_inside_courtyard": "ignore",
- "padstack": "warning",
- "pth_inside_courtyard": "ignore",
- "shorting_items": "error",
- "silk_edge_clearance": "warning",
- "silk_over_copper": "warning",
- "silk_overlap": "warning",
- "skew_out_of_range": "error",
- "solder_mask_bridge": "error",
- "starved_thermal": "error",
- "text_height": "warning",
- "text_thickness": "warning",
- "through_hole_pad_without_hole": "error",
- "too_many_vias": "error",
- "track_dangling": "warning",
- "track_width": "error",
- "tracks_crossing": "error",
- "unconnected_items": "error",
- "unresolved_variable": "error",
- "via_dangling": "warning",
- "zones_intersect": "error"
- },
- "rules": {
- "max_error": 0.005,
- "min_clearance": 0.125,
- "min_connection": 0.125,
- "min_copper_edge_clearance": 0.3,
- "min_hole_clearance": 0.25,
- "min_hole_to_hole": 0.25,
- "min_microvia_diameter": 0.19999999999999998,
- "min_microvia_drill": 0.09999999999999999,
- "min_resolved_spokes": 2,
- "min_silk_clearance": 0.0,
- "min_text_height": 0.7999999999999999,
- "min_text_thickness": 0.15,
- "min_through_hole_diameter": 0.19999999999999998,
- "min_track_width": 0.125,
- "min_via_annular_width": 0.19999999999999998,
- "min_via_diameter": 0.6,
- "solder_mask_clearance": 0.0,
- "solder_mask_min_width": 0.0,
- "solder_mask_to_copper_clearance": 0.0,
- "use_height_for_length_calcs": true
- },
- "teardrop_options": [
- {
- "td_allow_use_two_tracks": true,
- "td_curve_segcount": 5,
- "td_on_pad_in_zone": false,
- "td_onpadsmd": true,
- "td_onroundshapesonly": false,
- "td_ontrackend": false,
- "td_onviapad": true
- }
- ],
- "teardrop_parameters": [
- {
- "td_curve_segcount": 0,
- "td_height_ratio": 1.0,
- "td_length_ratio": 0.5,
- "td_maxheight": 2.0,
- "td_maxlen": 1.0,
- "td_target_name": "td_round_shape",
- "td_width_to_size_filter_ratio": 0.9
- },
- {
- "td_curve_segcount": 0,
- "td_height_ratio": 1.0,
- "td_length_ratio": 0.5,
- "td_maxheight": 2.0,
- "td_maxlen": 1.0,
- "td_target_name": "td_rect_shape",
- "td_width_to_size_filter_ratio": 0.9
- },
- {
- "td_curve_segcount": 0,
- "td_height_ratio": 1.0,
- "td_length_ratio": 0.5,
- "td_maxheight": 2.0,
- "td_maxlen": 1.0,
- "td_target_name": "td_track_end",
- "td_width_to_size_filter_ratio": 0.9
- }
- ],
- "track_widths": [
- 0.0,
- 0.254,
- 0.3,
- 0.4,
- 0.508,
- 1.0
- ],
- "via_dimensions": [
- {
- "diameter": 0.0,
- "drill": 0.0
- },
- {
- "diameter": 0.7,
- "drill": 0.3
- },
- {
- "diameter": 0.8,
- "drill": 0.4
- },
- {
- "diameter": 1.0,
- "drill": 0.6
- }
- ],
- "zones_allow_external_fillets": false
- },
- "layer_presets": [],
- "viewports": []
- },
- "boards": [],
- "cvpcb": {
- "equivalence_files": []
- },
- "libraries": {
- "pinned_footprint_libs": [],
- "pinned_symbol_libs": []
- },
- "meta": {
- "filename": "aisler-2-layer-complex-2-layer.kicad_pro",
- "version": 1
- },
- "net_settings": {
- "classes": [
- {
- "bus_width": 12,
- "clearance": 0.2,
- "diff_pair_gap": 0.25,
- "diff_pair_via_gap": 0.25,
- "diff_pair_width": 0.2,
- "line_style": 0,
- "microvia_diameter": 0.3,
- "microvia_drill": 0.1,
- "name": "Default",
- "pcb_color": "rgba(0, 0, 0, 0.000)",
- "schematic_color": "rgba(0, 0, 0, 0.000)",
- "track_width": 0.25,
- "via_diameter": 0.8,
- "via_drill": 0.4,
- "wire_width": 6
- }
- ],
- "meta": {
- "version": 3
- },
- "net_colors": null,
- "netclass_assignments": null,
- "netclass_patterns": []
- },
- "pcbnew": {
- "last_paths": {
- "gencad": "",
- "idf": "",
- "netlist": "",
- "specctra_dsn": "",
- "step": "",
- "vrml": ""
- },
- "page_layout_descr_file": ""
- },
- "schematic": {
- "legacy_lib_dir": "",
- "legacy_lib_list": []
- },
- "sheets": [],
- "text_variables": {}
-}
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_sch
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_sch
---
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_sch
2023-02-11 18:53:22.000000000 +0100
+++
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/aisler-2-layer-complex.kicad_sch
1970-01-01 01:00:00.000000000 +0100
@@ -1,5 +0,0 @@
-(kicad_sch (version 20230121) (generator eeschema)
- (paper "A4")
- (lib_symbols)
- (symbol_instances)
-)
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/button.png and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/button.png differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/drc.png and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/drc.png differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/icon.png and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/icon.png differ
diff -urN '--exclude=CVS' '--exclude=.cvsignore' '--exclude=.svn'
'--exclude=.svnignore'
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/info.html
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/info.html
--- old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/info.html
2023-02-11 18:53:22.000000000 +0100
+++ new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/info.html
1970-01-01 01:00:00.000000000 +0100
@@ -1,75 +0,0 @@
-<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
-<HTML>
- <HEAD>
- <TITLE> AISLER 2 Layer Complex </TITLE>
- </HEAD>
- <p>
- <img src="logo_medium.png" alt="Aisler Logo">
- <br>
- </p>
-
- <P>
- <h2> This project template sets you up with presets to jumpstart your
endeavors into electronics and PCB design. <br>
- The DRC, trace and via settings are specifically tailored for AISLERs PCB
offerings. <br>
- </h2>
- </P>
-
- <p>
- <h4>
- In the PCB editor you can switch between the preset trace and via sizes
using the corresponding drop-down menus. <br>
- This allows you to choose the optimal via and tracks size for your need.
<br>
- When routing from an existing track Kicad will use its track size instead
of the current one you selected,<br>
- You can disable this by clicking the button in between drop-down menus.
<br>
- </h4>
- </p>
-
- <p>
- <h3>Trace width selection</h3><br>
- <img src="trace-selection.png" alt="Trace Width Selection Menu"><br>
- </p>
-
- <p>
- <h3>Via selection menu</h3><br>
- <img src="via-selection.png" alt="Via selection menu"><br>
- </p>
-
- <p>
-<h4>
- If you want to route a power rail to supply your components its a good
idea to choose a larger trace to keep the voltage drop low <br>
- When routing signal traces choose a smaller trace width, to save space.
<br>
- You can read more about getting started with the basics of PCB Layout <a
href="https://community.aisler.net/";>in the AISLER Community</a><br>
-</h4>
-</p>
-
-<p>
-<h4>
-
- After you finished routing your PCB it is important to run a design rule
check (DRC), <br>
-this way you can catch mistakes you have made before you proceed to order the
PCB. <br>
- You find the DRC under <b>Inspect -> Design Rules Checker</b> . <br>
-
-</h4>
-</p>
-
-<p>
-<h3>Design Rules Checker</h3><br>
- <img src="drc.png" alt="Design Rules Checker menu"><br>
- </p>
-
- <p>
- <h3> Push to AISLER<h3><br>
- <h4>
- Ordering PCBs can be diffcult but the Push to AISLER plugin for KiCad
enables you to upload your design with just a buttonpress. <br>
- Select the Plugin and Content Manager on KiCads main page. <br>
- <img src="pcm.png" alt="Plugin and Content Manager"><br>
- Scroll down to AISLER Push for KiCad, select Install the Apply Changes.
<br>
- </h4>
- <img src="install.png" alt="Installation Process"> <br>
- <h4>
- After restarting KiCad you can head to the PCB editor and will find a
button on the right sight of the layer selection drop-down menu. <br>
- When you click this button your project files will be exported in the
right format and uloaded to AISLER. <br>
- Once the upload is completed you can place your order in less than a
minute.<br>
- If you made changes to your PCB and press the button again, a new revision
is uploaded. <br>
-
- </p> (c)2023 AISLER B.V. <BR>
-</HTML>
\ No newline at end of file
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/install.png and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/install.png
differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/logo_medium.png
and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/logo_medium.png
differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/pcm.png and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/pcm.png differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/trace-selection.png
and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/trace-selection.png
differ
Binary files
old/kicad-templates-7.0.1/Projects/aisler-2-layer-complex/meta/via-selection.png
and
new/kicad-templates-7.0.2/Projects/aisler-2-layer-complex/meta/via-selection.png
differ
