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commit 4a57fc685d0d80abe148bf66d654546cb2cc277a Author: Kerogit <[email protected]> AuthorDate: Tue Mar 31 11:02:03 2026 +0200 arch/avr/src/avrdx/iodefs: fix/add macros related to USART peripheral This patch fixes some macros with constants for USART peripheral configuration (namely parity setting) and adds additional ones (settings for 9bit transmission.) Signed-off-by: Kerogit <[email protected]> --- arch/avr/src/avrdx/iodefs/avr128da28.h | 9 +++++++-- arch/avr/src/avrdx/iodefs/avr128da64.h | 9 +++++++-- arch/avr/src/avrdx/iodefs/avr128db64.h | 9 +++++++-- 3 files changed, 21 insertions(+), 6 deletions(-) diff --git a/arch/avr/src/avrdx/iodefs/avr128da28.h b/arch/avr/src/avrdx/iodefs/avr128da28.h index 1faf271e223..39abfaba7b7 100644 --- a/arch/avr/src/avrdx/iodefs/avr128da28.h +++ b/arch/avr/src/avrdx/iodefs/avr128da28.h @@ -113,14 +113,19 @@ /* USART.CTRLC */ #define USART_PMODE_DISABLED_GC (0) -#define USART_PMODE_EVEN_GC = (USART_PMODE_1_bm) -#define USART_PMODE_ODD_GC = (USART_PMODE_1_bm | USART_PMODE_0_bm) +#define USART_PMODE_EVEN_GC (USART_PMODE_1_bm) +#define USART_PMODE_ODD_GC (USART_PMODE_1_bm | USART_PMODE_0_bm) #define USART_SBMODE_1BIT_GC (0) #define USART_SBMODE_2BIT_GC (USART_SBMODE_bm) #define USART_CHSIZE_7BIT_GC (USART_CHSIZE_1_bm) #define USART_CHSIZE_8BIT_GC (USART_CHSIZE_1_bm | USART_CHSIZE_0_bm) +#define USART_CHSIZE_9BITL_GC (USART_CHSIZE_2_bm | USART_CHSIZE_1_bm) +#define USART_CHSIZE_9BITH_GC ( \ + USART_CHSIZE_2_bm \ + | USART_CHSIZE_1_bm \ + | USART_CHSIZE_0_bm ) /* TWI.MCTRLA */ diff --git a/arch/avr/src/avrdx/iodefs/avr128da64.h b/arch/avr/src/avrdx/iodefs/avr128da64.h index 889b8560a95..e8e207648f2 100644 --- a/arch/avr/src/avrdx/iodefs/avr128da64.h +++ b/arch/avr/src/avrdx/iodefs/avr128da64.h @@ -138,14 +138,19 @@ /* USART.CTRLC */ #define USART_PMODE_DISABLED_GC (0) -#define USART_PMODE_EVEN_GC = (USART_PMODE_1_bm) -#define USART_PMODE_ODD_GC = (USART_PMODE_1_bm | USART_PMODE_0_bm) +#define USART_PMODE_EVEN_GC (USART_PMODE_1_bm) +#define USART_PMODE_ODD_GC (USART_PMODE_1_bm | USART_PMODE_0_bm) #define USART_SBMODE_1BIT_GC (0) #define USART_SBMODE_2BIT_GC (USART_SBMODE_bm) #define USART_CHSIZE_7BIT_GC (USART_CHSIZE_1_bm) #define USART_CHSIZE_8BIT_GC (USART_CHSIZE_1_bm | USART_CHSIZE_0_bm) +#define USART_CHSIZE_9BITL_GC (USART_CHSIZE_2_bm | USART_CHSIZE_1_bm) +#define USART_CHSIZE_9BITH_GC ( \ + USART_CHSIZE_2_bm \ + | USART_CHSIZE_1_bm \ + | USART_CHSIZE_0_bm ) /* TWI.MCTRLA */ diff --git a/arch/avr/src/avrdx/iodefs/avr128db64.h b/arch/avr/src/avrdx/iodefs/avr128db64.h index 6d1b94e3ebc..1701c0d42f9 100644 --- a/arch/avr/src/avrdx/iodefs/avr128db64.h +++ b/arch/avr/src/avrdx/iodefs/avr128db64.h @@ -138,14 +138,19 @@ /* USART.CTRLC */ #define USART_PMODE_DISABLED_GC (0) -#define USART_PMODE_EVEN_GC = (USART_PMODE_1_bm) -#define USART_PMODE_ODD_GC = (USART_PMODE_1_bm | USART_PMODE_0_bm) +#define USART_PMODE_EVEN_GC (USART_PMODE_1_bm) +#define USART_PMODE_ODD_GC (USART_PMODE_1_bm | USART_PMODE_0_bm) #define USART_SBMODE_1BIT_GC (0) #define USART_SBMODE_2BIT_GC (USART_SBMODE_bm) #define USART_CHSIZE_7BIT_GC (USART_CHSIZE_1_bm) #define USART_CHSIZE_8BIT_GC (USART_CHSIZE_1_bm | USART_CHSIZE_0_bm) +#define USART_CHSIZE_9BITL_GC (USART_CHSIZE_2_bm | USART_CHSIZE_1_bm) +#define USART_CHSIZE_9BITH_GC ( \ + USART_CHSIZE_2_bm \ + | USART_CHSIZE_1_bm \ + | USART_CHSIZE_0_bm ) /* TWI.MCTRLA */
