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The following commit(s) were added to refs/heads/master by this push:
new a4707d937cd boards/arm/qemu/qemu-armv7a: align _ebss to TLS stack size
a4707d937cd is described below
commit a4707d937cdcd2ec09cd800f35bd95965f677f29
Author: wangzhi16 <[email protected]>
AuthorDate: Mon Oct 26 17:46:16 2026 +0800
boards/arm/qemu/qemu-armv7a: align _ebss to TLS stack size
When CONFIG_TLS_ALIGNED is enabled, the TLS mechanism aligns SP down
to (1 << CONFIG_TLS_LOG2_MAXSTACK) boundary to locate tls_info_s.
The idle thread stack base starts at _ebss (set in arm_head.S), so
if _ebss is not aligned to this boundary, the TLS alignment can
underflow below the stack base into BSS, causing a KASAN violation
on boot.
Align _ebss to (1 << CONFIG_TLS_LOG2_MAXSTACK) when TLS is configured,
instead of the fixed 4096-byte page alignment.
Assisted-By: mimo-v2.6-pro
Signed-off-by: wangzhi16 <[email protected]>
---
boards/arm/qemu/qemu-armv7a/scripts/dramboot.ld | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/boards/arm/qemu/qemu-armv7a/scripts/dramboot.ld
b/boards/arm/qemu/qemu-armv7a/scripts/dramboot.ld
index b0e9b276042..835b1c5ffc7 100644
--- a/boards/arm/qemu/qemu-armv7a/scripts/dramboot.ld
+++ b/boards/arm/qemu/qemu-armv7a/scripts/dramboot.ld
@@ -113,7 +113,11 @@ SECTIONS
.bss : { /* BSS */
_sbss = .;
*(.bss*)
+#ifdef CONFIG_TLS_LOG2_MAXSTACK
+ . = ALIGN(1 << CONFIG_TLS_LOG2_MAXSTACK);
+#else
. = ALIGN(4096);
+#endif
_ebss = .;
} > RAM
