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commit 583c462479940e794539e5989d535ba0549b4e0e Author: raiden00pl <[email protected]> AuthorDate: Fri Oct 30 13:13:24 2026 +0100 arch/arm/src/common/stm32: Support up and one-pulse modes on TIM6/7. setmode() rejected every mode on the basic timers, so the oneshot wrapper never reset the counter or set OPM and fired at a random time. Basic timers count up only: reject just the down and center modes. Signed-off-by: raiden00pl <[email protected]> Assisted-by: Claude Code --- arch/arm/src/common/stm32/stm32_tim.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/arch/arm/src/common/stm32/stm32_tim.c b/arch/arm/src/common/stm32/stm32_tim.c index fb1af7532b4..5337f4512ea 100644 --- a/arch/arm/src/common/stm32/stm32_tim.c +++ b/arch/arm/src/common/stm32/stm32_tim.c @@ -718,24 +718,18 @@ static int stm32_tim_setmode(struct stm32_tim_dev_s *dev, stm32_tim_mode_t mode) { uint16_t val = GTIM_CR1_CEN | GTIM_CR1_ARPE; + bool basic = false; DEBUGASSERT(dev != NULL); - /* This function is not supported on basic timers. To enable or - * disable it, simply set its clock to valid frequency or zero. - */ + /* Basic timers count up only */ #if STM32_NBTIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE + basic = ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM6_BASE; #endif #if STM32_NBTIM > 1 - || ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE -#endif -#if STM32_NBTIM > 0 - ) - { - return -EINVAL; - } + basic = basic || + ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM7_BASE; #endif /* Decode operational modes */ @@ -747,12 +741,22 @@ static int stm32_tim_setmode(struct stm32_tim_dev_s *dev, break; case STM32_TIM_MODE_DOWN: + if (basic) + { + return -EINVAL; + } + val |= GTIM_CR1_DIR; case STM32_TIM_MODE_UP: break; case STM32_TIM_MODE_UPDOWN: + if (basic) + { + return -EINVAL; + } + /* Our default: * Interrupts are generated on compare, when counting down */
