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commit 8a0b8d7028dbf70c35d080124e002fbb89d57d5d
Author: Saravanan Sekar <[email protected]>
AuthorDate: Thu Nov 5 10:49:32 2026 +0530

    arch/tricore: Use the NuttX CSFR offsets in tricore_csa.c.
    
    Access the FCX registers with the offsets from arch/csfr.h instead of
    the iLLD CPU_* names, one step towards common TriCore code that does not
    need the iLLD.
    
    Signed-off-by: Saravanan Sekar <[email protected]>
---
 arch/tricore/src/common/tricore_csa.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/tricore/src/common/tricore_csa.c 
b/arch/tricore/src/common/tricore_csa.c
index 5bbbd0cff07..4f1a347dd8d 100644
--- a/arch/tricore/src/common/tricore_csa.c
+++ b/arch/tricore/src/common/tricore_csa.c
@@ -51,7 +51,7 @@ uintptr_t *tricore_alloc_csa(uintptr_t pc, uintptr_t sp,
   uintptr_t *plcsa;
   uintptr_t *pucsa;
 
-  plcsa = (uintptr_t *)tricore_csa2addr(tricore_mfcr(CPU_FCX));
+  plcsa = (uintptr_t *)tricore_csa2addr(tricore_mfcr(TRICORE_CPU_FCX));
 
   /* DSYNC instruction should be executed immediately prior to the MTCR */
 
@@ -59,7 +59,7 @@ uintptr_t *tricore_alloc_csa(uintptr_t pc, uintptr_t sp,
 
   pucsa = (uintptr_t *)tricore_csa2addr(plcsa[REG_UPCXI]);
 
-  tricore_mtcr(CPU_FCX, pucsa[REG_UPCXI]);
+  tricore_mtcr(TRICORE_CPU_FCX, pucsa[REG_UPCXI]);
 
   /* ISYNC instruction executed immediately following MTCR */
 
@@ -143,7 +143,7 @@ void tricore_reclaim_csa(uintptr_t pcxi)
 
   /* Look up the current free CSA head. */
 
-  free = tricore_mfcr(CPU_FCX);
+  free = tricore_mfcr(TRICORE_CPU_FCX);
 
   /* Join the current Free onto the Tail of what is being reclaimed. */
 
@@ -151,5 +151,5 @@ void tricore_reclaim_csa(uintptr_t pcxi)
 
   /* Move the head of the reclaimed into the Free. */
 
-  tricore_mtcr(CPU_FCX, head);
+  tricore_mtcr(TRICORE_CPU_FCX, head);
 }

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