TNaAIsi opened a new pull request, #21503: URL: https://github.com/apache/nuttx/pull/21503
Fix the PCLK1 prescaler mask in stm32_stdclockconfig() in: arch/arm/src/stm32h7/stm32h7x3xx_rcc.c arch/arm/src/stm32h7/stm32h7x7xx_rcc.c Both implementations currently clear RCC_D2CFGR_D2PPRE2_MASK before OR-ing in STM32_RCC_D2CFGR_D2PPRE1. This leaves the inherited APB1 prescaler bits intact and clears the APB2 field instead. Use RCC_D2CFGR_D2PPRE1_MASK for the PCLK1 operation. The following PCLK2 operation remains unchanged. The patch contains exactly two one-line replacements. For example, if a bootloader leaves APB1 at HCLK/4 (D2PPRE1 = 0x50) and NuttX requests HCLK/2 (0x40), the old code leaves APB1 at HCLK/4. The fix writes the requested HCLK/2 encoding. The preceding rcc_reset() does not clear D2CFGR, so this state can survive a bootloader handoff. This follows the upstream-first workflow requested in the closed, unmerged downstream PR: https://github.com/PX4/NuttX/pull/444 https://github.com/PX4/NuttX/pull/444#issuecomment-6637947671 No NuttX Apps changes or other PR dependencies are required. Impact Corrects APB1 initialization in targets using either affected standard RCC implementation. No API, ABI, Kconfig, or build-system changes. No user configuration migration is required. Final prescalers are unchanged when starting from the hardware reset state or when the inherited and requested dividers match. Peripherals whose clocks derive from APB1 may otherwise run at an unexpected frequency. STM32H7R/S uses a separate RCC implementation and is unaffected. No user-facing documentation update is required. No intended security-interface change. Testing Build host: Ubuntu 24.04.3 LTS, x86_64. Target compiler: arm-none-eabi-gcc 13.2.1 20231009. NuttX base: 749ea3bb719886989ba0ca5b68deac54cf018439. NuttX Apps: 63e9db801e36b07365884c99ba87ca350ca70b74. Completed: git diff --check: PASS. NuttX full-file style checks for both modified files: PASS. Complete builds and links for nucleo-h743zi:nsh and stm32h747i-disco:nsh: PASS. Both produced ELF, HEX, and BIN outputs without compiler warnings or errors. Host register-model checks using the actual source blocks and register macros: PASS for both patched implementations, with 3,200 combinations per implementation. The original code reproduces the defect. Build size output: Target text data bss nucleo-h743zi:nsh 149942 896 5720 stm32h747i-disco:nsh 149962 896 5608 Host register-model reproduction: Before: inherited /4 + requested /2 -> D2PPRE1=0x50 After: inherited /4 + requested /2 -> D2PPRE1=0x40 Pending hardware verification No hardware was flashed or run during this work. Neither successful builds nor the host register model constitute hardware runtime validation. Verification with a bootloader that leaves a different APB1 divider remains pending. Before marking this PR ready for review, actual before/after register readings, clock-dependent peripheral results, and cold-reset/same-divider control logs will be provided. The AET H743 Basic firmware build reported in PX4/NuttX#444 is historical downstream build evidence, not hardware validation of this upstream change. This PR remains a draft until hardware validation is completed. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
