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commit 17c20441ea95aa10792fda6f984da3390b125703 Author: Saravanan Sekar <[email protected]> AuthorDate: Thu Nov 5 16:43:10 2026 +0530 boards/tricore: Align the TASKING trap vector table to 256 bytes. The core forms a trap vector address as BTV | (class << 5), so the table must be 256-byte aligned. The TASKING linker scripts put it at offset 0x20, which sends class 1, 3, 5 and 7 traps to the slot of the class below. Put it at offset 0x100, as the GCC linker scripts do. Fixes: 72be575b1a18 ("arch/tricore: support tc4evb board.") Signed-off-by: Saravanan Sekar <[email protected]> --- .../tc3xx/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel | 2 +- .../tc4xx/triboard_tc4x9_com/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/boards/tricore/tc3xx/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel b/boards/tricore/tc3xx/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel index b2e77e2502b..53053ee03d5 100644 --- a/boards/tricore/tc3xx/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel +++ b/boards/tricore/tc3xx/a2g-tc397-5v-tft/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel @@ -67,7 +67,7 @@ #define LCF_HEAP_OFFSET (LCF_USTACK_OFFSET - LCF_HEAP_SIZE) #define LCF_STARTPTR_CPU LCF_PFLASH_KERNEL_START -#define LCF_TRAPVEC_START (LCF_STARTPTR_CPU + 0x20) +#define LCF_TRAPVEC_START (LCF_STARTPTR_CPU + 0x100) #define LCF_INTVEC_START LCF_PFLASH_KERNEL_START #define LCF_STARTPTR_NC_CPU0 NC_START(CORE0_PFLASH_KERNEL_START) diff --git a/boards/tricore/tc4xx/triboard_tc4x9_com/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel b/boards/tricore/tc4xx/triboard_tc4x9_com/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel index eb384fad334..61c7f589d37 100644 --- a/boards/tricore/tc4xx/triboard_tc4x9_com/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel +++ b/boards/tricore/tc4xx/triboard_tc4x9_com/scripts/Lcf_Tasking_Tricore_Tc.lsl.kernel @@ -77,7 +77,7 @@ #define LCF_HEAP_OFFSET (LCF_USTACK_OFFSET - LCF_HEAP_SIZE) #define LCF_STARTPTR_CPU LCF_PFLASH_KERNEL_START -#define LCF_TRAPVEC_START (LCF_STARTPTR_CPU + 0x20) +#define LCF_TRAPVEC_START (LCF_STARTPTR_CPU + 0x100) #define LCF_INTVEC_START LCF_PFLASH_KERNEL_START #define LCF_STARTPTR_NC_CPU0 NC_START(CORE0_PFLASH_KERNEL_START)
