casaroli opened a new pull request, #21432: URL: https://github.com/apache/nuttx/pull/21432
## Summary The ARMv7-A boards call up_perf_init() once, on the boot CPU. But the cycle counter (PMCCNTR) and its control registers belong to each CPU, so the counter of the other CPUs does not run. With SMP, perf_gettime() on CPU 1 to N returns a constant: the critmon times and the CPU-time clocks of the threads on those CPUs stay 0. This PR adds arm_perf_secondary_init() (it starts the counter of the calling CPU, the same code as up_perf_init()) and calls it in arm_cpu_boot() of the ARMv7-A chips that start the counter on the boot CPU: qemu, goldfish and rtl8730e. The condition is the same as for the call of up_perf_init() (ARCH_PERF_EVENTS). #21428 does the same for arm64. ## Impact ARMv7-A SMP with ARCH_PERF_EVENTS on qemu, goldfish and rtl8730e: the secondary CPUs now run their cycle counter. imx6 does not call up_perf_init() at all and does not change. No API change, no documentation change. ## Testing perfsmp.c starts one thread for each CPU, pinned with pthread_attr_setaffinity_np(), and reads CLOCK_THREAD_CPUTIME_ID over a busy loop of 500 ms (CLOCK_MONOTONIC). qemu-armv7a:smp (4 CPUs), QEMU TCG, SCHED_CRITMONITOR and ARCH_PERF_EVENTS: | CPU | master | this PR | this PR + #21425 (QEMU rate 1 GHz) | |---|---|---|---| | 0 | -60713 ms (*) | -60715 ms (*) | -3794 ms (*) | | 1 | 0 ms | 8000 ms | 500 ms | | 2 | 0 ms | -60718 ms (*) | -3794 ms (*) | | 3 | 0 ms | 8000 ms | 500 ms | (*) The 32-bit cycle counter wraps every 4.3 s at 1 GHz, and the busy slice of these threads included a wrap. This also happens on master (CPU 0), so this PR does not cause it. The values are 500 ms - 2^32 cycles. PERF_OVERFLOW_CORRECTION does not cover it on SMP, because it keeps one "last" value for all CPUs. On master the threads on CPUs 1 to 3 get no CPU time. With this PR they do, and with #21425 the CPU time is the busy time. Builds with -Werror, SCHED_CRITMONITOR and ARCH_PERF_EVENTS: qemu-armv7a:smp, qemu-armv7a:knsh_smp (kernel, SMP), qemu-armv7a:nsh (no SMP). Not built: goldfish (no board in the tree) and rtl8730e_evb:nsh (its configure fetches the vendor SDK, which failed here); the change in their arm_cpu_boot() is the same three lines as in qemu_cpuboot.c. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
