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commit 66a98d286f9c463a254728c34c52dd8cfb0d19f4 Author: raiden00pl <[email protected]> AuthorDate: Mon Nov 2 17:02:38 2026 +0100 arch/arm/stm32: Move the RNG driver to common. STM32H5 and STM32H7 had their own copies of the RNG driver. Now all families use one common driver: - Rename stm32_rng_m3m4_v1.c to stm32_rng_v1.c and STM32_HAVE_IP_RNG_M3M4_V1 to STM32_HAVE_IP_RNG_V1 (the porting guide names files after the IP version, not the core). - Remove the STM32H5 and STM32H7 copies. - Enable the RNG on STM32N6; STM32N6570-DK registers /dev/random. Assisted-by: Claude:claude-fable-5-1 Signed-off-by: raiden00pl <[email protected]> --- .github/CODEOWNERS | 2 +- Documentation/guides/chip-specific/stm32_ports.rst | 11 +- Documentation/platforms/arm/stm32n6/index.rst | 2 +- arch/arm/src/common/stm32/CMakeLists.txt | 8 +- arch/arm/src/common/stm32/Kconfig.have | 2 +- arch/arm/src/common/stm32/Make.defs | 8 +- arch/arm/src/common/stm32/hardware/stm32_rng.h | 4 +- .../stm32/{stm32_rng_m3m4_v1.c => stm32_rng_v1.c} | 2 +- arch/arm/src/stm32f2/Kconfig | 2 +- arch/arm/src/stm32f4/Kconfig | 2 +- arch/arm/src/stm32g4/Kconfig | 2 +- arch/arm/src/stm32h5/CMakeLists.txt | 4 - arch/arm/src/stm32h5/Kconfig | 1 + arch/arm/src/stm32h5/Make.defs | 4 - arch/arm/src/stm32h5/hardware/stm32_rng.h | 64 ---- arch/arm/src/stm32h5/stm32_rng.c | 330 ------------------- arch/arm/src/stm32h7/CMakeLists.txt | 4 - arch/arm/src/stm32h7/Kconfig | 1 + arch/arm/src/stm32h7/Make.defs | 4 - arch/arm/src/stm32h7/hardware/stm32_rng.h | 65 ---- arch/arm/src/stm32h7/stm32_rng.c | 350 --------------------- arch/arm/src/stm32n6/Kconfig | 2 + arch/arm/src/stm32n6/stm32n6xx_rcc.c | 23 ++ .../stm32n6/stm32n6570-dk/configs/nsh/defconfig | 1 + 24 files changed, 51 insertions(+), 847 deletions(-) diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS index 38c00344de9..f0bfe250474 100644 --- a/.github/CODEOWNERS +++ b/.github/CODEOWNERS @@ -1830,7 +1830,7 @@ arch/arm/src/common/stm32/stm32_qencoder.c [email protected] 59230071+hartmanna arch/arm/src/common/stm32/stm32_qencoder.h [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_rcc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_rng_m0_v1.c [email protected] [email protected] [email protected] [email protected] [email protected] -arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c [email protected] [email protected] [email protected] [email protected] [email protected] +arch/arm/src/common/stm32/stm32_rng_v1.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_rtc.h [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_rtc_m3m4_v1_lowerhalf.c [email protected] [email protected] [email protected] [email protected] [email protected] arch/arm/src/common/stm32/stm32_rtcc_m3m4_f4.c [email protected] [email protected] [email protected] [email protected] [email protected] diff --git a/Documentation/guides/chip-specific/stm32_ports.rst b/Documentation/guides/chip-specific/stm32_ports.rst index 22e54a2d4f2..3454411271a 100644 --- a/Documentation/guides/chip-specific/stm32_ports.rst +++ b/Documentation/guides/chip-specific/stm32_ports.rst @@ -387,7 +387,7 @@ HASH to be done not supported I2C v1 arch/arm/src/common/stm32/stm32_i2c_m3m4_v1.c IWDG v1 arch/arm/src/common/stm32/stm32_iwdg.c RCC to be done arch/arm/src/stm32f2/stm32_rcc.c -RNG v1 arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c RTC RTCC v1 arch/arm/src/common/stm32/stm32_rtc_m3m4_v1_lowerhalf.c SDIO v1 arch/arm/src/common/stm32/stm32_sdio_m3m4_v1.c SPI/I2S v2 arch/arm/src/common/stm32/stm32_spi_m3m4_v2v3v4.c @@ -451,7 +451,7 @@ LPTIM v1 arch/arm/src/common/stm32/stm32_lptim.c LTDC v1 arch/arm/src/common/stm32/stm32_ltdc_m3m4_v1.c QUADSPI to be done not supported RCC to be done arch/arm/src/stm32f4/stm32_rcc.c -RNG v1 arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c RTC RTCC F4 arch/arm/src/common/stm32/stm32_rtcc_m3m4_f4.c SDIO v1 arch/arm/src/common/stm32/stm32_sdio_m3m4_v1.c SPI/I2S v2 arch/arm/src/common/stm32/stm32_spi_m3m4_v2v3v4.c @@ -484,7 +484,7 @@ IWDG v2 arch/arm/src/common/stm32/stm32_iwdg.c LPTIM v1 arch/arm/src/common/stm32/stm32_lptim.c OPAMP v1 arch/arm/src/common/stm32/stm32_opamp_m3m4_v1.c RCC to be done arch/arm/src/stm32g4/stm32_rcc.c -RNG v1 arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c RTC RTCC v1 arch/arm/src/common/stm32/stm32_rtc_m3m4_v1_lowerhalf.c SPI/I2S v3 arch/arm/src/common/stm32/stm32_spi_m3m4_v2v3v4.c TIM v3 arch/arm/src/common/stm32/stm32_tim.c @@ -630,7 +630,7 @@ WWDG v3 arch/arm/src/common/stm32/stm32_wwdg.c LPTIM v2 arch/arm/src/common/stm32/stm32_lptim.c PULSECOUNT n/a arch/arm/src/common/stm32/stm32_pulsecount.c PWM n/a arch/arm/src/stm32h5/stm32_pwm.c -RNG n/a arch/arm/src/stm32h5/stm32_rng.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c USB host n/a arch/arm/src/stm32h5/stm32_usbdrdhost.c ============ ============ ============================================ @@ -659,7 +659,7 @@ MDMA to be done arch/arm/src/stm32h7/stm32_dma.c PWR to be done arch/arm/src/stm32h7/stm32_pwr.c QUADSPI to be done arch/arm/src/stm32h7/stm32_qspi.c RCC to be done arch/arm/src/stm32h7/stm32_rcc.c -RNG to be done arch/arm/src/stm32h7/stm32_rng.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c RTC to be done arch/arm/src/stm32h7/stm32_rtc.c SDMMC to be done arch/arm/src/stm32h7/stm32_sdmmc.c SPI/I2S to be done arch/arm/src/stm32h7/stm32_spi.c @@ -781,6 +781,7 @@ IWDG v3 arch/arm/src/common/stm32/stm32_iwdg.c LPTIM v2 arch/arm/src/common/stm32/stm32_lptim.c PWR n6 arch/arm/src/stm32n6/stm32_pwr.c RCC n6 arch/arm/src/stm32n6/stm32n6xx_rcc.c +RNG v1 arch/arm/src/common/stm32/stm32_rng_v1.c SPI/I2S to be done not supported TIM v3 arch/arm/src/common/stm32/stm32_tim.c USART/LPUART v4 arch/arm/src/stm32n6/stm32_serial.c diff --git a/Documentation/platforms/arm/stm32n6/index.rst b/Documentation/platforms/arm/stm32n6/index.rst index b6cf5807fb4..f73864cc2d8 100644 --- a/Documentation/platforms/arm/stm32n6/index.rst +++ b/Documentation/platforms/arm/stm32n6/index.rst @@ -31,6 +31,7 @@ DMA Yes GPDMA1 and HPDMA1 through the common GPDMA driver. PWR Yes Supply configuration, VOS, I/O supply validity. RCC Yes HSI/HSE, PLL1-4, IC1-20, bus prescalers and kernel clock selection from board.h. +RNG Yes Through the common driver. USART Yes USART1 only. ADC No @@ -44,7 +45,6 @@ LPTIM No LTDC No MPU No NPU No -RNG No RTC No SAI No SDMMC No diff --git a/arch/arm/src/common/stm32/CMakeLists.txt b/arch/arm/src/common/stm32/CMakeLists.txt index 6c7c94a7064..b13b71ae527 100644 --- a/arch/arm/src/common/stm32/CMakeLists.txt +++ b/arch/arm/src/common/stm32/CMakeLists.txt @@ -76,6 +76,10 @@ if(CONFIG_STM32_HAVE_IP_EXTI_M33M55_V1) list(APPEND SRCS stm32_exti_gpio_m33m55_v1.c) endif() +if(CONFIG_STM32_RNG AND CONFIG_STM32_HAVE_IP_RNG_V1) + list(APPEND SRCS stm32_rng_v1.c) +endif() + if(CONFIG_STM32_COMMON_M33) list(APPEND SRCS stm32_allocateheap_m33_v1.c stm32_irq_m33_v1.c stm32_start_m33_v1.c) @@ -324,10 +328,6 @@ if(CONFIG_STM32_COMMON_LEGACY) list(APPEND SRCS stm32_hciuart_m3m4_v1.c) endif() - if(CONFIG_STM32_RNG AND CONFIG_STM32_HAVE_IP_RNG_M3M4_V1) - list(APPEND SRCS stm32_rng_m3m4_v1.c) - endif() - if(CONFIG_STM32_LTDC AND CONFIG_STM32_HAVE_IP_LTDC_M3M4_V1) list(APPEND SRCS stm32_ltdc_m3m4_v1.c) endif() diff --git a/arch/arm/src/common/stm32/Kconfig.have b/arch/arm/src/common/stm32/Kconfig.have index a9df07e8fed..a3c4d960937 100644 --- a/arch/arm/src/common/stm32/Kconfig.have +++ b/arch/arm/src/common/stm32/Kconfig.have @@ -692,7 +692,7 @@ config STM32_HAVE_RNG config STM32_HAVE_IP_RNG_M0_V1 bool -config STM32_HAVE_IP_RNG_M3M4_V1 +config STM32_HAVE_IP_RNG_V1 bool # RTC capabilities diff --git a/arch/arm/src/common/stm32/Make.defs b/arch/arm/src/common/stm32/Make.defs index ce4c4771ab8..fd9758a7840 100644 --- a/arch/arm/src/common/stm32/Make.defs +++ b/arch/arm/src/common/stm32/Make.defs @@ -87,6 +87,10 @@ ifeq ($(CONFIG_STM32_HAVE_IP_EXTI_M33M55_V1),y) CHIP_CSRCS += stm32_exti_gpio_m33m55_v1.c endif +ifeq ($(CONFIG_STM32_RNG)$(CONFIG_STM32_HAVE_IP_RNG_V1),yy) +CHIP_CSRCS += stm32_rng_v1.c +endif + ifeq ($(CONFIG_STM32_COMMON_M33),y) CHIP_CSRCS += stm32_allocateheap_m33_v1.c CHIP_CSRCS += stm32_irq_m33_v1.c @@ -354,10 +358,6 @@ ifeq ($(CONFIG_STM32_HCIUART),y) CHIP_CSRCS += stm32_hciuart_m3m4_v1.c endif -ifeq ($(CONFIG_STM32_RNG)$(CONFIG_STM32_HAVE_IP_RNG_M3M4_V1),yy) -CHIP_CSRCS += stm32_rng_m3m4_v1.c -endif - ifeq ($(CONFIG_STM32_LTDC),y) ifeq ($(CONFIG_STM32_HAVE_IP_LTDC_M3M4_V1),y) CHIP_CSRCS += stm32_ltdc_m3m4_v1.c diff --git a/arch/arm/src/common/stm32/hardware/stm32_rng.h b/arch/arm/src/common/stm32/hardware/stm32_rng.h index 5b81e5116b6..d99dd558737 100644 --- a/arch/arm/src/common/stm32/hardware/stm32_rng.h +++ b/arch/arm/src/common/stm32/hardware/stm32_rng.h @@ -28,13 +28,13 @@ ****************************************************************************/ #if (defined(CONFIG_STM32_HAVE_IP_RNG_M0_V1) + \ - defined(CONFIG_STM32_HAVE_IP_RNG_M3M4_V1)) > 1 + defined(CONFIG_STM32_HAVE_IP_RNG_V1)) > 1 # error Only one STM32 RNG IP version must be selected #endif #if defined(CONFIG_STM32_HAVE_IP_RNG_M0_V1) # include "hardware/stm32_rng_m0.h" -#elif defined(CONFIG_STM32_HAVE_IP_RNG_M3M4_V1) +#elif defined(CONFIG_STM32_HAVE_IP_RNG_V1) # include "hardware/stm32_rng_v1.h" #else # error "Unsupported STM32 RNG" diff --git a/arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c b/arch/arm/src/common/stm32/stm32_rng_v1.c similarity index 99% rename from arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c rename to arch/arm/src/common/stm32/stm32_rng_v1.c index a40caf80bd5..c51373db1fb 100644 --- a/arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c +++ b/arch/arm/src/common/stm32/stm32_rng_v1.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/common/stm32/stm32_rng_m3m4_v1.c + * arch/arm/src/common/stm32/stm32_rng_v1.c * * SPDX-License-Identifier: Apache-2.0 * diff --git a/arch/arm/src/stm32f2/Kconfig b/arch/arm/src/stm32f2/Kconfig index f5a5cf7338e..6de240abd4b 100644 --- a/arch/arm/src/stm32f2/Kconfig +++ b/arch/arm/src/stm32f2/Kconfig @@ -153,7 +153,7 @@ config STM32_STM32F20XX select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS select STM32_HAVE_IP_OTGHS_M3M4_V1 select STM32_HAVE_IP_PWR_M3M4_V1 - select STM32_HAVE_IP_RNG_M3M4_V1 if STM32_HAVE_RNG + select STM32_HAVE_IP_RNG_V1 if STM32_HAVE_RNG select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_V1 select STM32_HAVE_RTC_MAGIC diff --git a/arch/arm/src/stm32f4/Kconfig b/arch/arm/src/stm32f4/Kconfig index 2ca9d7b6d40..a4d8bd9526a 100644 --- a/arch/arm/src/stm32f4/Kconfig +++ b/arch/arm/src/stm32f4/Kconfig @@ -281,7 +281,7 @@ config STM32_STM32F4XXX select STM32_HAVE_IP_OTGHS_M3M4_V1 select STM32_HAVE_IP_OTGFS_M3M4_V1 if STM32_HAVE_OTGFS select STM32_HAVE_IP_PWR_M3M4_V1 - select STM32_HAVE_IP_RNG_M3M4_V1 if STM32_HAVE_RNG + select STM32_HAVE_IP_RNG_V1 if STM32_HAVE_RNG select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_F4 select STM32_HAVE_RTC_MAGIC diff --git a/arch/arm/src/stm32g4/Kconfig b/arch/arm/src/stm32g4/Kconfig index c44a8bd331b..3c173b1d010 100644 --- a/arch/arm/src/stm32g4/Kconfig +++ b/arch/arm/src/stm32g4/Kconfig @@ -122,7 +122,7 @@ config STM32_STM32G4XXX select STM32_HAVE_IP_I2S_M3M4_V1 select STM32_HAVE_IP_OPAMP_M3M4_V1 if STM32_HAVE_OPAMP1 || STM32_HAVE_OPAMP2 || STM32_HAVE_OPAMP3 || STM32_HAVE_OPAMP4 || STM32_HAVE_OPAMP5 || STM32_HAVE_OPAMP6 select STM32_HAVE_IP_PWR_M3M4_V1 - select STM32_HAVE_IP_RNG_M3M4_V1 if STM32_HAVE_RNG + select STM32_HAVE_IP_RNG_V1 if STM32_HAVE_RNG select STM32_HAVE_IP_RTC_M3M4_V1 select STM32_HAVE_IP_RTCC_M3M4_V1 select STM32_HAVE_RTC_MAGIC diff --git a/arch/arm/src/stm32h5/CMakeLists.txt b/arch/arm/src/stm32h5/CMakeLists.txt index 0e422b4db86..64f67b99363 100644 --- a/arch/arm/src/stm32h5/CMakeLists.txt +++ b/arch/arm/src/stm32h5/CMakeLists.txt @@ -52,10 +52,6 @@ if(CONFIG_STM32_FDCAN_CHARDRIVER) list(APPEND SRCS stm32_fdcan.c) endif() -if(CONFIG_STM32_RNG) - list(APPEND SRCS stm32_rng.c) -endif() - if(CONFIG_STM32_ICACHE) list(APPEND SRCS stm32_icache.c) endif() diff --git a/arch/arm/src/stm32h5/Kconfig b/arch/arm/src/stm32h5/Kconfig index 9e6e0b84dec..d32337d3f06 100644 --- a/arch/arm/src/stm32h5/Kconfig +++ b/arch/arm/src/stm32h5/Kconfig @@ -24,6 +24,7 @@ config STM32_H5_PERIPHERALS select STM32_HAVE_LPTIM1 select STM32_HAVE_LPTIM2 select STM32_HAVE_RNG + select STM32_HAVE_IP_RNG_V1 select STM32_HAVE_SPI1 select STM32_HAVE_SPI2 select STM32_HAVE_SPI3 diff --git a/arch/arm/src/stm32h5/Make.defs b/arch/arm/src/stm32h5/Make.defs index a598a5dd01a..277bcf66357 100644 --- a/arch/arm/src/stm32h5/Make.defs +++ b/arch/arm/src/stm32h5/Make.defs @@ -60,10 +60,6 @@ ifeq ($(CONFIG_STM32_FDCAN_CHARDRIVER),y) CHIP_CSRCS += stm32_fdcan.c endif -ifeq ($(CONFIG_STM32_RNG),y) -CHIP_CSRCS += stm32_rng.c -endif - ifeq ($(CONFIG_STM32_ICACHE),y) CHIP_CSRCS += stm32_icache.c endif diff --git a/arch/arm/src/stm32h5/hardware/stm32_rng.h b/arch/arm/src/stm32h5/hardware/stm32_rng.h deleted file mode 100644 index 7b22f12bdb0..00000000000 --- a/arch/arm/src/stm32h5/hardware/stm32_rng.h +++ /dev/null @@ -1,64 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h5/hardware/stm32_rng.h - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_STM32H5_HARDWARE_STM32_RNG_H -#define __ARCH_ARM_SRC_STM32H5_HARDWARE_STM32_RNG_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "chip.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Register Offsets *********************************************************/ - -#define STM32_RNG_CR_OFFSET 0x0000 /* RNG Control Register */ -#define STM32_RNG_SR_OFFSET 0x0004 /* RNG Status Register */ -#define STM32_RNG_DR_OFFSET 0x0008 /* RNG Data Register */ - -/* Register Addresses *******************************************************/ - -#define STM32_RNG_CR (STM32_RNG_BASE+STM32_RNG_CR_OFFSET) -#define STM32_RNG_SR (STM32_RNG_BASE+STM32_RNG_SR_OFFSET) -#define STM32_RNG_DR (STM32_RNG_BASE+STM32_RNG_DR_OFFSET) - -/* Register Bitfield Definitions ********************************************/ - -/* RNG Control Register */ - -#define RNG_CR_RNGEN (1 << 2) /* Bit 2: RNG enable */ -#define RNG_CR_IE (1 << 3) /* Bit 3: Interrupt enable */ - -/* RNG Status Register */ - -#define RNG_SR_DRDY (1 << 0) /* Bit 0: Data ready */ -#define RNG_SR_CECS (1 << 1) /* Bit 1: Clock error current status */ -#define RNG_SR_SECS (1 << 2) /* Bit 2: Seed error current status */ -#define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */ -#define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */ - -#endif /* __ARCH_ARM_SRC_STM32H5_HARDWARE_STM32_RNG_H */ diff --git a/arch/arm/src/stm32h5/stm32_rng.c b/arch/arm/src/stm32h5/stm32_rng.c deleted file mode 100644 index 47783c41b28..00000000000 --- a/arch/arm/src/stm32h5/stm32_rng.c +++ /dev/null @@ -1,330 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h5/stm32_rng.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <stdint.h> -#include <stdbool.h> -#include <stdio.h> -#include <string.h> -#include <nuttx/debug.h> -#include <errno.h> - -#include <nuttx/irq.h> -#include <nuttx/arch.h> -#include <nuttx/mutex.h> -#include <nuttx/fs/fs.h> -#include <nuttx/drivers/drivers.h> - -#include "hardware/stm32_rng.h" -#include "arm_internal.h" - -#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static int stm32_rng_initialize(void); -static int stm32_rnginterrupt(int irq, void *context, void *arg); -static void stm32_rngenable(void); -static void stm32_rngdisable(void); -static ssize_t stm32_rngread(struct file *filep, char *buffer, size_t); - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -struct rng_dev_s -{ - mutex_t rd_devlock; /* Threads can only exclusively access the RNG */ - sem_t rd_readsem; /* To block until the buffer is filled */ - char *rd_buf; - size_t rd_buflen; - uint32_t rd_lastval; - bool rd_first; -}; - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static struct rng_dev_s g_rngdev = -{ - .rd_devlock = NXMUTEX_INITIALIZER, - .rd_readsem = SEM_INITIALIZER(0), -}; - -static const struct file_operations g_rngops = -{ - NULL, /* open */ - NULL, /* close */ - stm32_rngread, /* read */ -}; - -/**************************************************************************** - * Private functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rng_initialize - ****************************************************************************/ - -static int stm32_rng_initialize(void) -{ - _info("Initializing RNG\n"); - - if (irq_attach(STM32_IRQ_RNG, stm32_rnginterrupt, NULL)) - { - /* We could not attach the ISR to the interrupt */ - - _info("Could not attach IRQ.\n"); - - return -EAGAIN; - } - - return OK; -} - -/**************************************************************************** - * Name: stm32_rngenable - ****************************************************************************/ - -static void stm32_rngenable(void) -{ - uint32_t regval; - - g_rngdev.rd_first = true; - - /* Enable generation and interrupts */ - - regval = getreg32(STM32_RNG_CR); - regval |= RNG_CR_RNGEN; - regval |= RNG_CR_IE; - putreg32(regval, STM32_RNG_CR); - - up_enable_irq(STM32_IRQ_RNG); -} - -/**************************************************************************** - * Name: stm32_rngdisable - ****************************************************************************/ - -static void stm32_rngdisable(void) -{ - uint32_t regval; - - up_disable_irq(STM32_IRQ_RNG); - - regval = getreg32(STM32_RNG_CR); - regval &= ~RNG_CR_IE; - regval &= ~RNG_CR_RNGEN; - putreg32(regval, STM32_RNG_CR); -} - -/**************************************************************************** - * Name: stm32_rnginterrupt - ****************************************************************************/ - -static int stm32_rnginterrupt(int irq, void *context, void *arg) -{ - uint32_t rngsr; - uint32_t data; - - rngsr = getreg32(STM32_RNG_SR); - if (rngsr & RNG_SR_CEIS) /* Check for clock error int stat */ - { - /* Clear it, we will try again. */ - - putreg32(rngsr & ~RNG_SR_CEIS, STM32_RNG_SR); - return OK; - } - - if (rngsr & RNG_SR_SEIS) /* Check for seed error in int stat */ - { - uint32_t crval; - - /* Clear seed error, then disable/enable the rng and try again. */ - - putreg32(rngsr & ~RNG_SR_SEIS, STM32_RNG_SR); - crval = getreg32(STM32_RNG_CR); - crval &= ~RNG_CR_RNGEN; - putreg32(crval, STM32_RNG_CR); - crval |= RNG_CR_RNGEN; - putreg32(crval, STM32_RNG_CR); - return OK; - } - - if (!(rngsr & RNG_SR_DRDY)) /* Data ready must be set */ - { - /* This random value is not valid, we will try again. */ - - return OK; - } - - data = getreg32(STM32_RNG_DR); - - /* As required by the FIPS PUB (Federal Information Processing Standard - * Publication) 140-2, the first random number generated after setting the - * RNGEN bit should not be used, but saved for comparison with the next - * generated random number. Each subsequent generated random number has to - * be compared with the previously generated number. The test fails if any - * two compared numbers are equal (continuous random number generator - * test). - */ - - if (g_rngdev.rd_first) - { - g_rngdev.rd_first = false; - g_rngdev.rd_lastval = data; - return OK; - } - - if (g_rngdev.rd_lastval == data) - { - /* Two subsequent same numbers, we will try again. */ - - return OK; - } - - /* If we get here, the random number is valid. */ - - g_rngdev.rd_lastval = data; - - if (g_rngdev.rd_buflen >= 4) - { - g_rngdev.rd_buflen -= 4; - *(uint32_t *)&g_rngdev.rd_buf[g_rngdev.rd_buflen] = data; - } - else - { - while (g_rngdev.rd_buflen > 0) - { - g_rngdev.rd_buf[--g_rngdev.rd_buflen] = (char)data; - data >>= 8; - } - } - - if (g_rngdev.rd_buflen == 0) - { - /* Buffer filled, stop further interrupts. */ - - stm32_rngdisable(); - nxsem_post(&g_rngdev.rd_readsem); - } - - return OK; -} - -/**************************************************************************** - * Name: stm32_rngread - ****************************************************************************/ - -static ssize_t stm32_rngread(struct file *filep, char *buffer, size_t buflen) -{ - int ret; - - ret = nxmutex_lock(&g_rngdev.rd_devlock); - if (ret < 0) - { - return ret; - } - - /* We've got the device semaphore, proceed with reading */ - - /* Reset the operation semaphore with 0 for blocking until the - * buffer is filled from interrupts. - */ - - nxsem_reset(&g_rngdev.rd_readsem, 0); - - g_rngdev.rd_buflen = buflen; - g_rngdev.rd_buf = buffer; - - /* Enable RNG with interrupts */ - - stm32_rngenable(); - - /* Wait until the buffer is filled */ - - ret = nxsem_wait(&g_rngdev.rd_readsem); - - /* Free RNG via the device mutex for next use */ - - nxmutex_unlock(&g_rngdev.rd_devlock); - return ret < 0 ? ret : buflen; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: devrandom_register - * - * Description: - * Initialize the RNG hardware and register the /dev/random driver. - * Must be called BEFORE devurandom_register. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -#ifdef CONFIG_DEV_RANDOM -void devrandom_register(void) -{ - stm32_rng_initialize(); - register_driver("/dev/random", &g_rngops, 0444, NULL); -} -#endif - -/**************************************************************************** - * Name: devurandom_register - * - * Description: - * Register /dev/urandom - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -#ifdef CONFIG_DEV_URANDOM_ARCH -void devurandom_register(void) -{ -#ifndef CONFIG_DEV_RANDOM - stm32_rng_initialize(); -#endif - register_driver("/dev/urandom", &g_rngops, 0444, NULL); -} -#endif - -#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ diff --git a/arch/arm/src/stm32h7/CMakeLists.txt b/arch/arm/src/stm32h7/CMakeLists.txt index d017f53ee7c..3ce97537d23 100644 --- a/arch/arm/src/stm32h7/CMakeLists.txt +++ b/arch/arm/src/stm32h7/CMakeLists.txt @@ -86,10 +86,6 @@ if(CONFIG_STM32_FMC) list(APPEND SRCS stm32_fmc.c) endif() -if(CONFIG_STM32_RNG) - list(APPEND SRCS stm32_rng.c) -endif() - if(CONFIG_STM32_RTC_LSECLOCK) list(APPEND SRCS stm32_lse.c) endif() diff --git a/arch/arm/src/stm32h7/Kconfig b/arch/arm/src/stm32h7/Kconfig index c10de41190a..3e2aeb81ed0 100644 --- a/arch/arm/src/stm32h7/Kconfig +++ b/arch/arm/src/stm32h7/Kconfig @@ -92,6 +92,7 @@ config STM32_H7_PERIPHERALS select STM32_HAVE_ETHERNET select STM32_HAVE_FMC select STM32_HAVE_RNG + select STM32_HAVE_IP_RNG_V1 choice prompt "STM32 H7 Chip Selection" default ARCH_CHIP_STM32H743ZI diff --git a/arch/arm/src/stm32h7/Make.defs b/arch/arm/src/stm32h7/Make.defs index fc03647a89e..d9db2473164 100644 --- a/arch/arm/src/stm32h7/Make.defs +++ b/arch/arm/src/stm32h7/Make.defs @@ -77,10 +77,6 @@ ifeq ($(CONFIG_STM32_FDCAN_SOCKET),y) CHIP_CSRCS += stm32_fdcan_sock.c endif -ifeq ($(CONFIG_STM32_RNG),y) -CHIP_CSRCS += stm32_rng.c -endif - ifeq ($(CONFIG_STM32_BBSRAM),y) CHIP_CSRCS += stm32_bbsram.c endif diff --git a/arch/arm/src/stm32h7/hardware/stm32_rng.h b/arch/arm/src/stm32h7/hardware/stm32_rng.h deleted file mode 100644 index 53bbaa8263f..00000000000 --- a/arch/arm/src/stm32h7/hardware/stm32_rng.h +++ /dev/null @@ -1,65 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h7/hardware/stm32_rng.h - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -#ifndef __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32_RNG_H -#define __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32_RNG_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <nuttx/config.h> -#include "chip.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* Register Offsets *********************************************************/ - -#define STM32_RNG_CR_OFFSET 0x0000 /* RNG Control Register */ -#define STM32_RNG_SR_OFFSET 0x0004 /* RNG Status Register */ -#define STM32_RNG_DR_OFFSET 0x0008 /* RNG Data Register */ - -/* Register Addresses *******************************************************/ - -#define STM32_RNG_CR (STM32_RNG_BASE+STM32_RNG_CR_OFFSET) -#define STM32_RNG_SR (STM32_RNG_BASE+STM32_RNG_SR_OFFSET) -#define STM32_RNG_DR (STM32_RNG_BASE+STM32_RNG_DR_OFFSET) - -/* Register Bitfield Definitions ********************************************/ - -/* RNG Control Register */ - -#define RNG_CR_RNGEN (1 << 2) /* Bit 2: RNG enable */ -#define RNG_CR_IE (1 << 3) /* Bit 3: Interrupt enable */ -#define RNG_CR_CE (1 << 5) /* Bit 5: Clock error detection */ - -/* RNG Status Register */ - -#define RNG_SR_DRDY (1 << 0) /* Bit 0: Data ready */ -#define RNG_SR_CECS (1 << 1) /* Bit 1: Clock error current status */ -#define RNG_SR_SECS (1 << 2) /* Bit 2: Seed error current status */ -#define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */ -#define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */ - -#endif /* __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32_RNG_H */ diff --git a/arch/arm/src/stm32h7/stm32_rng.c b/arch/arm/src/stm32h7/stm32_rng.c deleted file mode 100644 index f8112e3fe15..00000000000 --- a/arch/arm/src/stm32h7/stm32_rng.c +++ /dev/null @@ -1,350 +0,0 @@ -/**************************************************************************** - * arch/arm/src/stm32h7/stm32_rng.c - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed to the Apache Software Foundation (ASF) under one or more - * contributor license agreements. See the NOTICE file distributed with - * this work for additional information regarding copyright ownership. The - * ASF licenses this file to you under the Apache License, Version 2.0 (the - * "License"); you may not use this file except in compliance with the - * License. You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the - * License for the specific language governing permissions and limitations - * under the License. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include <stdint.h> -#include <stdbool.h> -#include <stdio.h> -#include <string.h> -#include <nuttx/debug.h> -#include <errno.h> - -#include <nuttx/irq.h> -#include <nuttx/arch.h> -#include <nuttx/mutex.h> -#include <nuttx/semaphore.h> -#include <nuttx/fs/fs.h> -#include <nuttx/drivers/drivers.h> - -#include "hardware/stm32_rng.h" -#include "arm_internal.h" - -#if defined(CONFIG_STM32_RNG) -#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH) - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -static int stm32_rng_initialize(void); -static int stm32_rng_interrupt(int irq, void *context, void *arg); -static void stm32_rng_enable(void); -static void stm32_rng_disable(void); -static ssize_t stm32_rng_read(struct file *filep, char *buffer, size_t); - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -struct rng_dev_s -{ - mutex_t rd_devlock; /* Threads can only exclusively access the RNG */ - sem_t rd_readsem; /* To block until the buffer is filled */ - char *rd_buf; - size_t rd_buflen; - uint32_t rd_lastval; - int rd_error; /* Error reported by the interrupt handler */ - bool rd_first; -}; - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -static struct rng_dev_s g_rngdev = -{ - .rd_devlock = NXMUTEX_INITIALIZER, - .rd_readsem = SEM_INITIALIZER(0), -}; - -static const struct file_operations g_rngops = -{ - NULL, /* open */ - NULL, /* close */ - stm32_rng_read, /* read */ -}; - -/**************************************************************************** - * Private functions - ****************************************************************************/ - -/**************************************************************************** - * Name: stm32_rng_initialize - ****************************************************************************/ - -static int stm32_rng_initialize(void) -{ - uint32_t regval; - - _info("Initializing RNG\n"); - - if (irq_attach(STM32_IRQ_RNG, stm32_rng_interrupt, NULL)) - { - /* We could not attach the ISR to the interrupt */ - - _info("Could not attach IRQ.\n"); - - return -EAGAIN; - } - - /* Enable interrupts */ - - regval = getreg32(STM32_RNG_CR); - regval |= RNG_CR_IE; - putreg32(regval, STM32_RNG_CR); - - up_enable_irq(STM32_IRQ_RNG); - - return OK; -} - -/**************************************************************************** - * Name: stm32_rng_enable - ****************************************************************************/ - -static void stm32_rng_enable(void) -{ - uint32_t regval; - - g_rngdev.rd_first = true; - - regval = getreg32(STM32_RNG_CR); - regval |= RNG_CR_RNGEN; - putreg32(regval, STM32_RNG_CR); -} - -/**************************************************************************** - * Name: stm32_rng_disable - ****************************************************************************/ - -static void stm32_rng_disable(void) -{ - uint32_t regval; - regval = getreg32(STM32_RNG_CR); - regval &= ~RNG_CR_RNGEN; - putreg32(regval, STM32_RNG_CR); -} - -/**************************************************************************** - * Name: stm32_rng_interrupt - ****************************************************************************/ - -static int stm32_rng_interrupt(int irq, void *context, void *arg) -{ - uint32_t rngsr; - uint32_t data; - - rngsr = getreg32(STM32_RNG_SR); - - if (rngsr & (RNG_SR_SEIS | RNG_SR_CEIS)) - { - /* The error interrupt flags are cleared by writing zero, otherwise - * the interrupt is asserted forever. - */ - - putreg32(rngsr & ~(RNG_SR_SEIS | RNG_SR_CEIS), STM32_RNG_SR); - stm32_rng_disable(); - - if (rngsr & RNG_SR_CEIS) - { - /* The RNG kernel clock is missing or too slow (e.g. HSI48 not - * enabled): abort the read. - */ - - g_rngdev.rd_error = -EIO; - nxsem_post(&g_rngdev.rd_readsem); - } - else - { - /* Seed error: restart the generator (RM0433 RNG error - * management). - */ - - stm32_rng_enable(); - } - - return OK; - } - - if (!(rngsr & RNG_SR_DRDY)) - { - /* Data ready must be set, we will try again. */ - - return OK; - } - - data = getreg32(STM32_RNG_DR); - - /* As required by the FIPS PUB (Federal Information Processing Standard - * Publication) 140-2, the first random number generated after setting the - * RNGEN bit should not be used, but saved for comparison with the next - * generated random number. Each subsequent generated random number has to - * be compared with the previously generated number. The test fails if any - * two compared numbers are equal (continuous random number generator - * test). - */ - - if (g_rngdev.rd_first) - { - g_rngdev.rd_first = false; - g_rngdev.rd_lastval = data; - return OK; - } - - if (g_rngdev.rd_lastval == data) - { - /* Two subsequent same numbers, we will try again. */ - - return OK; - } - - /* If we get here, the random number is valid. */ - - g_rngdev.rd_lastval = data; - - if (g_rngdev.rd_buflen >= 4) - { - g_rngdev.rd_buflen -= 4; - *(uint32_t *)&g_rngdev.rd_buf[g_rngdev.rd_buflen] = data; - } - else - { - while (g_rngdev.rd_buflen > 0) - { - g_rngdev.rd_buf[--g_rngdev.rd_buflen] = (char)data; - data >>= 8; - } - } - - if (g_rngdev.rd_buflen == 0) - { - /* Buffer filled, stop further interrupts. */ - - stm32_rng_disable(); - nxsem_post(&g_rngdev.rd_readsem); - } - - return OK; -} - -/**************************************************************************** - * Name: stm32_rng_read - ****************************************************************************/ - -static ssize_t stm32_rng_read(struct file *filep, char *buffer, - size_t buflen) -{ - int ret; - - ret = nxmutex_lock(&g_rngdev.rd_devlock); - if (ret < 0) - { - return ret; - } - - /* We've got the mutex. */ - - /* Reset the operation semaphore with 0 for blocking until the - * buffer is filled from interrupts. - */ - - nxsem_reset(&g_rngdev.rd_readsem, 0); - - g_rngdev.rd_buflen = buflen; - g_rngdev.rd_buf = buffer; - g_rngdev.rd_error = 0; - - /* Enable RNG with interrupts */ - - stm32_rng_enable(); - - /* Wait until the buffer is filled */ - - ret = nxsem_wait(&g_rngdev.rd_readsem); - if (ret >= 0 && g_rngdev.rd_error < 0) - { - _err("ERROR: RNG clock error, check the RNG kernel clock\n"); - ret = g_rngdev.rd_error; - } - - /* Free RNG for next use */ - - nxmutex_unlock(&g_rngdev.rd_devlock); - return ret < 0 ? ret : buflen; -} - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -/**************************************************************************** - * Name: devrandom_register - * - * Description: - * Initialize the RNG hardware and register the /dev/random driver. - * Must be called BEFORE devurandom_register. - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -#ifdef CONFIG_DEV_RANDOM -void devrandom_register(void) -{ - stm32_rng_initialize(); - register_driver("/dev/random", &g_rngops, 0444, NULL); -} -#endif - -/**************************************************************************** - * Name: devurandom_register - * - * Description: - * Register /dev/urandom - * - * Input Parameters: - * None - * - * Returned Value: - * None - * - ****************************************************************************/ - -#ifdef CONFIG_DEV_URANDOM_ARCH -void devurandom_register(void) -{ -#ifndef CONFIG_DEV_RANDOM - stm32_rng_initialize(); -#endif - register_driver("/dev/urandom", &g_rngops, 0444, NULL); -} -#endif - -#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */ -#endif /* CONFIG_STM32_RNG */ diff --git a/arch/arm/src/stm32n6/Kconfig b/arch/arm/src/stm32n6/Kconfig index 2f1071bdb0b..6ecf44bd06c 100644 --- a/arch/arm/src/stm32n6/Kconfig +++ b/arch/arm/src/stm32n6/Kconfig @@ -16,6 +16,7 @@ config STM32_N6_PERIPHERALS select STM32_HAVE_IP_TIMERS_V3 select STM32_HAVE_IP_DBGMCU_V8 select STM32_HAVE_IP_LPTIM_V2 + select STM32_HAVE_IP_RNG_V1 select STM32_HAVE_IP_WDG_V3 select STM32_HAVE_DMA1 select STM32_HAVE_DMA2 @@ -24,6 +25,7 @@ config STM32_N6_PERIPHERALS select STM32_HAVE_LPTIM3 select STM32_HAVE_LPTIM4 select STM32_HAVE_LPTIM5 + select STM32_HAVE_RNG select STM32_HAVE_TIM1 select STM32_HAVE_TIM2 select STM32_HAVE_TIM3 diff --git a/arch/arm/src/stm32n6/stm32n6xx_rcc.c b/arch/arm/src/stm32n6/stm32n6xx_rcc.c index 3cfe867d2fc..d50c4d350a6 100644 --- a/arch/arm/src/stm32n6/stm32n6xx_rcc.c +++ b/arch/arm/src/stm32n6/stm32n6xx_rcc.c @@ -279,6 +279,28 @@ static inline void rcc_enableahb1(void) } } +/**************************************************************************** + * Name: rcc_enableahb3 + * + * Description: + * Enable selected AHB3 peripherals. + * + ****************************************************************************/ + +static inline void rcc_enableahb3(void) +{ + uint32_t regval = 0; + +#ifdef CONFIG_STM32_RNG + regval |= RCC_AHB3ENR_RNGEN; +#endif + + if (regval != 0) + { + putreg32(regval, STM32_RCC_AHB3ENSR); + } +} + /**************************************************************************** * Name: rcc_enableahb5 * @@ -740,6 +762,7 @@ void stm32_rcc_enableperipherals(void) } rcc_enableahb1(); + rcc_enableahb3(); rcc_enableahb4(); rcc_enableahb5(); rcc_enableapb1(); diff --git a/boards/arm/stm32n6/stm32n6570-dk/configs/nsh/defconfig b/boards/arm/stm32n6/stm32n6570-dk/configs/nsh/defconfig index 08aeb2cbf66..ace85529dc3 100644 --- a/boards/arm/stm32n6/stm32n6570-dk/configs/nsh/defconfig +++ b/boards/arm/stm32n6/stm32n6570-dk/configs/nsh/defconfig @@ -39,6 +39,7 @@ CONFIG_RR_INTERVAL=200 CONFIG_SCHED_WAITPID=y CONFIG_STM32N6_DEBUG=y CONFIG_STM32_DMA1=y +CONFIG_STM32_RNG=y CONFIG_STM32_USART1=y CONFIG_SYSTEM_NSH=y CONFIG_USART1_SERIAL_CONSOLE=y
