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from dbbcf904b0 [FFI][REFATOR] Cleanup entry function to redirect (#18205)
add 60f5568415 [CODEGEN][REFACTOR] tir.call_llvm_intrin to remove nargs
(#18206)
No new revisions were added by this update.
Summary of changes:
include/tvm/tir/builtin.h | 2 +-
include/tvm/tir/stmt.h | 5 ----
python/tvm/tir/tensor_intrin/arm_cpu.py | 18 +--------------
python/tvm/tir/tensor_intrin/hexagon.py | 3 ---
python/tvm/tir/tensor_intrin/rocm.py | 3 ---
python/tvm/tir/tensor_intrin/x86.py | 3 ---
src/target/llvm/codegen_arm.cc | 7 +-----
src/target/llvm/codegen_llvm.cc | 27 ++++------------------
src/target/llvm/intrin_rule_llvm.cc | 1 -
src/target/llvm/intrin_rule_llvm.h | 11 +++++++--
src/target/llvm/llvm_instance.h | 15 ++++++++++++
src/target/llvm/llvm_module.cc | 15 +-----------
src/tir/transforms/vectorize_loop.cc | 12 ++++------
tests/python/codegen/test_target_codegen_llvm.py | 8 +++----
.../test_hexagon/test_async_dma_pipeline.py | 4 ----
.../contrib/test_hexagon/test_meta_schedule.py | 2 +-
.../contrib/test_hexagon/test_parallel_hvx.py | 3 ---
.../test_hexagon/test_parallel_hvx_load_vtcm.py | 4 ----
...est_meta_schedule_postproc_rewrite_tensorize.py | 1 -
.../test_meta_schedule_trace_apply.py | 2 +-
tests/python/tir-base/test_tir_ops.py | 4 ++--
...t_tir_transform_lower_cross_thread_reduction.py | 2 +-
.../tir-transform/test_tir_transform_vectorize.py | 12 ++++------
.../python/tvmscript/test_tvmscript_printer_tir.py | 14 +++++------
tests/python/tvmscript/test_tvmscript_roundtrip.py | 5 ----
25 files changed, 55 insertions(+), 128 deletions(-)
