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The "LucyBookClub" page has been changed by MarvinHumphrey: https://wiki.apache.org/lucy/LucyBookClub?action=diff&rev1=56&rev2=57 Comment: Add June 4, archive May 21. [[mailto:[email protected]|[email protected]]] == Upcoming Meetings == + + === Tuesday June 4, 7:00 pm PDT: === + + Lectures from [[https://www.coursera.org/course/hwswinterface|The Hardware/Software Interface]] + + * Section 7: Memory and Caches + + Review questions: + + 1. How well has memory speed and memory bandwidth kept up with increases in CPU speed? + 1. What is the unit of memory which is transfered between caches? + 1. What are the two types of _locality_? + 1. How should code for a loop which iterates over a multi-dimensional array change depending on whether the array is stored in column-major or row-major order? + 1. Why is it faster to perform matrix multiplication in blocks rather than row by row? + 1. How much faster do hits have to be than misses in order for a 99% hit rate to be twice as fast as a 97% hit rate? + 1. Why is _miss rate_ often used rather than _hit rate_? + 1. What's the typical miss penalty for L1? L2? Main memory? Can there be a miss penalty for data stored a register? + 1. How are caches divided within the Intel Core i7? + 1. What are the drawbacks of a _direct-mapped_ cache? What are the drawbacks of a _fully associative_ cache? + 1. What purpose does the _tag_ in a cache entry serve? + 1. In addition to the tag, a cache read also involves a _set index_ and a _block offset_ -- but those numbers are not stored explicity as part of the cache entry. How are they used? + 1. How is the _valid bit_ used in the context of a write-back cache? + 1. What's are the differences between a "cold miss", a "conflict miss" and a "capacity miss"? Is it possible to have a "conflict miss" in a fully associative cache? + 1. What data was used to generate the "Memory Mountain" graphic on the front cover of the text? + + Bonus questions not answered by lecture: + + 1. What's faster: SRAM or DRAM? Why? + 1. Describe situations in which spacial locality can be exploited -- both for data and for instructions. + 1. According to the professors, the "big idea" of the memory hierarchy is to create "a large pool of storage that costs as much as the cheap storage near the bottom, but that serves data to programs at the rate of the fast storage near the top." What usage pattern might defeat this technique? + 1. Data intensive applications (such as large-scale search engines) may be constrained by memory bus bandwidth despite caching. What are some techniques to address this problem? + + == Community Notes == + + Below are an excerpt of notes from previous meetings and or anything of interest related to the meetings. === Tuesday May 21, 7:00 pm PDT: === @@ -55, +90 @@ 2. In C, `array[2]` and `2[array]` are equivalent. So are `array[-3]` and `-3[array]`. Why? 3. Does `sizeof` include padding bytes at the end of a struct in its calculation? 4. Is a non-executable stack in a JIT environment still helpful? - - == Community Notes == - - Below are an excerpt of notes from previous meetings and or anything of interest related to the meetings. === Tuesday May 14, 7:00 pm PDT: ===
