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new e7af6f2da [MAHOUT-1438][Docs] Update QDP CUDA tensor dtype guidance
for float32 angle and basis (#1439)
e7af6f2da is described below
commit e7af6f2da9d1e4f03a8e64f0d98ecbc7c2ca6413
Author: Vic Wen <[email protected]>
AuthorDate: Mon Jul 13 19:16:27 2026 +0800
[MAHOUT-1438][Docs] Update QDP CUDA tensor dtype guidance for float32 angle
and basis (#1439)
Signed-off-by: viiccwen <[email protected]>
---
docs/qdp/getting-started.md | 2 +-
qdp/qdp-python/README.md | 12 +++++++-----
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/docs/qdp/getting-started.md b/docs/qdp/getting-started.md
index 3579875f6..27be389b3 100644
--- a/docs/qdp/getting-started.md
+++ b/docs/qdp/getting-started.md
@@ -121,7 +121,7 @@ Notes:
## Tips
- Default `precision` is `"float32"`; pass `precision="float64"` for higher
precision: `QdpEngine(device_id=0, precision="float64")`.
-- NumPy inputs must be `float64` dtype. CUDA `torch.Tensor` inputs accept
`float32` or `float64` for amplitude; angle and IQP methods require `float64`
for batched inputs.
+- NumPy inputs must be `float64` dtype. CUDA `torch.Tensor` inputs support
`float32` or `float64` for `amplitude` and `angle` single-sample or batched
inputs; `basis` accepts `int64` or `float32` single-sample or batched index
tensors. `iqp` and `iqp-z` CUDA tensor inputs require `float64`, and `phase`
currently requires host input.
- Backend selection is explicit; valid values are `"cuda"` and `"amd"` (with
`"triton_amd"` accepted as an alias for `"amd"`).
## Troubleshooting
diff --git a/qdp/qdp-python/README.md b/qdp/qdp-python/README.md
index a81f95324..614ff4e75 100644
--- a/qdp/qdp-python/README.md
+++ b/qdp/qdp-python/README.md
@@ -89,12 +89,14 @@ Backend support boundary:
### Pipeline / loader dtype (Rust internals)
`QuantumDataLoader` and `run_throughput_pipeline` build a Rust
`PipelineConfig` with an
-`encoding` plus a `dtype` (float32 vs float64). The prefetch thread can only
keep an
+`encoding` plus a `dtype` (float32 vs float64). The prefetch thread can keep an
end-to-end **float32 host batch** for encodings whose GPU stack implements the
batch **f32**
-path (`encode_batch_f32`). **Today that is amplitude only.** Angle and basis
still fall back
-to float64 for that loop until their batch f32 implementations exist. The
eventual full
-matrix (e.g. angle/basis under `supports_f32` once kernels are wired) is
broader than what
-the pipeline uses today.
+path (`encode_batch_f32`): `amplitude`, `angle`, and `basis`. IQP-family and
phase
+encodings still normalize to float64 in this loop.
+
+For streaming basis files, the loader reads basis indices as float64 even when
float32 is
+requested, because basis values are integer state indices and float32 cannot
represent
+large indices exactly.
## Input Sources
