This email list is read-only. Emails sent to this list will be discarded
----------------------------------
.../0001_Export_shmem_file_setup_for_DRM-GEM.patch | 27 +
...2_i915.Use_more_consistent_names_for_regs.patch | 2739 +++++
..._support_for_MSI_and_interrupt_mitigation.patch | 421 +
...f_batchbuffers_for_determining_wedgedness.patch | 47 +
....remove_settable_use_mi_batchbuffer_start.patch | 59 +
...915.Ignore_X_server_provided_mmio_address.patch | 42 +
..._status_page_at_device_load_when_possible.patch | 138 +
...graphics_execution_manager_to_i915_driver.patch | 5453 ++++++++++
.../0009-squashfs3.3-2.6.27.patch | 6727 ++++++++++++
.../0010_unionfs-2.4_for_2.6.27-rc1.patch |11320 ++++++++++++++++++++
.../0011_workaround_unidef_step.patch | 10 +
.../0012_intelfb_945gme.patch | 153 +
.../linux/linux-moblin-2.6.27-rc1/defconfig-eee901 | 2419 +++++
.../linux-moblin-2.6.27-rc1/defconfig-netbook | 2419 +++++
...1-drm-remove-define-for-non-linux-systems.patch | 48 +
...-remove-settable-use_mi_batchbuffer_start.patch | 60 +
...915-Ignore-X-server-provided-mmio-address.patch | 41 +
...-more-consistent-names-for-regs-and-store.patch | 2746 +++++
...-support-for-MSI-and-interrupt-mitigation.patch | 424 +
...-progress-inside-of-batchbuffers-for-dete.patch | 46 +
...alize-hardware-status-page-at-device-load.patch | 137 +
.../0008-Add-Intel-ACPI-IGD-OpRegion-support.patch | 572 +
.../0009-drm-fix-sysfs-error-path.patch | 23 +
...10-i915-separate-suspend-resume-functions.patch | 1079 ++
.../0011-drm-vblank-rework.patch | 1534 +++
.../0012-Export-shmem_file_setup-for-DRM-GEM.patch | 25 +
.../0013-Export-kmap_atomic_pfn-for-DRM-GEM.patch | 24 +
...dd-GEM-graphics-execution-manager-to-i915.patch | 5483 ++++++++++
.../0015-i915-Add-chip-set-ID-param.patch | 35 +
...-struct_mutex-to-protect-ring-in-GEM-mode.patch | 205 +
...7-i915-Make-use-of-sarea_priv-conditional.patch | 147 +
...nstall-and-uninstall-irq-handler-in-enter.patch | 44 +
...rn-EBADF-on-bad-object-in-flink-and-retur.patch | 32 +
...oops-in-GEM-execbuffers-with-bad-argument.patch | 23 +
...lass-hardware-has-a-newer-965-style-MCH-n.patch | 23 +
...use-ioremap_wc-in-i915-instead-of-ioremap.patch | 58 +
...drm-clean-up-many-sparse-warnings-in-i915.patch | 192 +
...-fastboot-create-a-asynchronous-initlevel.patch | 136 +
...urn-the-USB-hostcontroller-initcalls-into.patch | 62 +
...onvert-a-few-non-critical-ACPI-drivers-to.patch | 54 +
...old-the-BKL-over-the-async-init-call-sequ.patch | 40 +
...ync-the-async-execution-before-late_initc.patch | 95 +
...29-fastboot-make-fastboot-a-config-option.patch | 56 +
...etry-mounting-the-root-fs-if-we-can-t-fin.patch | 67 +
...ake-the-raid-autodetect-code-wait-for-all.patch | 41 +
...remove-wait-for-all-devices-before-mounti.patch | 44 +
...ake-the-RAID-autostart-code-print-a-messa.patch | 32 +
...34-fastboot-fix-typo-in-init-Kconfig-text.patch | 29 +
...astboot-remove-duplicate-unpack_to_rootfs.patch | 161 +
.../0036-warning-fix-init-do_mounts_md-c.patch | 82 +
...amfs.c-unused-function-when-compiling-wit.patch | 37 +
...ix-blackfin-breakage-due-to-vmlinux.lds-c.patch | 38 +
...ript-to-visualize-the-kernel-boot-process.patch | 183 +
...ix-issues-and-improve-output-of-bootgraph.patch | 91 +
.../linux-moblin-2.6.27-rc6/0041-r8169-8101e.patch | 940 ++
.../0042-intelfb-945gme.patch | 153 +
.../linux/linux-moblin-2.6.27-rc6/defconfig-eee901 | 2424 +++++
.../linux-moblin-2.6.27-rc6/defconfig-netbook | 2424 +++++
...1-drm-remove-define-for-non-linux-systems.patch | 48 +
...-remove-settable-use_mi_batchbuffer_start.patch | 60 +
...915-Ignore-X-server-provided-mmio-address.patch | 41 +
...-more-consistent-names-for-regs-and-store.patch | 2746 +++++
...-support-for-MSI-and-interrupt-mitigation.patch | 424 +
...-progress-inside-of-batchbuffers-for-dete.patch | 46 +
...alize-hardware-status-page-at-device-load.patch | 137 +
.../0008-Add-Intel-ACPI-IGD-OpRegion-support.patch | 572 +
.../0009-drm-fix-sysfs-error-path.patch | 23 +
...10-i915-separate-suspend-resume-functions.patch | 1079 ++
.../0011-drm-vblank-rework.patch | 1534 +++
.../0012-Export-shmem_file_setup-for-DRM-GEM.patch | 25 +
.../0013-Export-kmap_atomic_pfn-for-DRM-GEM.patch | 24 +
...dd-GEM-graphics-execution-manager-to-i915.patch | 5483 ++++++++++
.../0015-i915-Add-chip-set-ID-param.patch | 35 +
...-struct_mutex-to-protect-ring-in-GEM-mode.patch | 205 +
...7-i915-Make-use-of-sarea_priv-conditional.patch | 147 +
...nstall-and-uninstall-irq-handler-in-enter.patch | 44 +
...rn-EBADF-on-bad-object-in-flink-and-retur.patch | 32 +
...oops-in-GEM-execbuffers-with-bad-argument.patch | 23 +
...lass-hardware-has-a-newer-965-style-MCH-n.patch | 23 +
...use-ioremap_wc-in-i915-instead-of-ioremap.patch | 58 +
...drm-clean-up-many-sparse-warnings-in-i915.patch | 192 +
...-fastboot-create-a-asynchronous-initlevel.patch | 133 +
...urn-the-USB-hostcontroller-initcalls-into.patch | 59 +
...onvert-a-few-non-critical-ACPI-drivers-to.patch | 51 +
...old-the-BKL-over-the-async-init-call-sequ.patch | 37 +
...ync-the-async-execution-before-late_initc.patch | 92 +
...29-fastboot-make-fastboot-a-config-option.patch | 53 +
...etry-mounting-the-root-fs-if-we-can-t-fin.patch | 64 +
...ake-the-raid-autodetect-code-wait-for-all.patch | 41 +
...remove-wait-for-all-devices-before-mounti.patch | 41 +
...ake-the-RAID-autostart-code-print-a-messa.patch | 32 +
...34-fastboot-fix-typo-in-init-Kconfig-text.patch | 26 +
...astboot-remove-duplicate-unpack_to_rootfs.patch | 161 +
.../0036-warning-fix-init-do_mounts_md-c.patch | 82 +
...amfs.c-unused-function-when-compiling-wit.patch | 37 +
...ix-blackfin-breakage-due-to-vmlinux.lds-c.patch | 38 +
...ript-to-visualize-the-kernel-boot-process.patch | 177 +
...ix-issues-and-improve-output-of-bootgraph.patch | 91 +
.../linux-moblin-2.6.27/0041-r8169-8101e.patch | 940 ++
.../linux-moblin-2.6.27/0042-intelfb-945gme.patch | 154 +
.../linux/linux-moblin-2.6.27/defconfig-netbook | 2406 +++++
meta-moblin/packages/linux/linux-moblin.inc | 18 +
.../packages/linux/linux-moblin_2.6.27-rc1.bb | 21 +
.../packages/linux/linux-moblin_2.6.27-rc6.bb | 54 +
meta-moblin/packages/linux/linux-moblin_2.6.27.bb | 54 +
meta/packages/exmap-console/exmap-console_0.4.1.bb | 2 +-
meta/packages/exmap-console/exmap-console_svn.bb | 2 +-
.../0001_Export_shmem_file_setup_for_DRM-GEM.patch | 27 -
...2_i915.Use_more_consistent_names_for_regs.patch | 2739 -----
..._support_for_MSI_and_interrupt_mitigation.patch | 421 -
...f_batchbuffers_for_determining_wedgedness.patch | 47 -
....remove_settable_use_mi_batchbuffer_start.patch | 59 -
...915.Ignore_X_server_provided_mmio_address.patch | 42 -
..._status_page_at_device_load_when_possible.patch | 138 -
...graphics_execution_manager_to_i915_driver.patch | 5453 ----------
.../0009-squashfs3.3-2.6.27.patch | 6727 ------------
.../0010_unionfs-2.4_for_2.6.27-rc1.patch |11320 --------------------
.../0011_workaround_unidef_step.patch | 10 -
.../0012_intelfb_945gme.patch | 153 -
.../linux/linux-moblin-2.6.27-rc1/defconfig-eee901 | 2419 -----
.../linux-moblin-2.6.27-rc1/defconfig-netbook | 2419 -----
...1-drm-remove-define-for-non-linux-systems.patch | 48 -
...-remove-settable-use_mi_batchbuffer_start.patch | 60 -
...915-Ignore-X-server-provided-mmio-address.patch | 41 -
...-more-consistent-names-for-regs-and-store.patch | 2746 -----
...-support-for-MSI-and-interrupt-mitigation.patch | 424 -
...-progress-inside-of-batchbuffers-for-dete.patch | 46 -
...alize-hardware-status-page-at-device-load.patch | 137 -
.../0008-Add-Intel-ACPI-IGD-OpRegion-support.patch | 572 -
.../0009-drm-fix-sysfs-error-path.patch | 23 -
...10-i915-separate-suspend-resume-functions.patch | 1079 --
.../0011-drm-vblank-rework.patch | 1534 ---
.../0012-Export-shmem_file_setup-for-DRM-GEM.patch | 25 -
.../0013-Export-kmap_atomic_pfn-for-DRM-GEM.patch | 24 -
...dd-GEM-graphics-execution-manager-to-i915.patch | 5483 ----------
.../0015-i915-Add-chip-set-ID-param.patch | 35 -
...-struct_mutex-to-protect-ring-in-GEM-mode.patch | 205 -
...7-i915-Make-use-of-sarea_priv-conditional.patch | 147 -
...nstall-and-uninstall-irq-handler-in-enter.patch | 44 -
...rn-EBADF-on-bad-object-in-flink-and-retur.patch | 32 -
...oops-in-GEM-execbuffers-with-bad-argument.patch | 23 -
...lass-hardware-has-a-newer-965-style-MCH-n.patch | 23 -
...use-ioremap_wc-in-i915-instead-of-ioremap.patch | 58 -
...drm-clean-up-many-sparse-warnings-in-i915.patch | 192 -
...-fastboot-create-a-asynchronous-initlevel.patch | 136 -
...urn-the-USB-hostcontroller-initcalls-into.patch | 62 -
...onvert-a-few-non-critical-ACPI-drivers-to.patch | 54 -
...old-the-BKL-over-the-async-init-call-sequ.patch | 40 -
...ync-the-async-execution-before-late_initc.patch | 95 -
...29-fastboot-make-fastboot-a-config-option.patch | 56 -
...etry-mounting-the-root-fs-if-we-can-t-fin.patch | 67 -
...ake-the-raid-autodetect-code-wait-for-all.patch | 41 -
...remove-wait-for-all-devices-before-mounti.patch | 44 -
...ake-the-RAID-autostart-code-print-a-messa.patch | 32 -
...34-fastboot-fix-typo-in-init-Kconfig-text.patch | 29 -
...astboot-remove-duplicate-unpack_to_rootfs.patch | 161 -
.../0036-warning-fix-init-do_mounts_md-c.patch | 82 -
...amfs.c-unused-function-when-compiling-wit.patch | 37 -
...ix-blackfin-breakage-due-to-vmlinux.lds-c.patch | 38 -
...ript-to-visualize-the-kernel-boot-process.patch | 183 -
...ix-issues-and-improve-output-of-bootgraph.patch | 91 -
.../linux-moblin-2.6.27-rc6/0041-r8169-8101e.patch | 940 --
.../0042-intelfb-945gme.patch | 153 -
.../linux/linux-moblin-2.6.27-rc6/defconfig-eee901 | 2424 -----
.../linux-moblin-2.6.27-rc6/defconfig-netbook | 2424 -----
meta/packages/linux/linux-moblin.inc | 18 -
meta/packages/linux/linux-moblin_2.6.27-rc1.bb | 21 -
meta/packages/linux/linux-moblin_2.6.27-rc6.bb | 54 -
meta/packages/rt2860/rt2860_1.7.0.0.bb | 2 +-
169 files changed, 70030 insertions(+), 52260 deletions(-)
New commits:
commit e169b23e66575856c5712b8f2162e305d8560d6b
Author: Samuel Ortiz <[EMAIL PROTECTED]>
Date: Tue Oct 21 16:25:42 2008 +0200
linux-moblin: Add 2.6.27 moblin kernel
This will be the default moblin kernel.
We also moved the 2.6.27-rc* kernels to meta-moblin.
Diff in this email is a maximum of 400 lines.
diff --git
a/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0001_Export_shmem_file_setup_for_DRM-GEM.patch
b/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0001_Export_shmem_file_setup_for_DRM-GEM.patch
new file mode 100644
index 0000000..9589838
--- /dev/null
+++
b/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0001_Export_shmem_file_setup_for_DRM-GEM.patch
@@ -0,0 +1,27 @@
+From: Keith Packard <[EMAIL PROTECTED]>
+Date: Fri, 20 Jun 2008 07:08:06 +0000 (-0700)
+Subject: Export shmem_file_setup for DRM-GEM
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url:
http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=350ea3ece12744ae154bbc2ea13da6ba84ca5515
+
+Export shmem_file_setup for DRM-GEM
+
+GEM needs to create shmem files to back buffer objects. Though currently
+creation of files for objects could have been driven from userland, the
+modesetting work will require allocation of buffer objects before userland
+is running, for boot-time message display.
+
+Signed-off-by: Eric Anholt <[EMAIL PROTECTED]>
+---
+
+--- a/mm/shmem.c
++++ b/mm/shmem.c
+@@ -2582,6 +2582,7 @@ put_memory:
+ shmem_unacct_size(flags, size);
+ return ERR_PTR(error);
+ }
++EXPORT_SYMBOL(shmem_file_setup);
+
+ /**
+ * shmem_zero_setup - setup a shared anonymous mapping
+
diff --git
a/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0002_i915.Use_more_consistent_names_for_regs.patch
b/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0002_i915.Use_more_consistent_names_for_regs.patch
new file mode 100644
index 0000000..9a035b5
--- /dev/null
+++
b/meta-moblin/packages/linux/linux-moblin-2.6.27-rc1/0002_i915.Use_more_consistent_names_for_regs.patch
@@ -0,0 +1,2739 @@
+From: Jesse Barnes <[EMAIL PROTECTED]>
+Date: Tue, 29 Jul 2008 18:54:06 +0000 (-0700)
+Subject: i915: Use more consistent names for regs, and store them in a
separate file.
+X-Git-Tag: v2.6.12-rc2
+X-Git-Url:
http://gitweb.freedesktop.org/?p=users/anholt/anholt/linux-2.6.git;a=commitdiff;h=db1cbbd8c4d42e58e9acb3e7af59ad1bb238260d
+
+i915: Use more consistent names for regs, and store them in a separate file.
+
+Signed-off-by: Eric Anholt <[EMAIL PROTECTED]>
+---
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -40,11 +40,11 @@ int i915_wait_ring(struct drm_device * d
+ {
+ drm_i915_private_t *dev_priv = dev->dev_private;
+ drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
+- u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
++ u32 last_head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+ int i;
+
+ for (i = 0; i < 10000; i++) {
+- ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
++ ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
+ ring->space = ring->head - (ring->tail + 8);
+ if (ring->space < 0)
+ ring->space += ring->Size;
+@@ -67,8 +67,8 @@ void i915_kernel_lost_context(struct drm
+ drm_i915_private_t *dev_priv = dev->dev_private;
+ drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
+
+- ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
+- ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
++ ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
++ ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
+ ring->space = ring->head - (ring->tail + 8);
+ if (ring->space < 0)
+ ring->space += ring->Size;
+@@ -98,13 +98,13 @@ static int i915_dma_cleanup(struct drm_d
+ drm_pci_free(dev, dev_priv->status_page_dmah);
+ dev_priv->status_page_dmah = NULL;
+ /* Need to rewrite hardware status page */
+- I915_WRITE(0x02080, 0x1ffff000);
++ I915_WRITE(HWS_PGA, 0x1ffff000);
+ }
+
+ if (dev_priv->status_gfx_addr) {
+ dev_priv->status_gfx_addr = 0;
+ drm_core_ioremapfree(&dev_priv->hws_map, dev);
+- I915_WRITE(0x2080, 0x1ffff000);
++ I915_WRITE(HWS_PGA, 0x1ffff000);
+ }
+
+ return 0;
+@@ -170,7 +170,7 @@ static int i915_initialize(struct drm_de
+ dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
+
+ memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
+- I915_WRITE(0x02080, dev_priv->dma_status_page);
++ I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
+ }
+ DRM_DEBUG("Enabled hardware status page\n");
+ return 0;
+@@ -201,9 +201,9 @@ static int i915_dma_resume(struct drm_de
+ DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
+
+ if (dev_priv->status_gfx_addr != 0)
+- I915_WRITE(0x02080, dev_priv->status_gfx_addr);
++ I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
+ else
+- I915_WRITE(0x02080, dev_priv->dma_status_page);
++ I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
+ DRM_DEBUG("Enabled hardware status page\n");
+
+ return 0;
+@@ -402,8 +402,8 @@ static void i915_emit_breadcrumb(struct
+ dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1;
+
+ BEGIN_LP_RING(4);
+- OUT_RING(CMD_STORE_DWORD_IDX);
+- OUT_RING(20);
++ OUT_RING(MI_STORE_DWORD_INDEX);
++ OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT);
+ OUT_RING(dev_priv->counter);
+ OUT_RING(0);
+ ADVANCE_LP_RING();
+@@ -505,7 +505,7 @@ static int i915_dispatch_flip(struct drm
+ i915_kernel_lost_context(dev);
+
+ BEGIN_LP_RING(2);
+- OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
++ OUT_RING(MI_FLUSH | MI_READ_FLUSH);
+ OUT_RING(0);
+ ADVANCE_LP_RING();
+
+@@ -530,8 +530,8 @@ static int i915_dispatch_flip(struct drm
+ dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
+
+ BEGIN_LP_RING(4);
+- OUT_RING(CMD_STORE_DWORD_IDX);
+- OUT_RING(20);
++ OUT_RING(MI_STORE_DWORD_INDEX);
++ OUT_RING(5 << MI_STORE_DWORD_INDEX_SHIFT);
+ OUT_RING(dev_priv->counter);
+ OUT_RING(0);
+ ADVANCE_LP_RING();
+@@ -728,8 +728,8 @@ static int i915_set_status_page(struct d
+ dev_priv->hw_status_page = dev_priv->hws_map.handle;
+
+ memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
+- I915_WRITE(0x02080, dev_priv->status_gfx_addr);
+- DRM_DEBUG("load hws 0x2080 with gfx mem 0x%x\n",
++ I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
++ DRM_DEBUG("load hws HWS_PGA with gfx mem 0x%x\n",
+ dev_priv->status_gfx_addr);
+ DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
+ return 0;
+--- a/drivers/gpu/drm/i915/i915_drv.c
++++ b/drivers/gpu/drm/i915/i915_drv.c
+@@ -279,13 +279,13 @@ static int i915_suspend(struct drm_devic
+ dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
+ dev_priv->saveDSPASIZE = I915_READ(DSPASIZE);
+ dev_priv->saveDSPAPOS = I915_READ(DSPAPOS);
+- dev_priv->saveDSPABASE = I915_READ(DSPABASE);
++ dev_priv->saveDSPAADDR = I915_READ(DSPAADDR);
+ if (IS_I965G(dev)) {
+ dev_priv->saveDSPASURF = I915_READ(DSPASURF);
+ dev_priv->saveDSPATILEOFF = I915_READ(DSPATILEOFF);
+ }
+ i915_save_palette(dev, PIPE_A);
+- dev_priv->savePIPEASTAT = I915_READ(I915REG_PIPEASTAT);
++ dev_priv->savePIPEASTAT = I915_READ(PIPEASTAT);
+
+ /* Pipe & plane B info */
+ dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
+@@ -307,13 +307,13 @@ static int i915_suspend(struct drm_devic
+ dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
+ dev_priv->saveDSPBSIZE = I915_READ(DSPBSIZE);
+ dev_priv->saveDSPBPOS = I915_READ(DSPBPOS);
+- dev_priv->saveDSPBBASE = I915_READ(DSPBBASE);
++ dev_priv->saveDSPBADDR = I915_READ(DSPBADDR);
+ if (IS_I965GM(dev) || IS_IGD_GM(dev)) {
+ dev_priv->saveDSPBSURF = I915_READ(DSPBSURF);
+ dev_priv->saveDSPBTILEOFF = I915_READ(DSPBTILEOFF);
+ }
+ i915_save_palette(dev, PIPE_B);
+- dev_priv->savePIPEBSTAT = I915_READ(I915REG_PIPEBSTAT);
++ dev_priv->savePIPEBSTAT = I915_READ(PIPEBSTAT);
+
+ /* CRT state */
+ dev_priv->saveADPA = I915_READ(ADPA);
+@@ -328,9 +328,9 @@ static int i915_suspend(struct drm_devic
+ dev_priv->saveLVDS = I915_READ(LVDS);
+ if (!IS_I830(dev) && !IS_845G(dev))
+ dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
+- dev_priv->saveLVDSPP_ON = I915_READ(LVDSPP_ON);
+- dev_priv->saveLVDSPP_OFF = I915_READ(LVDSPP_OFF);
+- dev_priv->savePP_CYCLE = I915_READ(PP_CYCLE);
++ dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
++ dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
++ dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
+
+ /* FIXME: save TV & SDVO state */
+
+@@ -341,19 +341,19 @@ static int i915_suspend(struct drm_devic
+ dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+
+ /* Interrupt state */
+- dev_priv->saveIIR = I915_READ(I915REG_INT_IDENTITY_R);
+- dev_priv->saveIER = I915_READ(I915REG_INT_ENABLE_R);
+- dev_priv->saveIMR = I915_READ(I915REG_INT_MASK_R);
++ dev_priv->saveIIR = I915_READ(IIR);
++ dev_priv->saveIER = I915_READ(IER);
++ dev_priv->saveIMR = I915_READ(IMR);
+
+ /* VGA state */
+- dev_priv->saveVCLK_DIVISOR_VGA0 = I915_READ(VCLK_DIVISOR_VGA0);
+- dev_priv->saveVCLK_DIVISOR_VGA1 = I915_READ(VCLK_DIVISOR_VGA1);
+- dev_priv->saveVCLK_POST_DIV = I915_READ(VCLK_POST_DIV);
++ dev_priv->saveVGA0 = I915_READ(VGA0);
++ dev_priv->saveVGA1 = I915_READ(VGA1);
++ dev_priv->saveVGA_PD = I915_READ(VGA_PD);
+ dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
+
+ /* Clock gating state */
+ dev_priv->saveD_STATE = I915_READ(D_STATE);
+- dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D);
++ dev_priv->saveCG_2D_DIS = I915_READ(CG_2D_DIS);
+
+ /* Cache mode state */
+ dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
+@@ -363,7 +363,7 @@ static int i915_suspend(struct drm_devic
+
+ /* Scratch space */
+ for (i = 0; i < 16; i++) {
+- dev_priv->saveSWF0[i] = I915_READ(SWF0 + (i << 2));
++ dev_priv->saveSWF0[i] = I915_READ(SWF00 + (i << 2));
+ dev_priv->saveSWF1[i] = I915_READ(SWF10 + (i << 2));
+ }
+ for (i = 0; i < 3; i++)
+@@ -424,7 +424,7 @@ static int i915_resume(struct drm_device
+ I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
+ I915_WRITE(DSPAPOS, dev_priv->saveDSPAPOS);
+ I915_WRITE(PIPEASRC, dev_priv->savePIPEASRC);
+- I915_WRITE(DSPABASE, dev_priv->saveDSPABASE);
++ I915_WRITE(DSPAADDR, dev_priv->saveDSPAADDR);
+ I915_WRITE(DSPASTRIDE, dev_priv->saveDSPASTRIDE);
+ if (IS_I965G(dev)) {
+ I915_WRITE(DSPASURF, dev_priv->saveDSPASURF);
+@@ -436,7 +436,7 @@ static int i915_resume(struct drm_device
+ i915_restore_palette(dev, PIPE_A);
+ /* Enable the plane */
+ I915_WRITE(DSPACNTR, dev_priv->saveDSPACNTR);
+- I915_WRITE(DSPABASE, I915_READ(DSPABASE));
++ I915_WRITE(DSPAADDR, I915_READ(DSPAADDR));
+
+ /* Pipe & plane B info */
+ if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
+@@ -466,7 +466,7 @@ static int i915_resume(struct drm_device
+ I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
+ I915_WRITE(DSPBPOS, dev_priv->saveDSPBPOS);
+ I915_WRITE(PIPEBSRC, dev_priv->savePIPEBSRC);
+- I915_WRITE(DSPBBASE, dev_priv->saveDSPBBASE);
++ I915_WRITE(DSPBADDR, dev_priv->saveDSPBADDR);
+ I915_WRITE(DSPBSTRIDE, dev_priv->saveDSPBSTRIDE);
+ if (IS_I965G(dev)) {
+ I915_WRITE(DSPBSURF, dev_priv->saveDSPBSURF);
+@@ -478,7 +478,7 @@ static int i915_resume(struct drm_device
+ i915_restore_palette(dev, PIPE_B);
+ /* Enable the plane */
+ I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
+- I915_WRITE(DSPBBASE, I915_READ(DSPBBASE));
++ I915_WRITE(DSPBADDR, I915_READ(DSPBADDR));
+
+ /* CRT state */
+ I915_WRITE(ADPA, dev_priv->saveADPA);
+@@ -493,9 +493,9 @@ static int i915_resume(struct drm_device
+
+ I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
+ I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
+- I915_WRITE(LVDSPP_ON, dev_priv->saveLVDSPP_ON);
+- I915_WRITE(LVDSPP_OFF, dev_priv->saveLVDSPP_OFF);
+- I915_WRITE(PP_CYCLE, dev_priv->savePP_CYCLE);
++ I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
++ I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
++ I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
+ I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
+
+ /* FIXME: restore TV & SDVO state */
+@@ -508,14 +508,14 @@ static int i915_resume(struct drm_device
+
+ /* VGA state */
+ I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
+- I915_WRITE(VCLK_DIVISOR_VGA0, dev_priv->saveVCLK_DIVISOR_VGA0);
+- I915_WRITE(VCLK_DIVISOR_VGA1, dev_priv->saveVCLK_DIVISOR_VGA1);
+- I915_WRITE(VCLK_POST_DIV, dev_priv->saveVCLK_POST_DIV);
++ I915_WRITE(VGA0, dev_priv->saveVGA0);
++ I915_WRITE(VGA1, dev_priv->saveVGA1);
++ I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
+ udelay(150);
+
+ /* Clock gating state */
+ I915_WRITE (D_STATE, dev_priv->saveD_STATE);
+- I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
++ I915_WRITE(CG_2D_DIS, dev_priv->saveCG_2D_DIS);
+
+ /* Cache mode state */
+ I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
+@@ -524,7 +524,7 @@ static int i915_resume(struct drm_device
+ I915_WRITE (MI_ARB_STATE, dev_priv->saveMI_ARB_STATE | 0xffff0000);
+
+ for (i = 0; i < 16; i++) {
+- I915_WRITE(SWF0 + (i << 2), dev_priv->saveSWF0[i]);
++ I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]);
+ I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i+7]);
+ }
+ for (i = 0; i < 3; i++)
+--- a/drivers/gpu/drm/i915/i915_drv.h
++++ b/drivers/gpu/drm/i915/i915_drv.h
+@@ -30,6 +30,8 @@
+ #ifndef _I915_DRV_H_
+ #define _I915_DRV_H_
+
++#include "i915_reg.h"
++
+ /* General customization:
+ */
+
+@@ -138,7 +140,7 @@ typedef struct drm_i915_private {
+ u32 saveDSPASTRIDE;
+ u32 saveDSPASIZE;
+ u32 saveDSPAPOS;
+- u32 saveDSPABASE;
++ u32 saveDSPAADDR;
+ u32 saveDSPASURF;
+ u32 saveDSPATILEOFF;
+ u32 savePFIT_PGM_RATIOS;
+@@ -159,24 +161,24 @@ typedef struct drm_i915_private {
+ u32 saveDSPBSTRIDE;
+ u32 saveDSPBSIZE;
+ u32 saveDSPBPOS;
+- u32 saveDSPBBASE;
++ u32 saveDSPBADDR;
+ u32 saveDSPBSURF;
+ u32 saveDSPBTILEOFF;
+- u32 saveVCLK_DIVISOR_VGA0;
+- u32 saveVCLK_DIVISOR_VGA1;
+- u32 saveVCLK_POST_DIV;
++ u32 saveVGA0;
++ u32 saveVGA1;
++ u32 saveVGA_PD;
+ u32 saveVGACNTRL;
+ u32 saveADPA;
+ u32 saveLVDS;
+- u32 saveLVDSPP_ON;
+- u32 saveLVDSPP_OFF;
++ u32 savePP_ON_DELAYS;
++ u32 savePP_OFF_DELAYS;
+ u32 saveDVOA;
+ u32 saveDVOB;
+ u32 saveDVOC;
+ u32 savePP_ON;
+ u32 savePP_OFF;
+ u32 savePP_CONTROL;
+- u32 savePP_CYCLE;
++ u32 savePP_DIVISOR;
+ u32 savePFIT_CONTROL;
+ u32 save_palette_a[256];
+ u32 save_palette_b[256];
+@@ -189,7 +191,7 @@ typedef struct drm_i915_private {
+ u32 saveIMR;
+ u32 saveCACHE_MODE_0;
+ u32 saveD_STATE;
+- u32 saveDSPCLK_GATE_D;
++ u32 saveCG_2D_DIS;
+ u32 saveMI_ARB_STATE;
+ u32 saveSWF0[16];
+ u32 saveSWF1[16];
+@@ -283,816 +285,26 @@ extern void i915_mem_release(struct drm_
+ if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
+ dev_priv->ring.tail = outring; \
+ dev_priv->ring.space -= outcount * 4; \
+- I915_WRITE(LP_RING + RING_TAIL, outring); \
++ I915_WRITE(PRB0_TAIL, outring); \
+ } while(0)
+
+-extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
+-
+-/* Extended config space */
+-#define LBB 0xf4
+-
+-/* VGA stuff */
+-
+-#define VGA_ST01_MDA 0x3ba
+-#define VGA_ST01_CGA 0x3da
+-
+-#define VGA_MSR_WRITE 0x3c2
+-#define VGA_MSR_READ 0x3cc
+-#define VGA_MSR_MEM_EN (1<<1)
+-#define VGA_MSR_CGA_MODE (1<<0)
+-
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