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commit 382ebd635e3cdadc7733d701ff15741797c3ff1b Author: Fabio Utzig <[email protected]> AuthorDate: Wed Jan 8 09:31:16 2020 -0300 bsp: b-l072z-lrwan1: use sane defaults for lora HW Add GPIO/SPI/TIMER default settings that match lora connection in the board. Signed-off-by: Fabio Utzig <[email protected]> --- hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h | 10 ++++++++++ hw/bsp/b-l072z-lrwan1/syscfg.yml | 4 +++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h b/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h index b6f4a7e..6a93b93 100644 --- a/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h +++ b/hw/bsp/b-l072z-lrwan1/include/bsp/bsp.h @@ -43,6 +43,16 @@ extern uint8_t _ram_start; #define LED_3 MCU_GPIO_PORTB(7) /* LD4 - red */ #define LED_4 MCU_GPIO_PORTA(5) /* LD2 - green */ +/* SX1276 pins */ +#define SX1276_DIO0 MCU_GPIO_PORTB(4) +#define SX1276_DIO1 MCU_GPIO_PORTB(1) +#define SX1276_DIO2 MCU_GPIO_PORTB(0) +#define SX1276_DIO3 MCU_GPIO_PORTC(13) +#define SX1276_DIO4 MCU_GPIO_PORTA(5) +/* NOTE: DIO5 is not used, but must be defined */ +#define SX1276_DIO5 (-1) +#define SX1276_NRESET MCU_GPIO_PORTC(0) + /* UART */ #define UART_CNT 1 diff --git a/hw/bsp/b-l072z-lrwan1/syscfg.yml b/hw/bsp/b-l072z-lrwan1/syscfg.yml index 28c3915..6d15159 100644 --- a/hw/bsp/b-l072z-lrwan1/syscfg.yml +++ b/hw/bsp/b-l072z-lrwan1/syscfg.yml @@ -43,7 +43,9 @@ syscfg.vals: CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS NFFS_FLASH_AREA: FLASH_AREA_NFFS COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1 - SX1276_SPI_IDX: 0 + SX1276_SPI_IDX: 1 + SX1276_SPI_CS_PIN: 'MCU_GPIO_PORTB(12)' + LORA_MAC_TIMER_NUM: 0 STM32_CLOCK_VOLTAGESCALING_CONFIG: 'PWR_REGULATOR_VOLTAGE_SCALE1' STM32_CLOCK_LSI: 1 STM32_CLOCK_LSE: 0
