apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify 
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584284096
 
 
   
   <!-- style-bot -->
   
   ## Style check summary
   
   ### Our coding style is 
[here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
   
   
   #### hw/mcu/stm/stm32_common/src/stm32_periph.c
   <details>
   
   ```diff
   @@ -98,11 +98,11 @@
    extern const struct stm32_hal_spi_cfg os_bsp_spi0_cfg;
    #else
    static const struct stm32_hal_spi_cfg os_bsp_spi0_cfg = {
   -    .sck_pin      = MYNEWT_VAL(SPI_0_PIN_SCK),
   -    .mosi_pin     = MYNEWT_VAL(SPI_0_PIN_MOSI),
   -    .miso_pin     = MYNEWT_VAL(SPI_0_PIN_MISO),
   -    .ss_pin       = MYNEWT_VAL(SPI_0_PIN_SS),
   -    .irq_prio     = 2,
   +    .sck_pin = MYNEWT_VAL(SPI_0_PIN_SCK),
   +    .mosi_pin = MYNEWT_VAL(SPI_0_PIN_MOSI),
   +    .miso_pin = MYNEWT_VAL(SPI_0_PIN_MISO),
   +    .ss_pin = MYNEWT_VAL(SPI_0_PIN_SS),
   +    .irq_prio = 2,
    };
    #endif
    #endif
   @@ -111,11 +111,11 @@
    extern const struct stm32_hal_spi_cfg os_bsp_spi1_cfg;
    #else
    static const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
   -    .sck_pin      = MYNEWT_VAL(SPI_1_PIN_SCK),
   -    .mosi_pin     = MYNEWT_VAL(SPI_1_PIN_MOSI),
   -    .miso_pin     = MYNEWT_VAL(SPI_1_PIN_MISO),
   -    .ss_pin       = MYNEWT_VAL(SPI_1_PIN_SS),
   -    .irq_prio     = 2,
   +    .sck_pin = MYNEWT_VAL(SPI_1_PIN_SCK),
   +    .mosi_pin = MYNEWT_VAL(SPI_1_PIN_MOSI),
   +    .miso_pin = MYNEWT_VAL(SPI_1_PIN_MISO),
   +    .ss_pin = MYNEWT_VAL(SPI_1_PIN_SS),
   +    .irq_prio = 2,
    };
    #endif
    #endif
   @@ -124,11 +124,11 @@
    extern const struct stm32_hal_spi_cfg os_bsp_spi2_cfg;
    #else
    static const struct stm32_hal_spi_cfg os_bsp_spi2_cfg = {
   -    .sck_pin      = MYNEWT_VAL(SPI_2_PIN_SCK),
   -    .mosi_pin     = MYNEWT_VAL(SPI_2_PIN_MOSI),
   -    .miso_pin     = MYNEWT_VAL(SPI_2_PIN_MISO),
   -    .ss_pin       = MYNEWT_VAL(SPI_2_PIN_SS),
   -    .irq_prio     = 2,
   +    .sck_pin = MYNEWT_VAL(SPI_2_PIN_SCK),
   +    .mosi_pin = MYNEWT_VAL(SPI_2_PIN_MOSI),
   +    .miso_pin = MYNEWT_VAL(SPI_2_PIN_MISO),
   +    .ss_pin = MYNEWT_VAL(SPI_2_PIN_SS),
   +    .irq_prio = 2,
    };
    #endif
    #endif
   @@ -137,11 +137,11 @@
    extern const struct stm32_hal_spi_cfg os_bsp_spi3_cfg;
    #else
    static const struct stm32_hal_spi_cfg os_bsp_spi3_cfg = {
   -    .sck_pin      = MYNEWT_VAL(SPI_3_PIN_SCK),
   -    .mosi_pin     = MYNEWT_VAL(SPI_3_PIN_MOSI),
   -    .miso_pin     = MYNEWT_VAL(SPI_3_PIN_MISO),
   -    .ss_pin       = MYNEWT_VAL(SPI_3_PIN_SS),
   -    .irq_prio     = 2,
   +    .sck_pin = MYNEWT_VAL(SPI_3_PIN_SCK),
   +    .mosi_pin = MYNEWT_VAL(SPI_3_PIN_MOSI),
   +    .miso_pin = MYNEWT_VAL(SPI_3_PIN_MISO),
   +    .ss_pin = MYNEWT_VAL(SPI_3_PIN_SS),
   +    .irq_prio = 2,
    };
    #endif
    #endif
   ```
   
   </details>
   
   #### hw/bsp/b-l072z-lrwan1/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -86,7 +86,7 @@
    #endif
    
    #if ((MYNEWT_VAL(SPI_1_SLAVE) || MYNEWT_VAL(SPI_1_MASTER)) && \
   -        MYNEWT_VAL(SPI_1_CUSTOM_CFG))
   +    MYNEWT_VAL(SPI_1_CUSTOM_CFG))
    const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
    #if (MYNEWT_VAL(LORA_NODE) && (MYNEWT_VAL(SX1276_SPI_IDX) == 1))
        .ss_pin = MYNEWT_VAL(SX1276_SPI_CS_PIN),
   ```
   
   </details>
   
   #### hw/bsp/nucleo-f103rb/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -38,43 +38,43 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart         = USART2,
   -    .suc_rcc_reg      = &RCC->APB1ENR,
   -    .suc_rcc_dev      = RCC_APB1ENR_USART2EN,
   -    .suc_pin_tx       = MYNEWT_VAL(UART_0_TX),
   -    .suc_pin_rx       = MYNEWT_VAL(UART_0_RX),
   -    .suc_pin_rts      = MYNEWT_VAL(UART_0_RTS),
   -    .suc_pin_cts      = MYNEWT_VAL(UART_0_CTS),
   +    .suc_uart = USART2,
   +    .suc_rcc_reg = &RCC->APB1ENR,
   +    .suc_rcc_dev = RCC_APB1ENR_USART2EN,
   +    .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
   +    .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
   +    .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
        .suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART2,
   -    .suc_irqn         = USART2_IRQn,
   +    .suc_irqn = USART2_IRQn,
    };
    #endif
    
    #if MYNEWT_VAL(UART_1)
    const struct stm32_uart_cfg os_bsp_uart1_cfg = {
   -    .suc_uart         = USART1,
   -    .suc_rcc_reg      = &RCC->APB2ENR,
   -    .suc_rcc_dev      = RCC_APB2ENR_USART1EN,
   -    .suc_pin_tx       = MYNEWT_VAL(UART_1_TX),
   -    .suc_pin_rx       = MYNEWT_VAL(UART_1_RX),
   -    .suc_pin_rts      = MYNEWT_VAL(UART_1_RTS),
   -    .suc_pin_cts      = MYNEWT_VAL(UART_1_CTS),
   +    .suc_uart = USART1,
   +    .suc_rcc_reg = &RCC->APB2ENR,
   +    .suc_rcc_dev = RCC_APB2ENR_USART1EN,
   +    .suc_pin_tx = MYNEWT_VAL(UART_1_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_1_RX),
   +    .suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
   +    .suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
        .suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART1,
   -    .suc_irqn         = USART1_IRQn
   +    .suc_irqn = USART1_IRQn
    };
    #endif
    
    #if MYNEWT_VAL(UART_2)
    const struct stm32_uart_cfg os_bsp_uart1_cfg = {
   -    .suc_uart         = USART3,
   -    .suc_rcc_reg      = &RCC->APB1ENR,
   -    .suc_rcc_dev      = RCC_APB1ENR_USART3EN,
   -    .suc_pin_tx       = MYNEWT_VAL(UART_2_TX),
   -    .suc_pin_rx       = MYNEWT_VAL(UART_2_RX),
   -    .suc_pin_rts      = MYNEWT_VAL(UART_2_RTS),
   -    .suc_pin_cts      = MYNEWT_VAL(UART_2_CTS),
   +    .suc_uart = USART3,
   +    .suc_rcc_reg = &RCC->APB1ENR,
   +    .suc_rcc_dev = RCC_APB1ENR_USART3EN,
   +    .suc_pin_tx = MYNEWT_VAL(UART_2_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_2_RX),
   +    .suc_pin_rts = MYNEWT_VAL(UART_2_RTS),
   +    .suc_pin_cts = MYNEWT_VAL(UART_2_CTS),
        .suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART3,
   -    .suc_irqn         = USART3_IRQn
   +    .suc_irqn = USART3_IRQn
    };
    #endif
    
   ```
   
   </details>
   
   #### hw/bsp/nucleo-f303k8/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -34,29 +34,29 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart    = USART2,
   +    .suc_uart = USART2,
        .suc_rcc_reg = &RCC->APB1ENR,
        .suc_rcc_dev = RCC_APB1ENR_USART2EN,
        .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
        .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART2,
   -    .suc_irqn    = USART2_IRQn
   +    .suc_pin_af = GPIO_AF7_USART2,
   +    .suc_irqn = USART2_IRQn
    };
    #endif
    
    #if MYNEWT_VAL(UART_1)
    const struct stm32_uart_cfg os_bsp_uart1_cfg = {
   -    .suc_uart    = USART1,
   +    .suc_uart = USART1,
        .suc_rcc_reg = &RCC->APB2ENR,
        .suc_rcc_dev = RCC_APB2ENR_USART1EN,
        .suc_pin_tx = MYNEWT_VAL(UART_1_TX),
        .suc_pin_rx = MYNEWT_VAL(UART_1_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART1,
   -    .suc_irqn    = USART1_IRQn
   +    .suc_pin_af = GPIO_AF7_USART1,
   +    .suc_irqn = USART1_IRQn
    };
    #endif
    
   ```
   
   </details>
   
   #### hw/bsp/nucleo-f303re/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -34,28 +34,28 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart    = USART2,
   +    .suc_uart = USART2,
        .suc_rcc_reg = &RCC->APB1ENR,
        .suc_rcc_dev = RCC_APB1ENR_USART2EN,
        .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
        .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART2,
   -    .suc_irqn    = USART2_IRQn
   +    .suc_pin_af = GPIO_AF7_USART2,
   +    .suc_irqn = USART2_IRQn
    };
    #endif
    #if MYNEWT_VAL(UART_1)
    const struct stm32_uart_cfg os_bsp_uart1_cfg = {
   -    .suc_uart    = USART1,
   +    .suc_uart = USART1,
        .suc_rcc_reg = &RCC->APB2ENR,
        .suc_rcc_dev = RCC_APB2ENR_USART1EN,
        .suc_pin_tx = MYNEWT_VAL(UART_1_TX),
        .suc_pin_rx = MYNEWT_VAL(UART_1_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART1,
   -    .suc_irqn    = USART1_IRQn
   +    .suc_pin_af = GPIO_AF7_USART1,
   +    .suc_irqn = USART1_IRQn
    };
    #endif
    
   ```
   
   </details>
   
   #### hw/bsp/nucleo-f401re/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -50,15 +50,15 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart    = USART2,
   +    .suc_uart = USART2,
        .suc_rcc_reg = &RCC->APB1ENR,
        .suc_rcc_dev = RCC_APB1ENR_USART2EN,
   -    .suc_pin_tx  = MYNEWT_VAL(UART_0_TX),
   -    .suc_pin_rx  = MYNEWT_VAL(UART_0_RX),
   +    .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART2,
   -    .suc_irqn    = USART2_IRQn
   +    .suc_pin_af = GPIO_AF7_USART2,
   +    .suc_irqn = USART2_IRQn
    };
    #endif
    
   ```
   
   </details>
   
   #### hw/bsp/nucleo-f411re/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -50,43 +50,43 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart    = USART2,
   +    .suc_uart = USART2,
        .suc_rcc_reg = &RCC->APB1ENR,
        .suc_rcc_dev = RCC_APB1ENR_USART2EN,
   -    .suc_pin_tx  = MYNEWT_VAL(UART_0_TX),
   -    .suc_pin_rx  = MYNEWT_VAL(UART_0_RX),
   +    .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART2,
   -    .suc_irqn    = USART2_IRQn,
   +    .suc_pin_af = GPIO_AF7_USART2,
   +    .suc_irqn = USART2_IRQn,
    };
    #endif
    
    #if MYNEWT_VAL(UART_1)
    const struct stm32_uart_cfg os_bsp_uart1_cfg = {
   -    .suc_uart    = USART1,
   +    .suc_uart = USART1,
        .suc_rcc_reg = &RCC->APB2ENR,
        .suc_rcc_dev = RCC_APB2ENR_USART1EN,
   -    .suc_pin_tx  = MYNEWT_VAL(UART_1_TX),
   -    .suc_pin_rx  = MYNEWT_VAL(UART_1_RX),
   +    .suc_pin_tx = MYNEWT_VAL(UART_1_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_1_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART1,
   -    .suc_irqn    = USART1_IRQn,
   +    .suc_pin_af = GPIO_AF7_USART1,
   +    .suc_irqn = USART1_IRQn,
    };
    #endif
    
    #if MYNEWT_VAL(UART_2)
    const struct stm32_uart_cfg os_bsp_uart2_cfg = {
   -    .suc_uart    = USART6,
   +    .suc_uart = USART6,
        .suc_rcc_reg = &RCC->APB2ENR,
        .suc_rcc_dev = RCC_APB2ENR_USART6EN,
   -    .suc_pin_tx  = MYNEWT_VAL(UART_2_TX),
   -    .suc_pin_rx  = MYNEWT_VAL(UART_2_RX),
   +    .suc_pin_tx = MYNEWT_VAL(UART_2_TX),
   +    .suc_pin_rx = MYNEWT_VAL(UART_2_RX),
        .suc_pin_rts = -1,
        .suc_pin_cts = -1,
   -    .suc_pin_af  = GPIO_AF8_USART6,
   -    .suc_irqn    = USART6_IRQn,
   +    .suc_pin_af = GPIO_AF8_USART6,
   +    .suc_irqn = USART6_IRQn,
    };
    #endif
    
   ```
   
   </details>
   
   #### hw/bsp/stm32f3discovery/src/hal_bsp.c
   <details>
   
   ```diff
   @@ -43,15 +43,15 @@
    
    #if MYNEWT_VAL(UART_0)
    const struct stm32_uart_cfg os_bsp_uart0_cfg = {
   -    .suc_uart    = USART1,
   +    .suc_uart = USART1,
        .suc_rcc_reg = &RCC->APB2ENR,
        .suc_rcc_dev = RCC_APB2ENR_USART1EN,
        .suc_pin_tx = MYNEWT_VAL(UART_0_TX),
        .suc_pin_rx = MYNEWT_VAL(UART_0_RX),
        .suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
        .suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
   -    .suc_pin_af  = GPIO_AF7_USART1,
   -    .suc_irqn    = USART1_IRQn,
   +    .suc_pin_af = GPIO_AF7_USART1,
   +    .suc_irqn = USART1_IRQn,
    };
    #endif
    
   ```
   
   </details>

----------------------------------------------------------------
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
 
For queries about this service, please contact Infrastructure at:
us...@infra.apache.org


With regards,
Apache Git Services

Reply via email to