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naveenkaje pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 3fd550c da1469x: Use appropriate address range for the crypto input
new 68977c2 Merge pull request #2327 from nkaje/da1469x_crypto_qspif_input
3fd550c is described below
commit 3fd550c35b6171b3e2734ba9f8aeb2df9ef02a07
Author: Naveen Kaje <[email protected]>
AuthorDate: Thu Jul 9 09:01:45 2020 -0500
da1469x: Use appropriate address range for the crypto input
The da1469x's DMA should use a different address range to
access the QSPI flash based addresses. When the input buffer
is QSPIF based, perform the translation. RAM based buffers
do not need this translation.
Signed-off-by: Naveen Kaje <[email protected]>
---
.../crypto/crypto_da1469x/src/crypto_da1469x.c | 23 ++++++++++++++++++++++
hw/mcu/dialog/da14699/include/mcu/mcu.h | 3 +++
2 files changed, 26 insertions(+)
diff --git a/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
b/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
index 99cb854..50dac7a 100644
--- a/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
+++ b/hw/drivers/crypto/crypto_da1469x/src/crypto_da1469x.c
@@ -28,6 +28,17 @@ static struct os_mutex gmtx;
#define VALID_AES_KEYLEN(x) (((x) == 128) || ((x) == 192) || ((x) == 256))
+/* Definitions for REMAP_ADR0 (bits 2:0) of SYS_CTRL_REG. See Datasheet for
details */
+typedef enum {
+ Sys_Remap_ROM = 0,
+ Sys_Remap_OTP,
+ Sys_Remap_QSPIF,
+ Sys_Remap_RAMS_Uncached,
+ Sys_Remap_QSPIF_Uncached, /* For verification only */
+ Sys_Remap_SYSRAM2, /* For testing purposes only */
+ Sys_Remap_Cache_DATA_RAM_Uncached, /* For CACHERAM_MUX=0, for testing
purposes only */
+} Sys_Remap_ADR0;
+
static bool
da1469x_has_support(struct crypto_dev *crypto, uint8_t op, uint16_t algo,
uint16_t mode, uint16_t keylen)
@@ -62,6 +73,7 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op,
uint16_t algo,
uint32_t *keyreg;
uint32_t *keyp32;
uint32_t ctrl_reg;
+ Sys_Remap_ADR0 remap_adr0;
if (!da1469x_has_support(crypto, op, algo, mode, keylen)) {
return 0;
@@ -161,6 +173,17 @@ da1469x_crypto_op(struct crypto_dev *crypto, uint8_t op,
uint16_t algo,
*keyreg++ = os_bswap_32(*keyp32); keyp32++;
}
+ /*
+ * REMAP_ADR0 when 2, address 0 is mapped to QSPI Flash. See SYS_CTRL_REG
in datasheet.
+ * If inbuf is in QSPI Flash, the addresses need to be translated to
+ * 0x36000000 range for the DMA engine access.
+ */
+ remap_adr0 = (CRG_TOP->SYS_CTRL_REG & CRG_TOP_SYS_CTRL_REG_REMAP_ADR0_Msk)
>> CRG_TOP_SYS_CTRL_REG_REMAP_ADR0_Pos;
+
+ if (MCU_MEM_QSPIF_M_RANGE_ADDRESS(inbuf) && remap_adr0 == Sys_Remap_QSPIF)
{
+ inbuf += 0x20000000;
+ }
+
AES_HASH->CRYPTO_FETCH_ADDR_REG = (uint32_t)inbuf;
AES_HASH->CRYPTO_DEST_ADDR_REG = (uint32_t)outbuf;
/* NOTE: length register allows only 24-bits */
diff --git a/hw/mcu/dialog/da14699/include/mcu/mcu.h
b/hw/mcu/dialog/da14699/include/mcu/mcu.h
index 1e67367..7222964 100644
--- a/hw/mcu/dialog/da14699/include/mcu/mcu.h
+++ b/hw/mcu/dialog/da14699/include/mcu/mcu.h
@@ -150,6 +150,9 @@ void mcu_gpio_exit_sleep(void);
#define MCU_MEM_QSPIF_M_END_ADDRESS (0x18000000)
#define MCU_MEM_SYSRAM_START_ADDRESS (0x20000000)
#define MCU_MEM_SYSRAM_END_ADDRESS (0x20080000)
+#define MCU_MEM_QSPIF_M_RANGE_ADDRESS(x) \
+ ((uint32_t)(x) >= (uint32_t)MCU_MEM_QSPIF_M_START_ADDRESS && \
+ (uint32_t)(x) <= (uint32_t)MCU_MEM_QSPIF_M_END_ADDRESS)
#define MCU_OTPM_BASE 0x30080000UL
#define MCU_OTPM_SIZE 4096
