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in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit cf00352c09c9638e04c7feac7171138a65ea76c1
Author: Jerzy Kasenberg <jerzy.kasenb...@codecoup.pl>
AuthorDate: Thu Mar 18 13:52:42 2021 +0100
bsp/nordic_pca10095: Add QSPI flash
This enables QSPI flash that is present on pca10095 board.
It should be possible to set SCK to 48MHz but it does not
seem to be stable configuration. SCK is reduced to 32MHz
On board flash is rated for 80MHz so 96MHz was not even considered.
---
hw/bsp/nordic_pca10095/src/hal_bsp.c | 6 +++++-
hw/bsp/nordic_pca10095/syscfg.yml | 20 ++++++++++++++++++++
2 files changed, 25 insertions(+), 1 deletion(-)
diff --git a/hw/bsp/nordic_pca10095/src/hal_bsp.c
b/hw/bsp/nordic_pca10095/src/hal_bsp.c
index b2ef0c4..23a7f2e 100644
--- a/hw/bsp/nordic_pca10095/src/hal_bsp.c
+++ b/hw/bsp/nordic_pca10095/src/hal_bsp.c
@@ -49,7 +49,11 @@ hal_bsp_flash_dev(uint8_t id)
if (id == 0) {
return &nrf5340_flash_dev;
}
-
+#if MYNEWT_VAL(QSPI_ENABLE)
+ if (id == 1) {
+ return &nrf5340_qspi_dev;
+ }
+#endif
return NULL;
}
diff --git a/hw/bsp/nordic_pca10095/syscfg.yml
b/hw/bsp/nordic_pca10095/syscfg.yml
index e33c83a..25b462f 100644
--- a/hw/bsp/nordic_pca10095/syscfg.yml
+++ b/hw/bsp/nordic_pca10095/syscfg.yml
@@ -59,5 +59,25 @@ syscfg.vals:
BLE_HCI_TRANSPORT: nrf5340
+ QSPI_FLASH_SECTOR_SIZE: 4096
+ QSPI_FLASH_SECTOR_COUNT: 2048
+ QSPI_PIN_CS: 18
+ QSPI_PIN_SCK: 17
+ QSPI_PIN_DIO0: 13
+ QSPI_PIN_DIO1: 14
+ QSPI_PIN_DIO2: 15
+ QSPI_PIN_DIO3: 16
+ # QUAD IO Read (opcode EBh)
+ QSPI_READOC: 4
+ # QUAD IO Page prorgram (opcode 38h)
+ QSPI_WRITEOC: 3
+
+ # Set 192M to 192MHz
+ MCU_HFCLCK192_DIV: 1
+ # Set QSPI clock divider to (6 = (2 * (QSPI_SCK_FREQ + 1)) resulting in
32MHz QSPI clock
+ QSPI_SCK_FREQ: 2
+
+ QSPI_XIP_OFFSET: 0x10000000
+
syscfg.vals.!BOOT_LOADER:
MCU_LFCLK_SOURCE: LFXO
