This is an automated email from the ASF dual-hosted git repository. jerzy pushed a commit to branch master in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push: new ce4e75a hw/drivers/flash/spiflash: add P25Q32H chip ce4e75a is described below commit ce4e75ac994248f745d86c443c6eaed89a47de91 Author: Christoph Honal <christoph.ho...@web.de> AuthorDate: Tue Mar 15 11:01:12 2022 +0100 hw/drivers/flash/spiflash: add P25Q32H chip --- hw/drivers/flash/spiflash/chips/syscfg.yml | 3 +++ hw/drivers/flash/spiflash/include/spiflash/spiflash.h | 1 + hw/drivers/flash/spiflash/src/spiflash.c | 5 +++++ 3 files changed, 9 insertions(+) diff --git a/hw/drivers/flash/spiflash/chips/syscfg.yml b/hw/drivers/flash/spiflash/chips/syscfg.yml index f9c8e8f..be85dee 100644 --- a/hw/drivers/flash/spiflash/chips/syscfg.yml +++ b/hw/drivers/flash/spiflash/chips/syscfg.yml @@ -506,3 +506,6 @@ syscfg.defs: SPIFLASH_XM25QH32B: description: Add support for XM25QH32B value: 0 + SPIFLASH_P25Q32H: + description: Add support for P25Q32H + value: 0 diff --git a/hw/drivers/flash/spiflash/include/spiflash/spiflash.h b/hw/drivers/flash/spiflash/include/spiflash/spiflash.h index 0e139af..f57c402 100644 --- a/hw/drivers/flash/spiflash/include/spiflash/spiflash.h +++ b/hw/drivers/flash/spiflash/include/spiflash/spiflash.h @@ -127,6 +127,7 @@ struct spiflash_chip { #define JEDEC_MFC_ADESTO 0x1F #define JEDEC_MFC_EON 0x1C #define JEDEC_MFC_XTX 0x0B +#define JEDEC_MFC_PUYA 0x85 #define FLASH_CAPACITY_256KBIT 0x09 #define FLASH_CAPACITY_512KBIT 0x10 diff --git a/hw/drivers/flash/spiflash/src/spiflash.c b/hw/drivers/flash/spiflash/src/spiflash.c index 8154b4f..6879b7e 100644 --- a/hw/drivers/flash/spiflash/src/spiflash.c +++ b/hw/drivers/flash/spiflash/src/spiflash.c @@ -86,6 +86,8 @@ static void spiflash_release_power_down_generic(struct spiflash_dev *dev) __attr STD_FLASH_CHIP(name, JEDEC_MFC_EON, typ, cap, spiflash_release_power_down_generic) #define XTX_CHIP(name, typ, cap) \ STD_FLASH_CHIP(name, JEDEC_MFC_XTX, typ, cap, spiflash_release_power_down_generic) +#define PUYA_CHIP(name, typ, cap) \ + STD_FLASH_CHIP(name, JEDEC_MFC_PUYA, typ, cap, spiflash_release_power_down_generic) static struct spiflash_chip supported_chips[] = { #if MYNEWT_VAL(SPIFLASH_MANUFACTURER) && MYNEWT_VAL(SPIFLASH_MEMORY_TYPE) && MYNEWT_VAL(SPIFLASH_MEMORY_CAPACITY) @@ -582,6 +584,9 @@ static struct spiflash_chip supported_chips[] = { #if MYNEWT_VAL(SPIFLASH_XM25QH32B) MICRON_CHIP(XM25QH32B, 0x40, FLASH_CAPACITY_32MBIT), #endif +#if MYNEWT_VAL(SPIFLASH_P25Q32H) + PUYA_CHIP(P25Q32H, 0x60, FLASH_CAPACITY_32MBIT), +#endif { {0} }, };