kasjer opened a new pull request, #2882: URL: https://github.com/apache/mynewt-core/pull/2882
All interrupts used same register set and that made interrupt code take more time since more registers needed to be save. Commit 808115b9530b059ff9b6a12fc5b988f87e540710 enabled interrupts at some point during context switch and while interrupts were enabled isr code for interrupt or exception that would be handled (Coprocessor Unusable exception) would use k0 and k1 without storing it first. This leads to difficult to find hard faults. One way to fix it would be to not enable interrupts during context switch but this change just assigns SRS to interrupts and exception so k0 and k1 will not get clobbered during context switch. For pic32mx just not enable interrupt during context switch since they don't have enough SRS. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
