This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 84a44a5a7 mcu/pic32mz: Add d-cache flushing functions
84a44a5a7 is described below
commit 84a44a5a7436c5f65f3ea9cadd8eb72a4e8f7c55
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Mon Sep 19 20:19:39 2022 +0200
mcu/pic32mz: Add d-cache flushing functions
Add D-cache flushing functions if L1 CACHE is present.
---
hw/mcu/microchip/pic32mz/include/mcu/pic32.h | 8 ++++++++
hw/mcu/microchip/pic32mz/src/system_pic32.c | 25 +++++++++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/hw/mcu/microchip/pic32mz/include/mcu/pic32.h
b/hw/mcu/microchip/pic32mz/include/mcu/pic32.h
index 893d2d89c..3439bc8be 100644
--- a/hw/mcu/microchip/pic32mz/include/mcu/pic32.h
+++ b/hw/mcu/microchip/pic32mz/include/mcu/pic32.h
@@ -22,6 +22,14 @@
extern uint32_t SystemCoreClock;
+#if __PIC32_HAS_L1CACHE
+void dcache_flush(void);
+void dcache_flush_area(void *addr, int size);
+#else
+#define dcache_flush()
+#define dcache_flush_area(addr, size)
+#endif
+
static inline void __attribute__((always_inline))
hal_debug_break(void)
{
diff --git a/hw/mcu/microchip/pic32mz/src/system_pic32.c
b/hw/mcu/microchip/pic32mz/src/system_pic32.c
index 2f6e18108..e87ed5fcb 100644
--- a/hw/mcu/microchip/pic32mz/src/system_pic32.c
+++ b/hw/mcu/microchip/pic32mz/src/system_pic32.c
@@ -42,6 +42,31 @@ static inline int PLL_ODIV(int n)
uint32_t SystemCoreClock;
+#if __PIC32_HAS_L1CACHE
+void
+dcache_flush_area(void *addr, int size)
+{
+ uint32_t a = (uint32_t)(addr) & ~3;
+
+ for (; size > 0; --size, a += 4) {
+ _cache(17, (void *)a);
+ }
+}
+
+void
+dcache_flush(void)
+{
+ int i;
+ int j;
+
+ for (i = 0; i < 64; ++i) {
+ for (j = 0; j < 4; ++j) {
+ _cache(1, (void *)((i + j * 64) * 16));
+ }
+ }
+}
+#endif
+
void
SystemClock_Config(void)
{
