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jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 0fe8c1b71 hw/drivers/flash/spiflash: Make SPI mode configurable
0fe8c1b71 is described below
commit 0fe8c1b712d1b2ae3e4e6129e7d61146a668a553
Author: Jerzy Kasenberg <[email protected]>
AuthorDate: Fri Jul 14 08:46:16 2023 +0200
hw/drivers/flash/spiflash: Make SPI mode configurable
SPI mode for hardcoded to HAL_SPI_MODE3, most SPI flashes
also support HAL_SPI_MODE0.
Now user can specify which mode to use.
Signed-off-by: Jerzy Kasenberg <[email protected]>
---
hw/bsp/black_vet6/src/hal_bsp.c | 2 +-
hw/bsp/hifive1/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-h723zg/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-l073rz/src/hal_bsp.c | 2 +-
hw/bsp/nucleo-u575zi-q/src/hal_bsp.c | 2 +-
hw/bsp/olimex-pic32-emz64/src/hal_bsp.c | 2 +-
hw/bsp/olimex-pic32-hmz144/src/hal_bsp.c | 2 +-
hw/bsp/pinetime/src/hal_bsp.c | 2 +-
hw/drivers/flash/spiflash/src/spiflash.c | 2 +-
hw/drivers/flash/spiflash/syscfg.yml | 7 +++++++
10 files changed, 16 insertions(+), 9 deletions(-)
diff --git a/hw/bsp/black_vet6/src/hal_bsp.c b/hw/bsp/black_vet6/src/hal_bsp.c
index 28caccdc2..589b73d66 100644
--- a/hw/bsp/black_vet6/src/hal_bsp.c
+++ b/hw/bsp/black_vet6/src/hal_bsp.c
@@ -290,7 +290,7 @@ extern const struct hal_flash stm32_flash_dev;
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/hifive1/src/hal_bsp.c b/hw/bsp/hifive1/src/hal_bsp.c
index d3e64a980..e7b7de36a 100644
--- a/hw/bsp/hifive1/src/hal_bsp.c
+++ b/hw/bsp/hifive1/src/hal_bsp.c
@@ -47,7 +47,7 @@ static const struct hal_bsp_mem_dump dump_cfg[] = {
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/nucleo-h723zg/src/hal_bsp.c
b/hw/bsp/nucleo-h723zg/src/hal_bsp.c
index 65f213d9b..130d3293b 100644
--- a/hw/bsp/nucleo-h723zg/src/hal_bsp.c
+++ b/hw/bsp/nucleo-h723zg/src/hal_bsp.c
@@ -204,7 +204,7 @@ extern const struct hal_flash stm32_flash_dev;
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_0,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/nucleo-l073rz/src/hal_bsp.c
b/hw/bsp/nucleo-l073rz/src/hal_bsp.c
index 198874d67..d9f07db3b 100644
--- a/hw/bsp/nucleo-l073rz/src/hal_bsp.c
+++ b/hw/bsp/nucleo-l073rz/src/hal_bsp.c
@@ -116,7 +116,7 @@ extern const struct hal_flash stm32_flash_dev;
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
b/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
index 802edb1af..6982e3fe5 100644
--- a/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
+++ b/hw/bsp/nucleo-u575zi-q/src/hal_bsp.c
@@ -154,7 +154,7 @@ extern const struct hal_flash stm32_flash_dev;
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_0,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
b/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
index 7ee78b87a..b22777c23 100644
--- a/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
+++ b/hw/bsp/olimex-pic32-emz64/src/hal_bsp.c
@@ -97,7 +97,7 @@
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/olimex-pic32-hmz144/src/hal_bsp.c
b/hw/bsp/olimex-pic32-hmz144/src/hal_bsp.c
index 897304448..b1db84106 100644
--- a/hw/bsp/olimex-pic32-hmz144/src/hal_bsp.c
+++ b/hw/bsp/olimex-pic32-hmz144/src/hal_bsp.c
@@ -96,7 +96,7 @@
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/bsp/pinetime/src/hal_bsp.c b/hw/bsp/pinetime/src/hal_bsp.c
index 195f2d221..723916cb7 100644
--- a/hw/bsp/pinetime/src/hal_bsp.c
+++ b/hw/bsp/pinetime/src/hal_bsp.c
@@ -61,7 +61,7 @@ hal_bsp_core_dump(int *area_cnt)
struct bus_spi_node_cfg flash_spi_cfg = {
.node_cfg.bus_name = MYNEWT_VAL(BSP_FLASH_SPI_BUS),
.pin_cs = MYNEWT_VAL(SPIFLASH_SPI_CS_PIN),
- .mode = BUS_SPI_MODE_3,
+ .mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.data_order = HAL_SPI_MSB_FIRST,
.freq = MYNEWT_VAL(SPIFLASH_BAUDRATE),
};
diff --git a/hw/drivers/flash/spiflash/src/spiflash.c
b/hw/drivers/flash/spiflash/src/spiflash.c
index 4a59ee0e6..5ed115d24 100644
--- a/hw/drivers/flash/spiflash/src/spiflash.c
+++ b/hw/drivers/flash/spiflash/src/spiflash.c
@@ -655,7 +655,7 @@ struct spiflash_dev spiflash_dev = {
/* SPI settings */
.spi_settings = {
.data_order = HAL_SPI_MSB_FIRST,
- .data_mode = HAL_SPI_MODE3,
+ .data_mode = MYNEWT_VAL(SPIFLASH_SPI_MODE),
.baudrate = MYNEWT_VAL(SPIFLASH_BAUDRATE),
.word_size = HAL_SPI_WORD_SIZE_8BIT,
},
diff --git a/hw/drivers/flash/spiflash/syscfg.yml
b/hw/drivers/flash/spiflash/syscfg.yml
index 205fb3f6a..5d0b19003 100644
--- a/hw/drivers/flash/spiflash/syscfg.yml
+++ b/hw/drivers/flash/spiflash/syscfg.yml
@@ -28,6 +28,13 @@ syscfg.defs:
description: 'SPI interface CS pin'
value: -1
+ SPIFLASH_SPI_MODE:
+ description: >
+ SPI clock mode. Most devices support HAL_SPI_MODE0 (clock low when
idle,
+ first edge latches data) and HAL_SPI_MODE3 (clock high when idle,
+ second clock edge latches data).
+ value: HAL_SPI_MODE3
+
SPIFLASH_SECTOR_COUNT:
description: 'Number of sectors'
value: 0
