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commit 64090c07a96c9e42b92028aaa4775d2bb367cab4
Author: Jerzy Kasenberg <jerzy.kasenb...@codecoup.pl>
AuthorDate: Tue Jan 14 11:25:05 2025 +0100
hw/mcu/stm32f7: Add I2SPLL configuration
Code can configures I2SPLL during initialization if
enabled.
I2SPLL can be used for I2S SAI or SPDIFRX
Signed-off-by: Jerzy Kasenberg <jerzy.kasenb...@codecoup.pl>
---
hw/mcu/stm/stm32f7xx/src/clock_stm32f7xx.c | 22 ++++++++++++++++++++++
hw/mcu/stm/stm32f7xx/syscfg.yml | 20 ++++++++++++++++++++
2 files changed, 42 insertions(+)
diff --git a/hw/mcu/stm/stm32f7xx/src/clock_stm32f7xx.c
b/hw/mcu/stm/stm32f7xx/src/clock_stm32f7xx.c
index a60145198..6a6260543 100644
--- a/hw/mcu/stm/stm32f7xx/src/clock_stm32f7xx.c
+++ b/hw/mcu/stm/stm32f7xx/src/clock_stm32f7xx.c
@@ -42,6 +42,24 @@
#error "At least one of HSE or HSI clock source must be enabled"
#endif
+static void
+config_i2s_pll(void)
+{
+ RCC_PeriphCLKInitTypeDef i2s_clock_init = {0};
+
+ i2s_clock_init.PeriphClockSelection = RCC_PERIPHCLK_I2S;
+ i2s_clock_init.PLLI2S.PLLI2SN = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLN);
+#if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) ||
defined (STM32F765xx) || \
+ defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx) ||
defined (STM32F779xx) || \
+ defined (STM32F750xx)
+ i2s_clock_init.PLLI2S.PLLI2SP = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLP);
+#endif
+ i2s_clock_init.PLLI2S.PLLI2SQ = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLQ);
+ i2s_clock_init.PLLI2S.PLLI2SR = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLR);
+
+ HAL_RCCEx_PeriphCLKConfig(&i2s_clock_init);
+}
+
void
SystemClock_Config(void)
{
@@ -232,6 +250,10 @@ SystemClock_Config(void)
assert(0);
}
+ if (MYNEWT_VAL(STM32_CLOCK_PLLI2S_ENABLE)) {
+ config_i2s_pll();
+ }
+
#if ((MYNEWT_VAL(STM32_CLOCK_HSI) == 0) || (MYNEWT_VAL(STM32_CLOCK_HSE) == 0))
/*
* Turn off HSE/HSI oscillator; this must be done at the end because
diff --git a/hw/mcu/stm/stm32f7xx/syscfg.yml b/hw/mcu/stm/stm32f7xx/syscfg.yml
index f9f58659b..cc29a4be6 100644
--- a/hw/mcu/stm/stm32f7xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f7xx/syscfg.yml
@@ -91,6 +91,26 @@ syscfg.defs:
description: PLL config R parameter
value: 0
+ STM32_CLOCK_PLLI2S_ENABLE:
+ description: Enable PLLI2S
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLN:
+ description: I2SPLL config N parameter
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLP:
+ description: I2SPLL config P parameter
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLQ:
+ description: I2SPLL config Q parameter
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLR:
+ description: I2SPLL config R parameter
+ value: 0
+
STM32_CLOCK_ENABLE_OVERDRIVE:
description: Turn on over-drive mode (reach higher clock rates)
value: 0
