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The following commit(s) were added to refs/heads/master by this push:
new 0891cb872 porting: Update ports syscfg
0891cb872 is described below
commit 0891cb8729baf7e7124d947da5007ef6cf393a81
Author: Mynewt Bot <[email protected]>
AuthorDate: Tue Oct 6 14:46:40 2026 +0000
porting: Update ports syscfg
Automated update of system configuration files.
This commit removes comments and adds missing license headers.
---
porting/examples/linux/include/syscfg/syscfg.h | 4 +
.../examples/linux_blemesh/include/syscfg/syscfg.h | 4 +
.../linux_blemesh_shell/include/syscfg/syscfg.h | 4 +
porting/examples/nuttx/include/syscfg/syscfg.h | 4 +
porting/nimble/include/syscfg/syscfg.h | 4 +
porting/npl/riot/include/syscfg/syscfg.h | 180 +++++++++++++++++++++
6 files changed, 200 insertions(+)
diff --git a/porting/examples/linux/include/syscfg/syscfg.h
b/porting/examples/linux/include/syscfg/syscfg.h
index 862e630a2..8c0c2a4f9 100644
--- a/porting/examples/linux/include/syscfg/syscfg.h
+++ b/porting/examples/linux/include/syscfg/syscfg.h
@@ -371,6 +371,10 @@
#define MYNEWT_VAL_MCU_FLASH_STYLE_ST (1)
#endif
+#ifndef MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT
+#define MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT (32)
+#endif
+
#ifndef MYNEWT_VAL_MCU_NATIVE
#define MYNEWT_VAL_MCU_NATIVE (1)
#endif
diff --git a/porting/examples/linux_blemesh/include/syscfg/syscfg.h
b/porting/examples/linux_blemesh/include/syscfg/syscfg.h
index dacd34d6b..7f3d87526 100644
--- a/porting/examples/linux_blemesh/include/syscfg/syscfg.h
+++ b/porting/examples/linux_blemesh/include/syscfg/syscfg.h
@@ -371,6 +371,10 @@
#define MYNEWT_VAL_MCU_FLASH_STYLE_ST (1)
#endif
+#ifndef MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT
+#define MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT (32)
+#endif
+
#ifndef MYNEWT_VAL_MCU_NATIVE
#define MYNEWT_VAL_MCU_NATIVE (1)
#endif
diff --git a/porting/examples/linux_blemesh_shell/include/syscfg/syscfg.h
b/porting/examples/linux_blemesh_shell/include/syscfg/syscfg.h
index 4e088a619..8e0cea8b1 100644
--- a/porting/examples/linux_blemesh_shell/include/syscfg/syscfg.h
+++ b/porting/examples/linux_blemesh_shell/include/syscfg/syscfg.h
@@ -379,6 +379,10 @@
#define MYNEWT_VAL_MCU_FLASH_STYLE_ST (1)
#endif
+#ifndef MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT
+#define MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT (32)
+#endif
+
#ifndef MYNEWT_VAL_MCU_NATIVE
#define MYNEWT_VAL_MCU_NATIVE (1)
#endif
diff --git a/porting/examples/nuttx/include/syscfg/syscfg.h
b/porting/examples/nuttx/include/syscfg/syscfg.h
index 4266454cd..625e44c85 100644
--- a/porting/examples/nuttx/include/syscfg/syscfg.h
+++ b/porting/examples/nuttx/include/syscfg/syscfg.h
@@ -371,6 +371,10 @@
#define MYNEWT_VAL_MCU_FLASH_STYLE_ST (1)
#endif
+#ifndef MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT
+#define MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT (32)
+#endif
+
#ifndef MYNEWT_VAL_MCU_NATIVE
#define MYNEWT_VAL_MCU_NATIVE (1)
#endif
diff --git a/porting/nimble/include/syscfg/syscfg.h
b/porting/nimble/include/syscfg/syscfg.h
index 10d6ee552..c1fb061c0 100644
--- a/porting/nimble/include/syscfg/syscfg.h
+++ b/porting/nimble/include/syscfg/syscfg.h
@@ -371,6 +371,10 @@
#define MYNEWT_VAL_MCU_FLASH_STYLE_ST (1)
#endif
+#ifndef MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT
+#define MYNEWT_VAL_MCU_LINK_TABLES_ALIGNMENT (32)
+#endif
+
#ifndef MYNEWT_VAL_MCU_NATIVE
#define MYNEWT_VAL_MCU_NATIVE (1)
#endif
diff --git a/porting/npl/riot/include/syscfg/syscfg.h
b/porting/npl/riot/include/syscfg/syscfg.h
index c5f98635d..9a3324879 100644
--- a/porting/npl/riot/include/syscfg/syscfg.h
+++ b/porting/npl/riot/include/syscfg/syscfg.h
@@ -387,6 +387,186 @@
#define MYNEWT_VAL_PKG_hw_hal (1)
#endif
+#ifndef MYNEWT_VAL_NRFX_ADC_ENABLED
+#define MYNEWT_VAL_NRFX_ADC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_BELLBOARD_ENABLED
+#define MYNEWT_VAL_NRFX_BELLBOARD_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_CLOCK_ENABLED
+#define MYNEWT_VAL_NRFX_CLOCK_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_COMP_ENABLED
+#define MYNEWT_VAL_NRFX_COMP_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_CRACEN_ENABLED
+#define MYNEWT_VAL_NRFX_CRACEN_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_DPPI_ENABLED
+#define MYNEWT_VAL_NRFX_DPPI_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_EGU_ENABLED
+#define MYNEWT_VAL_NRFX_EGU_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_GPIOTE_ENABLED
+#define MYNEWT_VAL_NRFX_GPIOTE_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_GRTC_ENABLED
+#define MYNEWT_VAL_NRFX_GRTC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_I2S_ENABLED
+#define MYNEWT_VAL_NRFX_I2S_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_IPC_ENABLED
+#define MYNEWT_VAL_NRFX_IPC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_KMU_ENABLED
+#define MYNEWT_VAL_NRFX_KMU_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_LPCOMP_ENABLED
+#define MYNEWT_VAL_NRFX_LPCOMP_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_MRAMC_ENABLED
+#define MYNEWT_VAL_NRFX_MRAMC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_NFCT_ENABLED
+#define MYNEWT_VAL_NRFX_NFCT_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_NVMC_ENABLED
+#define MYNEWT_VAL_NRFX_NVMC_ENABLED (1)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_PDM_ENABLED
+#define MYNEWT_VAL_NRFX_PDM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_POWER_ENABLED
+#define MYNEWT_VAL_NRFX_POWER_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_PPIB_ENABLED
+#define MYNEWT_VAL_NRFX_PPIB_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_PPI_ENABLED
+#define MYNEWT_VAL_NRFX_PPI_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_PRS_ENABLED
+#define MYNEWT_VAL_NRFX_PRS_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_PWM_ENABLED
+#define MYNEWT_VAL_NRFX_PWM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_QDEC_ENABLED
+#define MYNEWT_VAL_NRFX_QDEC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_QSPI_ENABLED
+#define MYNEWT_VAL_NRFX_QSPI_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_RNG_ENABLED
+#define MYNEWT_VAL_NRFX_RNG_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_RRAMC_ENABLED
+#define MYNEWT_VAL_NRFX_RRAMC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_RTC_ENABLED
+#define MYNEWT_VAL_NRFX_RTC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_SAADC_ENABLED
+#define MYNEWT_VAL_NRFX_SAADC_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_SPIM_ENABLED
+#define MYNEWT_VAL_NRFX_SPIM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_SPIS_ENABLED
+#define MYNEWT_VAL_NRFX_SPIS_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_SPI_ENABLED
+#define MYNEWT_VAL_NRFX_SPI_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_SYSTICK_ENABLED
+#define MYNEWT_VAL_NRFX_SYSTICK_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TBM_ENABLED
+#define MYNEWT_VAL_NRFX_TBM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TDM_ENABLED
+#define MYNEWT_VAL_NRFX_TDM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TEMP_ENABLED
+#define MYNEWT_VAL_NRFX_TEMP_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TIMER_ENABLED
+#define MYNEWT_VAL_NRFX_TIMER_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TWIM_ENABLED
+#define MYNEWT_VAL_NRFX_TWIM_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TWIS_ENABLED
+#define MYNEWT_VAL_NRFX_TWIS_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_TWI_ENABLED
+#define MYNEWT_VAL_NRFX_TWI_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_UARTE_ENABLED
+#define MYNEWT_VAL_NRFX_UARTE_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_UART_ENABLED
+#define MYNEWT_VAL_NRFX_UART_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_USBD_ENABLED
+#define MYNEWT_VAL_NRFX_USBD_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_USBREG_ENABLED
+#define MYNEWT_VAL_NRFX_USBREG_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_VEVIF_ENABLED
+#define MYNEWT_VAL_NRFX_VEVIF_ENABLED (0)
+#endif
+
+#ifndef MYNEWT_VAL_NRFX_WDT_ENABLED
+#define MYNEWT_VAL_NRFX_WDT_ENABLED (0)
+#endif
+
#ifndef MYNEWT_VAL_PKG_hw_mcu_nordic
#define MYNEWT_VAL_PKG_hw_mcu_nordic (1)
#endif
