Repository: incubator-mynewt-core
Updated Branches:
  refs/heads/develop eb59481c9 -> f1fcdb91b


split startup.s; clear cpu mode.


Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: 
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/f1fcdb91
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/f1fcdb91
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/f1fcdb91

Branch: refs/heads/develop
Commit: f1fcdb91b09c68add3a63378fee45597d616883c
Parents: eb59481
Author: Marko Kiiskila <[email protected]>
Authored: Wed Jan 25 15:07:16 2017 -0800
Committer: Marko Kiiskila <[email protected]>
Committed: Wed Jan 25 15:07:16 2017 -0800

----------------------------------------------------------------------
 .../src/arch/cortex_m4/gcc_startup_nrf52_split.s                | 5 ++++-
 hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s  | 5 ++++-
 .../nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s  | 5 +++++
 .../src/arch/cortex_m0/gcc_startup_nrf51_split.s                | 5 +++++
 hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s | 5 ++++-
 hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s    | 4 ++++
 6 files changed, 26 insertions(+), 3 deletions(-)
----------------------------------------------------------------------


http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
----------------------------------------------------------------------
diff --git 
a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s 
b/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
index 51899e3..de1ce6e 100755
--- a/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ b/hw/bsp/arduino_primo_nrf52/src/arch/cortex_m4/gcc_startup_nrf52_split.s
@@ -83,8 +83,11 @@ __isr_vector_split:
 Reset_Handler_split:
     .fnstart
 
-    /* Clear BSS */
+    /* Clear CPU state before proceeding */
     mov     r0, #0
+    msr     control, r0
+    msr     primask, r0
+    /* Clear BSS */
     ldr     r2, =__bss_start__
     ldr     r3, =__bss_end__
 .bss_zero_loop:

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
----------------------------------------------------------------------
diff --git a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s 
b/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
index 51899e3..de1ce6e 100755
--- a/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ b/hw/bsp/bmd300eval/src/arch/cortex_m4/gcc_startup_nrf52_split.s
@@ -83,8 +83,11 @@ __isr_vector_split:
 Reset_Handler_split:
     .fnstart
 
-    /* Clear BSS */
+    /* Clear CPU state before proceeding */
     mov     r0, #0
+    msr     control, r0
+    msr     primask, r0
+    /* Clear BSS */
     ldr     r2, =__bss_start__
     ldr     r3, =__bss_end__
 .bss_zero_loop:

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s 
b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
index 913fc3c..c347187 100755
--- a/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ b/hw/bsp/nrf51-blenano/src/arch/cortex_m0/gcc_startup_nrf51_split.s
@@ -89,6 +89,11 @@ Reset_Handler_split:
     .fnstart
 
 
+/* Clear CPU state before proceeding */
+    SUBS    r0, r0
+    MSR     CONTROL, r0
+    MSR     PRIMASK, r0
+
 /* Make sure ALL RAM banks are powered on */
     MOVS    R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
 

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/nrf51dk-16kbram/src/arch/cortex_m0/gcc_startup_nrf51_split.s
----------------------------------------------------------------------
diff --git 
a/hw/bsp/nrf51dk-16kbram/src/arch/cortex_m0/gcc_startup_nrf51_split.s 
b/hw/bsp/nrf51dk-16kbram/src/arch/cortex_m0/gcc_startup_nrf51_split.s
index c3fb7d7..8ce6427 100755
--- a/hw/bsp/nrf51dk-16kbram/src/arch/cortex_m0/gcc_startup_nrf51_split.s
+++ b/hw/bsp/nrf51dk-16kbram/src/arch/cortex_m0/gcc_startup_nrf51_split.s
@@ -88,6 +88,11 @@ __isr_vector_split:
 Reset_Handler_split:
     .fnstart
 
+/* Clear CPU state before proceeding */
+    SUBS    r0, r0
+    MSR     CONTROL, r0
+    MSR     PRIMASK, r0
+
 /* Make sure ALL RAM banks are powered on */
     MOVS    R1, #NRF_POWER_RAMONx_RAMxON_ONMODE_Msk
 

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s 
b/hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s
index c9b7784..32343d5 100755
--- a/hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ b/hw/bsp/nrf52840pdk/src/arch/cortex_m4/gcc_startup_nrf52_split.s
@@ -84,8 +84,11 @@ __isr_vector_split:
 Reset_Handler_split:
     .fnstart
 
-    /* Clear BSS */
+    /* Clear CPU state before proceeding */
     mov     r0, #0
+    msr     control, r0
+    msr     primask, r0
+    /* Clear BSS */
     ldr     r2, =__bss_start__
     ldr     r3, =__bss_end__
 .bss_zero_loop:

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/f1fcdb91/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
----------------------------------------------------------------------
diff --git a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s 
b/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
index 51899e3..66a960d 100755
--- a/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
+++ b/hw/bsp/rb-nano2/src/arch/cortex_m4/gcc_startup_nrf52_split.s
@@ -83,6 +83,10 @@ __isr_vector_split:
 Reset_Handler_split:
     .fnstart
 
+    /* Clear CPU state before proceeding */
+    mov     r0, #0
+    msr     control, r0
+    msr     primask, r0
     /* Clear BSS */
     mov     r0, #0
     ldr     r2, =__bss_start__

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